SourceLevelDebugPkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
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@@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@@ -235,21 +235,21 @@ NoExtrPush:
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## insure FXSAVE/FXRSTOR is enabled in CR4...
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## ... while we're at it, make sure DE is also enabled...
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mov $1, %eax
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pushl %ebx # temporarily save value of ebx on stack
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cpuid # use CPUID to determine if FXSAVE/FXRESTOR
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pushl %ebx # temporarily save value of ebx on stack
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cpuid # use CPUID to determine if FXSAVE/FXRESTOR
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# and DE are supported
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popl %ebx # retore value of ebx that was overwritten
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# by CPUID
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# by CPUID
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movl %cr4, %eax
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pushl %eax # push cr4 firstly
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testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
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jz L1
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orl $BIT9, %eax # Set CR4.OSFXSR
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L1:
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L1:
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testl $BIT2, %edx # Test for Debugging Extensions support
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jz L2
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orl $BIT3, %eax # Set CR4.DE
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L2:
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L2:
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movl %eax, %cr4
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movl %cr3, %eax
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pushl %eax
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@@ -322,14 +322,14 @@ L2:
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# edx still contains result from CPUID above
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jz L3
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.byte 0x0f, 0xae, 0x07 # fxsave [edi]
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L3:
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L3:
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## save the exception data
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pushl 8(%esp)
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## Clear Direction Flag
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cld
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## Prepare parameter and call C function
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pushl %esp
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pushl %ebx
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@@ -347,7 +347,7 @@ L3:
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testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
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jz L4
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.byte 0x0f, 0xae, 0x0e # fxrstor [esi]
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L4:
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L4:
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addl $512,%esp
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## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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@@ -412,4 +412,4 @@ L4:
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popl %ebp
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addl $8,%esp # skip eax
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iretl
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