SourceLevelDebugPkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
This commit is contained in:
@@ -46,7 +46,7 @@ UINT16 mSerialNumberStrDesc[] = {
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**/
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VOID
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XhcSetR32Bit(
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IN OUT UINTN Register,
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IN OUT UINTN Register,
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IN UINT32 BitMask
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)
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{
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@@ -65,7 +65,7 @@ XhcSetR32Bit(
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**/
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VOID
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XhcClearR32Bit(
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IN OUT UINTN Register,
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IN OUT UINTN Register,
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IN UINT32 BitMask
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)
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{
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@@ -92,10 +92,10 @@ XhcWriteDebugReg (
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)
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{
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EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
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DebugCapabilityBase = Handle->DebugCapabilityBase;
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MmioWrite32 ((UINTN)(DebugCapabilityBase + Offset), Data);
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return;
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}
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@@ -116,7 +116,7 @@ XhcReadDebugReg (
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{
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UINT32 Data;
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EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
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DebugCapabilityBase = Handle->DebugCapabilityBase;
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Data = MmioRead32 ((UINTN)(DebugCapabilityBase + Offset));
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@@ -182,7 +182,7 @@ ProgramXhciBaseAddress (
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UINT32 Low;
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UINT32 High;
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EFI_PHYSICAL_ADDRESS XhciMmioBase;
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Low = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET);
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High = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET + 4);
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XhciMmioBase = (EFI_PHYSICAL_ADDRESS) (LShiftU64 ((UINT64) High, 32) | Low);
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@@ -263,7 +263,7 @@ CalculateUsbDebugPortMmioBase (
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VendorId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_VENDOR_ID_OFFSET);
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DeviceId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_DEVICE_ID_OFFSET);
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if ((VendorId == 0xFFFF) || (DeviceId == 0xFFFF)) {
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goto Done;
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}
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@@ -271,7 +271,7 @@ CalculateUsbDebugPortMmioBase (
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ProgInterface = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET);
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SubClassCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 1);
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BaseCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 2);
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if ((ProgInterface != PCI_IF_XHCI) || (SubClassCode != PCI_CLASS_SERIAL_USB) || (BaseCode != PCI_CLASS_SERIAL)) {
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goto Done;
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}
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@@ -282,7 +282,7 @@ CalculateUsbDebugPortMmioBase (
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// Get capability pointer from HCCPARAMS at offset 0x10
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//
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CapabilityPointer = Handle->XhciMmioBase + (MmioRead32 ((UINTN)(Handle->XhciMmioBase + XHC_HCCPARAMS_OFFSET)) >> 16) * 4;
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//
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// Search XHCI debug capability
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//
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@@ -377,7 +377,7 @@ CreateEventRing (
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EVENT_RING_SEG_TABLE_ENTRY *ERSTBase;
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ASSERT (EventRing != NULL);
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//
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// Allocate Event Ring
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//
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@@ -390,7 +390,7 @@ CreateEventRing (
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EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
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EventRing->EventRingDequeue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
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EventRing->EventRingEnqueue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
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//
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// Software maintains an Event Ring Consumer Cycle State (CCS) bit, initializing it to '1'
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// and toggling it every time the Event Ring Dequeue Pointer wraps back to the beginning of the Event Ring.
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@@ -473,7 +473,7 @@ CreateTransferRing (
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{
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VOID *Buf;
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LINK_TRB *EndTrb;
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Buf = AllocateAlignBuffer (sizeof (TRB_TEMPLATE) * TrbNum);
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ASSERT (Buf != NULL);
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ASSERT (((UINTN) Buf & 0xF) == 0);
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@@ -523,7 +523,7 @@ CreateDebugCapabilityContext (
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UINT8 *ManufacturerStrDesc;
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UINT8 *ProductStrDesc;
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UINT8 *SerialNumberStrDesc;
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//
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// Allocate debug device context
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//
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@@ -531,10 +531,10 @@ CreateDebugCapabilityContext (
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ASSERT (Buf != NULL);
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ASSERT (((UINTN) Buf & 0xF) == 0);
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ZeroMem (Buf, sizeof (XHC_DC_CONTEXT));
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DebugCapabilityContext = (XHC_DC_CONTEXT *)(UINTN) Buf;
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Handle->DebugCapabilityContext = (EFI_PHYSICAL_ADDRESS)(UINTN) DebugCapabilityContext;
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//
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// Initialize DbcInfoContext.
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//
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@@ -550,7 +550,7 @@ CreateDebugCapabilityContext (
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DebugCapabilityContext->EpOutContext.EPType = ED_BULK_OUT;
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DebugCapabilityContext->EpOutContext.MaxPacketSize = XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
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DebugCapabilityContext->EpOutContext.AverageTRBLength = 0x1000;
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//
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// Initialize EpInContext.
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//
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@@ -558,7 +558,7 @@ CreateDebugCapabilityContext (
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DebugCapabilityContext->EpInContext.EPType = ED_BULK_IN;
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DebugCapabilityContext->EpInContext.MaxPacketSize = XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
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DebugCapabilityContext->EpInContext.AverageTRBLength = 0x1000;
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//
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// Update string descriptor address
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//
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@@ -567,19 +567,19 @@ CreateDebugCapabilityContext (
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ZeroMem (String0Desc, STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN);
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CopyMem (String0Desc, mString0Desc, STRING0_DESC_LEN);
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DebugCapabilityContext->DbcInfoContext.String0DescAddress = (UINT64)(UINTN)String0Desc;
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ManufacturerStrDesc = String0Desc + STRING0_DESC_LEN;
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CopyMem (ManufacturerStrDesc, mManufacturerStrDesc, MANU_DESC_LEN);
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DebugCapabilityContext->DbcInfoContext.ManufacturerStrDescAddress = (UINT64)(UINTN)ManufacturerStrDesc;
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ProductStrDesc = ManufacturerStrDesc + MANU_DESC_LEN;
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CopyMem (ProductStrDesc, mProductStrDesc, PRODUCT_DESC_LEN);
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DebugCapabilityContext->DbcInfoContext.ProductStrDescAddress = (UINT64)(UINTN)ProductStrDesc;
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SerialNumberStrDesc = ProductStrDesc + PRODUCT_DESC_LEN;
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CopyMem (SerialNumberStrDesc, mSerialNumberStrDesc, SERIAL_DESC_LEN);
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DebugCapabilityContext->DbcInfoContext.SerialNumberStrDescAddress = (UINT64)(UINTN)SerialNumberStrDesc;
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//
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// Allocate and initialize the Transfer Ring for the Input Endpoint Context.
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//
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@@ -687,7 +687,7 @@ InitializeUsbDebugHardware (
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return EFI_DEVICE_ERROR;
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}
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//
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// If XHCI supports debug capability, hardware resource has been allocated,
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// If XHCI supports debug capability, hardware resource has been allocated,
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// but it has not been enabled, try to enable again.
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//
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goto Enable;
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@@ -708,7 +708,7 @@ InitializeUsbDebugHardware (
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//
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// Reset port to get debug device discovered
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//
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//
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for (Index = 0; Index < TotalUsb3Port; Index++) {
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XhcSetR32Bit ((UINTN)XhciOpRegister + XHC_PORTSC_OFFSET + Index * 0x10, BIT4);
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MicroSecondDelay (10 * 1000);
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@@ -727,20 +727,20 @@ InitializeUsbDebugHardware (
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Handle->UrbIn.Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer;
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Handle->Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
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Handle->UrbOut.Data = Handle->UrbIn.Data + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE * 2;
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//
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// Initialize event ring
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//
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ZeroMem (&Handle->EventRing, sizeof (EVENT_RING));
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Status = CreateEventRing (Handle, &Handle->EventRing);
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ASSERT_EFI_ERROR (Status);
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//
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// Init IN and OUT endpoint context
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//
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Status = CreateDebugCapabilityContext (Handle);
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ASSERT_EFI_ERROR (Status);
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//
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// Init DCDDI1 and DCDDI2
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//
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@@ -748,7 +748,7 @@ InitializeUsbDebugHardware (
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Handle,
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XHC_DC_DCDDI1,
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(UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) | XHCI_DEBUG_DEVICE_PROTOCOL)
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);
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);
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XhcWriteDebugReg (
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Handle,
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@@ -759,7 +759,7 @@ InitializeUsbDebugHardware (
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Enable:
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if ((Handle->Initialized == USB3DBG_NOT_ENABLED) && (!Handle->ChangePortPower)) {
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//
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// If the first time detection is failed, turn port power off and on in order to
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// If the first time detection is failed, turn port power off and on in order to
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// reset port status this time, then try to check if debug device is ready again.
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//
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for (Index = 0; Index < TotalUsb3Port; Index++) {
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@@ -775,9 +775,9 @@ Enable:
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// Set DCE bit and LSE bit to "1" in DCCTRL in first initialization
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//
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XhcSetDebugRegBit (Handle, XHC_DC_DCCTRL, BIT1|BIT31);
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XhcDetectDebugCapabilityReady (Handle);
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Status = RETURN_SUCCESS;
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if (!Handle->Ready) {
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Handle->Initialized = USB3DBG_NOT_ENABLED;
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@@ -823,7 +823,7 @@ DiscoverInitializeUsbDebugPort (
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@param[in] Instance Debug port instance.
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**/
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**/
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VOID
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SetUsb3DebugPortInstance (
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IN USB3_DEBUG_PORT_HANDLE *Instance
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@@ -839,7 +839,7 @@ SetUsb3DebugPortInstance (
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/**
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Return USB3 debug instance address.
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**/
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**/
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USB3_DEBUG_PORT_HANDLE *
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GetUsb3DebugPortInstance (
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VOID
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@@ -1010,7 +1010,7 @@ DebugPortWriteBuffer (
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XhcDataTransfer (UsbDebugPortHandle, EfiUsbDataOut, Buffer + Total, &Sent, DATA_TRANSFER_WRITE_TIMEOUT);
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Total += Sent;
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}
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return Total;
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}
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@@ -1123,7 +1123,7 @@ DebugPortInitialize (
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USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
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//
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// Validate the PCD PcdDebugPortHandleBufferSize value
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// Validate the PCD PcdDebugPortHandleBufferSize value
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//
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ASSERT (PcdGet16 (PcdDebugPortHandleBufferSize) == sizeof (USB3_DEBUG_PORT_HANDLE));
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