SourceLevelDebugPkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
This commit is contained in:
@ -1,14 +1,14 @@
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/** @file
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/** @file
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Initialize Debug Agent in DXE by invoking Debug Agent Library.
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Initialize Debug Agent in DXE by invoking Debug Agent Library.
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Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
|
This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
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||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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http://opensource.org/licenses/bsd-license.php
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|
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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**/
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@ -18,7 +18,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#include <Library/DebugAgentLib.h>
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#include <Library/DebugAgentLib.h>
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#include <Library/UefiLib.h>
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#include <Library/UefiLib.h>
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EFI_EVENT mExitBootServiceEvent;
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EFI_EVENT mExitBootServiceEvent;
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/**
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/**
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One notified function to disable Debug Timer interrupt when gBS->ExitBootServices() called.
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One notified function to disable Debug Timer interrupt when gBS->ExitBootServices() called.
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@ -3,7 +3,7 @@
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#
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#
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# This DXE driver will invoke Debug Agent Library to initialize the debug agent.
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# This DXE driver will invoke Debug Agent Library to initialize the debug agent.
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#
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#
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# Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# which accompanies this distribution. The full text of the license may be found at
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@ -20,7 +20,7 @@
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MODULE_UNI_FILE = DebugAgentDxe.uni
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MODULE_UNI_FILE = DebugAgentDxe.uni
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FILE_GUID = 9727502C-034E-472b-8E1B-67BB28C6CFDB
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FILE_GUID = 9727502C-034E-472b-8E1B-67BB28C6CFDB
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MODULE_TYPE = DXE_DRIVER
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MODULE_TYPE = DXE_DRIVER
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VERSION_STRING = 1.0
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VERSION_STRING = 1.0
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ENTRY_POINT = DebugAgentDxeInitialize
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ENTRY_POINT = DebugAgentDxeInitialize
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UNLOAD_IMAGE = DebugAgentDxeUnload
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UNLOAD_IMAGE = DebugAgentDxeUnload
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@ -32,7 +32,7 @@
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[Sources]
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[Sources]
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DebugAgentDxe.c
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DebugAgentDxe.c
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[Packages]
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[Packages]
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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@ -40,7 +40,7 @@
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[LibraryClasses]
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[LibraryClasses]
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UefiDriverEntryPoint
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UefiDriverEntryPoint
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UefiBootServicesTableLib
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UefiBootServicesTableLib
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DebugAgentLib
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DebugAgentLib
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[Guids]
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[Guids]
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gEfiEventExitBootServicesGuid ## SOMETIMES_CONSUMES ## Event
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gEfiEventExitBootServicesGuid ## SOMETIMES_CONSUMES ## Event
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@ -3,13 +3,13 @@
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//
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//
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// This DXE driver will invoke Debug Agent Library to initialize the debug agent.
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// This DXE driver will invoke Debug Agent Library to initialize the debug agent.
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//
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//
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// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
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// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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//
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//
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// This program and the accompanying materials
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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// http://opensource.org/licenses/bsd-license.php
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//
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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@ -1,7 +1,7 @@
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// /** @file
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// /** @file
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// DebugAgentDxe Localized Strings and Content
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// DebugAgentDxe Localized Strings and Content
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//
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//
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// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
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// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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//
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//
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// This program and the accompanying materials
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// are licensed and made available under the terms and conditions of the BSD License
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@ -13,8 +13,8 @@
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//
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//
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// **/
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// **/
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#string STR_PROPERTIES_MODULE_NAME
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#string STR_PROPERTIES_MODULE_NAME
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#language en-US
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#language en-US
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"Debug Agent DXE Driver"
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"Debug Agent DXE Driver"
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@ -1,14 +1,14 @@
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/** @file
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/** @file
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Initialize Debug Agent in PEI by invoking Debug Agent Library.
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Initialize Debug Agent in PEI by invoking Debug Agent Library.
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Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
|
This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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**/
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@ -24,7 +24,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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This function is the Entry point of the CPU I/O PEIM which installs CpuIoPpi.
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This function is the Entry point of the CPU I/O PEIM which installs CpuIoPpi.
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@param[in] FileHandle Pointer to image file handle.
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@param[in] FileHandle Pointer to image file handle.
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@param[in] PeiServices Pointer to PEI Services Table
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@param[in] PeiServices Pointer to PEI Services Table
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@retval EFI_SUCCESS Debug Agent successfully initialized.
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@retval EFI_SUCCESS Debug Agent successfully initialized.
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@retval other Some error occurs when initialzed Debug Agent.
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@retval other Some error occurs when initialzed Debug Agent.
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@ -1,10 +1,10 @@
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## @file
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## @file
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# Initialized Debug Agent in PEI phase.
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# Initialized Debug Agent in PEI phase.
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#
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#
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# This PEIM will invoke Debug Agent Library to initialize the debug agent in
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# This PEIM will invoke Debug Agent Library to initialize the debug agent in
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# whole PEI phase.
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# whole PEI phase.
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#
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#
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# Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# which accompanies this distribution. The full text of the license may be found at
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@ -21,7 +21,7 @@
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MODULE_UNI_FILE = DebugAgentPei.uni
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MODULE_UNI_FILE = DebugAgentPei.uni
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FILE_GUID = D9D114EF-F40B-4d48-AAA0-A3DC99C9F5BD
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FILE_GUID = D9D114EF-F40B-4d48-AAA0-A3DC99C9F5BD
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MODULE_TYPE = PEIM
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MODULE_TYPE = PEIM
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VERSION_STRING = 1.0
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VERSION_STRING = 1.0
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ENTRY_POINT = DebugAgentPeiInitialize
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ENTRY_POINT = DebugAgentPeiInitialize
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#
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#
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@ -32,7 +32,7 @@
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[Sources]
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[Sources]
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DebugAgentPei.c
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DebugAgentPei.c
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[Packages]
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[Packages]
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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@ -4,13 +4,13 @@
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// This PEIM will invoke Debug Agent Library to initialize the debug agent in
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// This PEIM will invoke Debug Agent Library to initialize the debug agent in
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// whole PEI phase.
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// whole PEI phase.
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//
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//
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// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
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// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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//
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//
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// This program and the accompanying materials
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
|
// are licensed and made available under the terms and conditions of the BSD License
|
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// which accompanies this distribution. The full text of the license may be found at
|
// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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// http://opensource.org/licenses/bsd-license.php
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//
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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@ -1,7 +1,7 @@
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// /** @file
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// /** @file
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// DebugAgentPei Localized Strings and Content
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// DebugAgentPei Localized Strings and Content
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//
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//
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// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
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// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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//
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//
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// This program and the accompanying materials
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// are licensed and made available under the terms and conditions of the BSD License
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@ -13,8 +13,8 @@
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//
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//
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// **/
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// **/
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#string STR_PROPERTIES_MODULE_NAME
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#string STR_PROPERTIES_MODULE_NAME
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#language en-US
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#language en-US
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"Debug Agent PEI Module"
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"Debug Agent PEI Module"
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@ -383,9 +383,9 @@ DebugAgentReadBuffer (
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UINT32 TimerRound;
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UINT32 TimerRound;
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UINT32 TimerFrequency;
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UINT32 TimerFrequency;
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UINT32 TimerCycle;
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UINT32 TimerCycle;
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Begin = 0;
|
Begin = 0;
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TimeoutTicker = 0;
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TimeoutTicker = 0;
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TimerRound = 0;
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TimerRound = 0;
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TimerFrequency = GetMailboxPointer()->DebugTimerFrequency;
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TimerFrequency = GetMailboxPointer()->DebugTimerFrequency;
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TimerCycle = GetApicTimerInitCount ();
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TimerCycle = GetApicTimerInitCount ();
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@ -405,7 +405,7 @@ DebugAgentReadBuffer (
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while (Index < NumberOfBytes) {
|
while (Index < NumberOfBytes) {
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if (DebugPortPollBuffer (Handle)) {
|
if (DebugPortPollBuffer (Handle)) {
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DebugPortReadBuffer (Handle, Buffer + Index, 1, 0);
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DebugPortReadBuffer (Handle, Buffer + Index, 1, 0);
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Index ++;
|
Index ++;
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continue;
|
continue;
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}
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}
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if (Timeout != 0) {
|
if (Timeout != 0) {
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@ -652,7 +652,7 @@ ReadRemainingBreakPacket (
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if (IS_REQUEST (DebugHeader)) {
|
if (IS_REQUEST (DebugHeader)) {
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if (DebugHeader->SequenceNo == (UINT8) (Mailbox->HostSequenceNo + 1)) {
|
if (DebugHeader->SequenceNo == (UINT8) (Mailbox->HostSequenceNo + 1)) {
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//
|
//
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// Only updagte HostSequenceNo for new command packet
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// Only updagte HostSequenceNo for new command packet
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//
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//
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UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_HOST_SEQUENCE_NO_INDEX, DebugHeader->SequenceNo);
|
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_HOST_SEQUENCE_NO_INDEX, DebugHeader->SequenceNo);
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return EFI_SUCCESS;
|
return EFI_SUCCESS;
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@ -1476,7 +1476,7 @@ CompressData (
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if (Send) {
|
if (Send) {
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DebugPortWriteBuffer (Handle, &LastChar, 1);
|
DebugPortWriteBuffer (Handle, &LastChar, 1);
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}
|
}
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|
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} else if (LastCharCount >= 2) {
|
} else if (LastCharCount >= 2) {
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CompressedIndex += 3;
|
CompressedIndex += 3;
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LastCharCount -= 2;
|
LastCharCount -= 2;
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|
@ -1,7 +1,7 @@
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/** @file
|
/** @file
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Command header of for Debug Agent library instance.
|
Command header of for Debug Agent library instance.
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|
|
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Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -126,7 +126,7 @@ typedef union {
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//
|
//
|
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UINT32 BreakOnNextSmi : 1; // 1: Break on next SMI
|
UINT32 BreakOnNextSmi : 1; // 1: Break on next SMI
|
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UINT32 PrintErrorLevel : 4; // Bitmask of print error level for debug message
|
UINT32 PrintErrorLevel : 4; // Bitmask of print error level for debug message
|
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UINT32 BreakOnBootScript : 1; // 1: Break before executing boot script
|
UINT32 BreakOnBootScript : 1; // 1: Break before executing boot script
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UINT32 Reserved2 : 26;
|
UINT32 Reserved2 : 26;
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} Bits;
|
} Bits;
|
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UINT64 Uint64;
|
UINT64 Uint64;
|
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@ -285,7 +285,7 @@ DebugReadBreakSymbol (
|
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|
|
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@param[in] ErrorLevel The error level of the debug message.
|
@param[in] ErrorLevel The error level of the debug message.
|
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@param[in] Format Format string for the debug message to print.
|
@param[in] Format Format string for the debug message to print.
|
||||||
@param[in] ... Variable argument list whose contents are accessed
|
@param[in] ... Variable argument list whose contents are accessed
|
||||||
based on the format string specified by Format.
|
based on the format string specified by Format.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -322,13 +322,13 @@ MultiProcessorDebugSupport (
|
|||||||
|
|
||||||
/**
|
/**
|
||||||
Find and report module image info to HOST.
|
Find and report module image info to HOST.
|
||||||
|
|
||||||
@param[in] AlignSize Image aligned size.
|
@param[in] AlignSize Image aligned size.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
FindAndReportModuleImageInfo (
|
FindAndReportModuleImageInfo (
|
||||||
IN UINTN AlignSize
|
IN UINTN AlignSize
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -338,7 +338,7 @@ FindAndReportModuleImageInfo (
|
|||||||
@retval FALSE IDT entries were not setup by Debug Agent.
|
@retval FALSE IDT entries were not setup by Debug Agent.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
BOOLEAN
|
||||||
IsDebugAgentInitialzed (
|
IsDebugAgentInitialzed (
|
||||||
VOID
|
VOID
|
||||||
);
|
);
|
||||||
@ -362,7 +362,7 @@ UpdateMailboxChecksum (
|
|||||||
@param[in] Mailbox Debug Agent Mailbox pointer.
|
@param[in] Mailbox Debug Agent Mailbox pointer.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
VerifyMailboxChecksum (
|
VerifyMailboxChecksum (
|
||||||
IN DEBUG_AGENT_MAILBOX *Mailbox
|
IN DEBUG_AGENT_MAILBOX *Mailbox
|
||||||
);
|
);
|
||||||
@ -374,17 +374,17 @@ VerifyMailboxChecksum (
|
|||||||
@param[in] FlagValue Debug flag value.
|
@param[in] FlagValue Debug flag value.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
SetDebugFlag (
|
SetDebugFlag (
|
||||||
IN UINT64 FlagMask,
|
IN UINT64 FlagMask,
|
||||||
IN UINT32 FlagValue
|
IN UINT32 FlagValue
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Get debug flag in mailbox.
|
Get debug flag in mailbox.
|
||||||
|
|
||||||
@param[in] FlagMask Debug flag mask value.
|
@param[in] FlagMask Debug flag mask value.
|
||||||
|
|
||||||
@return Debug flag value.
|
@return Debug flag value.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -399,10 +399,10 @@ GetDebugFlag (
|
|||||||
@param[in] Mailbox Debug Agent Mailbox pointer.
|
@param[in] Mailbox Debug Agent Mailbox pointer.
|
||||||
@param[in] Index Mailbox content index.
|
@param[in] Index Mailbox content index.
|
||||||
@param[in] Value Value to be set into mail box.
|
@param[in] Value Value to be set into mail box.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
UpdateMailboxContent (
|
UpdateMailboxContent (
|
||||||
IN DEBUG_AGENT_MAILBOX *Mailbox,
|
IN DEBUG_AGENT_MAILBOX *Mailbox,
|
||||||
IN UINTN Index,
|
IN UINTN Index,
|
||||||
IN UINT64 Value
|
IN UINT64 Value
|
||||||
@ -412,7 +412,7 @@ UpdateMailboxContent (
|
|||||||
Retrieve exception handler from IDT table by ExceptionNum.
|
Retrieve exception handler from IDT table by ExceptionNum.
|
||||||
|
|
||||||
@param[in] ExceptionNum Exception number
|
@param[in] ExceptionNum Exception number
|
||||||
|
|
||||||
@return Exception handler
|
@return Exception handler
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -425,7 +425,7 @@ GetExceptionHandlerInIdtEntry (
|
|||||||
Set exception handler in IDT table by ExceptionNum.
|
Set exception handler in IDT table by ExceptionNum.
|
||||||
|
|
||||||
@param[in] ExceptionNum Exception number
|
@param[in] ExceptionNum Exception number
|
||||||
@param[in] ExceptionHandler Exception Handler to be set
|
@param[in] ExceptionHandler Exception Handler to be set
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
@ -437,15 +437,15 @@ SetExceptionHandlerInIdtEntry (
|
|||||||
/**
|
/**
|
||||||
Prints a debug message to the debug output device if the specified error level is enabled.
|
Prints a debug message to the debug output device if the specified error level is enabled.
|
||||||
|
|
||||||
If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
|
If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
|
||||||
GetDebugPrintErrorLevel (), then print the message specified by Format and the
|
GetDebugPrintErrorLevel (), then print the message specified by Format and the
|
||||||
associated variable argument list to the debug output device.
|
associated variable argument list to the debug output device.
|
||||||
|
|
||||||
If Format is NULL, then ASSERT().
|
If Format is NULL, then ASSERT().
|
||||||
|
|
||||||
@param[in] ErrorLevel The error level of the debug message.
|
@param[in] ErrorLevel The error level of the debug message.
|
||||||
@param[in] IsSend Flag of debug message to declare that the data is being sent or being received.
|
@param[in] IsSend Flag of debug message to declare that the data is being sent or being received.
|
||||||
@param[in] Data Variable argument list whose contents are accessed
|
@param[in] Data Variable argument list whose contents are accessed
|
||||||
@param[in] Length based on the format string specified by Format.
|
@param[in] Length based on the format string specified by Format.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -455,7 +455,7 @@ DebugAgentDataMsgPrint (
|
|||||||
IN UINT8 ErrorLevel,
|
IN UINT8 ErrorLevel,
|
||||||
IN BOOLEAN IsSend,
|
IN BOOLEAN IsSend,
|
||||||
IN UINT8 *Data,
|
IN UINT8 *Data,
|
||||||
IN UINT8 Length
|
IN UINT8 Length
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -142,10 +142,10 @@ DebugAgentIsBsp (
|
|||||||
)
|
)
|
||||||
{
|
{
|
||||||
MSR_IA32_APIC_BASE_REGISTER MsrApicBase;
|
MSR_IA32_APIC_BASE_REGISTER MsrApicBase;
|
||||||
|
|
||||||
//
|
//
|
||||||
// If there are less than 2 CPUs detected, then the currently executing CPU
|
// If there are less than 2 CPUs detected, then the currently executing CPU
|
||||||
// must be the BSP. This avoids an access to an MSR that may not be supported
|
// must be the BSP. This avoids an access to an MSR that may not be supported
|
||||||
// on single core CPUs.
|
// on single core CPUs.
|
||||||
//
|
//
|
||||||
if (mDebugCpuData.CpuCount < 2) {
|
if (mDebugCpuData.CpuCount < 2) {
|
||||||
|
@ -189,7 +189,7 @@ UINT32
|
|||||||
FindNextPendingBreakCpu (
|
FindNextPendingBreakCpu (
|
||||||
VOID
|
VOID
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Check if all processors are in running status.
|
Check if all processors are in running status.
|
||||||
|
|
||||||
@ -205,18 +205,18 @@ IsAllCpuRunning (
|
|||||||
/**
|
/**
|
||||||
Check if the current processor is the first breaking processor.
|
Check if the current processor is the first breaking processor.
|
||||||
|
|
||||||
If yes, halt other processors.
|
If yes, halt other processors.
|
||||||
|
|
||||||
@param[in] ProcessorIndex Processor index value.
|
@param[in] ProcessorIndex Processor index value.
|
||||||
|
|
||||||
@return TRUE This processor is the first breaking processor.
|
@return TRUE This processor is the first breaking processor.
|
||||||
@return FALSE This processor is not the first breaking processor.
|
@return FALSE This processor is not the first breaking processor.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
BOOLEAN
|
||||||
IsFirstBreakProcessor (
|
IsFirstBreakProcessor (
|
||||||
IN UINT32 ProcessorIndex
|
IN UINT32 ProcessorIndex
|
||||||
);
|
);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Supporting functions for IA32 architecture.
|
Supporting functions for IA32 architecture.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -58,9 +58,9 @@ InitializeDebugIdt (
|
|||||||
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
|
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
|
||||||
IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector = CodeSegment;
|
IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector = CodeSegment;
|
||||||
IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
|
IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
|
||||||
|
|
||||||
//
|
//
|
||||||
// If the CPU supports Debug Extensions(CPUID:01 EDX:BIT2), then
|
// If the CPU supports Debug Extensions(CPUID:01 EDX:BIT2), then
|
||||||
// Set DE flag in CR4 to enable IO breakpoint
|
// Set DE flag in CR4 to enable IO breakpoint
|
||||||
//
|
//
|
||||||
AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
|
AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
|
||||||
@ -73,7 +73,7 @@ InitializeDebugIdt (
|
|||||||
Retrieve exception handler from IDT table by ExceptionNum.
|
Retrieve exception handler from IDT table by ExceptionNum.
|
||||||
|
|
||||||
@param[in] ExceptionNum Exception number
|
@param[in] ExceptionNum Exception number
|
||||||
|
|
||||||
@return Exception handler
|
@return Exception handler
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -90,13 +90,13 @@ GetExceptionHandlerInIdtEntry (
|
|||||||
|
|
||||||
return (VOID *) (((UINTN)IdtEntry[ExceptionNum].Bits.OffsetLow) |
|
return (VOID *) (((UINTN)IdtEntry[ExceptionNum].Bits.OffsetLow) |
|
||||||
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16));
|
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16));
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Set exception handler in IDT table by ExceptionNum.
|
Set exception handler in IDT table by ExceptionNum.
|
||||||
|
|
||||||
@param[in] ExceptionNum Exception number
|
@param[in] ExceptionNum Exception number
|
||||||
@param[in] ExceptionHandler Exception Handler to be set
|
@param[in] ExceptionHandler Exception Handler to be set
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
|
@ -1,6 +1,6 @@
|
|||||||
#------------------------------------------------------------------------------
|
#------------------------------------------------------------------------------
|
||||||
#
|
#
|
||||||
# Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
|
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
# This program and the accompanying materials
|
# This program and the accompanying materials
|
||||||
# are licensed and made available under the terms and conditions of the BSD License
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
# which accompanies this distribution. The full text of the license may be found at
|
# which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -235,21 +235,21 @@ NoExtrPush:
|
|||||||
## insure FXSAVE/FXRSTOR is enabled in CR4...
|
## insure FXSAVE/FXRSTOR is enabled in CR4...
|
||||||
## ... while we're at it, make sure DE is also enabled...
|
## ... while we're at it, make sure DE is also enabled...
|
||||||
mov $1, %eax
|
mov $1, %eax
|
||||||
pushl %ebx # temporarily save value of ebx on stack
|
pushl %ebx # temporarily save value of ebx on stack
|
||||||
cpuid # use CPUID to determine if FXSAVE/FXRESTOR
|
cpuid # use CPUID to determine if FXSAVE/FXRESTOR
|
||||||
# and DE are supported
|
# and DE are supported
|
||||||
popl %ebx # retore value of ebx that was overwritten
|
popl %ebx # retore value of ebx that was overwritten
|
||||||
# by CPUID
|
# by CPUID
|
||||||
movl %cr4, %eax
|
movl %cr4, %eax
|
||||||
pushl %eax # push cr4 firstly
|
pushl %eax # push cr4 firstly
|
||||||
testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
|
testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
|
||||||
jz L1
|
jz L1
|
||||||
orl $BIT9, %eax # Set CR4.OSFXSR
|
orl $BIT9, %eax # Set CR4.OSFXSR
|
||||||
L1:
|
L1:
|
||||||
testl $BIT2, %edx # Test for Debugging Extensions support
|
testl $BIT2, %edx # Test for Debugging Extensions support
|
||||||
jz L2
|
jz L2
|
||||||
orl $BIT3, %eax # Set CR4.DE
|
orl $BIT3, %eax # Set CR4.DE
|
||||||
L2:
|
L2:
|
||||||
movl %eax, %cr4
|
movl %eax, %cr4
|
||||||
movl %cr3, %eax
|
movl %cr3, %eax
|
||||||
pushl %eax
|
pushl %eax
|
||||||
@ -322,14 +322,14 @@ L2:
|
|||||||
# edx still contains result from CPUID above
|
# edx still contains result from CPUID above
|
||||||
jz L3
|
jz L3
|
||||||
.byte 0x0f, 0xae, 0x07 # fxsave [edi]
|
.byte 0x0f, 0xae, 0x07 # fxsave [edi]
|
||||||
L3:
|
L3:
|
||||||
|
|
||||||
## save the exception data
|
## save the exception data
|
||||||
pushl 8(%esp)
|
pushl 8(%esp)
|
||||||
|
|
||||||
## Clear Direction Flag
|
## Clear Direction Flag
|
||||||
cld
|
cld
|
||||||
|
|
||||||
## Prepare parameter and call C function
|
## Prepare parameter and call C function
|
||||||
pushl %esp
|
pushl %esp
|
||||||
pushl %ebx
|
pushl %ebx
|
||||||
@ -347,7 +347,7 @@ L3:
|
|||||||
testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
|
testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
|
||||||
jz L4
|
jz L4
|
||||||
.byte 0x0f, 0xae, 0x0e # fxrstor [esi]
|
.byte 0x0f, 0xae, 0x0e # fxrstor [esi]
|
||||||
L4:
|
L4:
|
||||||
addl $512,%esp
|
addl $512,%esp
|
||||||
|
|
||||||
## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||||
@ -412,4 +412,4 @@ L4:
|
|||||||
popl %ebp
|
popl %ebp
|
||||||
addl $8,%esp # skip eax
|
addl $8,%esp # skip eax
|
||||||
iretl
|
iretl
|
||||||
|
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Supporting functions for X64 architecture.
|
Supporting functions for X64 architecture.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -62,7 +62,7 @@ InitializeDebugIdt (
|
|||||||
IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
|
IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
|
||||||
|
|
||||||
//
|
//
|
||||||
// If the CPU supports Debug Extensions(CPUID:01 EDX:BIT2), then
|
// If the CPU supports Debug Extensions(CPUID:01 EDX:BIT2), then
|
||||||
// Set DE flag in CR4 to enable IO breakpoint
|
// Set DE flag in CR4 to enable IO breakpoint
|
||||||
//
|
//
|
||||||
AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
|
AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
|
||||||
@ -75,7 +75,7 @@ InitializeDebugIdt (
|
|||||||
Retrieve exception handler from IDT table by ExceptionNum.
|
Retrieve exception handler from IDT table by ExceptionNum.
|
||||||
|
|
||||||
@param[in] ExceptionNum Exception number
|
@param[in] ExceptionNum Exception number
|
||||||
|
|
||||||
@return Exception handler
|
@return Exception handler
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -93,13 +93,13 @@ GetExceptionHandlerInIdtEntry (
|
|||||||
return (VOID *) (IdtEntry[ExceptionNum].Bits.OffsetLow |
|
return (VOID *) (IdtEntry[ExceptionNum].Bits.OffsetLow |
|
||||||
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16) |
|
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16) |
|
||||||
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetUpper) << 32));
|
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetUpper) << 32));
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Set exception handler in IDT table by ExceptionNum.
|
Set exception handler in IDT table by ExceptionNum.
|
||||||
|
|
||||||
@param[in] ExceptionNum Exception number
|
@param[in] ExceptionNum Exception number
|
||||||
@param[in] ExceptionHandler Exception Handler to be set
|
@param[in] ExceptionHandler Exception Handler to be set
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Debug Agent library implementition for Dxe Core and Dxr modules.
|
Debug Agent library implementition for Dxe Core and Dxr modules.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -237,7 +237,7 @@ GetDebugPortHandle (
|
|||||||
/**
|
/**
|
||||||
Worker function to set up Debug Agent environment.
|
Worker function to set up Debug Agent environment.
|
||||||
|
|
||||||
This function will set up IDT table and initialize the IDT entries and
|
This function will set up IDT table and initialize the IDT entries and
|
||||||
initialize CPU LOCAL APIC timer.
|
initialize CPU LOCAL APIC timer.
|
||||||
It also tries to connect HOST if Debug Agent was not initialized before.
|
It also tries to connect HOST if Debug Agent was not initialized before.
|
||||||
|
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Header file for Dxe Core Debug Agent Library instance.
|
Header file for Dxe Core Debug Agent Library instance.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -29,12 +29,12 @@
|
|||||||
#include "DebugAgent.h"
|
#include "DebugAgent.h"
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Install EFI Serial IO protocol based on Debug Communication Library.
|
Install EFI Serial IO protocol based on Debug Communication Library.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
InstallSerialIo (
|
InstallSerialIo (
|
||||||
VOID
|
VOID
|
||||||
);
|
);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Install Serial IO Protocol that layers on top of a Debug Communication Library instance.
|
Install Serial IO Protocol that layers on top of a Debug Communication Library instance.
|
||||||
|
|
||||||
Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -31,7 +31,7 @@ EFIAPI
|
|||||||
SerialReset (
|
SerialReset (
|
||||||
IN EFI_SERIAL_IO_PROTOCOL *This
|
IN EFI_SERIAL_IO_PROTOCOL *This
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Set new attributes to a serial device.
|
Set new attributes to a serial device.
|
||||||
|
|
||||||
@ -246,7 +246,7 @@ DEBUG_SERIAL_FIFO mSerialFifoForDebug = {0, 0, DEBGU_SERIAL_IO_FIF
|
|||||||
|
|
||||||
/**
|
/**
|
||||||
Detect whether specific FIFO is empty or not.
|
Detect whether specific FIFO is empty or not.
|
||||||
|
|
||||||
@param[in] Fifo A pointer to the Data Structure DEBUG_SERIAL_FIFO.
|
@param[in] Fifo A pointer to the Data Structure DEBUG_SERIAL_FIFO.
|
||||||
|
|
||||||
@return whether specific FIFO is empty or not.
|
@return whether specific FIFO is empty or not.
|
||||||
@ -357,7 +357,7 @@ DebugTerminalFifoRemove (
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Install EFI Serial IO protocol based on Debug Communication Library.
|
Install EFI Serial IO protocol based on Debug Communication Library.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
@ -431,12 +431,12 @@ SerialSetAttributes (
|
|||||||
//
|
//
|
||||||
// The Debug Communication Library CAN NOT change communications parameters (if it has)
|
// The Debug Communication Library CAN NOT change communications parameters (if it has)
|
||||||
// actually. Because it also has no any idea on what parameters are based on, we cannot
|
// actually. Because it also has no any idea on what parameters are based on, we cannot
|
||||||
// check the input parameters (like BaudRate, Parity, DataBits and StopBits).
|
// check the input parameters (like BaudRate, Parity, DataBits and StopBits).
|
||||||
//
|
//
|
||||||
|
|
||||||
//
|
//
|
||||||
// Update the Timeout value in the mode structure based on the request.
|
// Update the Timeout value in the mode structure based on the request.
|
||||||
// The Debug Communication Library can not support a timeout on writes, but the timeout on
|
// The Debug Communication Library can not support a timeout on writes, but the timeout on
|
||||||
// reads can be provided by this module.
|
// reads can be provided by this module.
|
||||||
//
|
//
|
||||||
if (Timeout == 0) {
|
if (Timeout == 0) {
|
||||||
@ -444,11 +444,11 @@ SerialSetAttributes (
|
|||||||
} else {
|
} else {
|
||||||
mSerialIoMode.Timeout = Timeout;
|
mSerialIoMode.Timeout = Timeout;
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Update the ReceiveFifoDepth value in the mode structure based on the request.
|
// Update the ReceiveFifoDepth value in the mode structure based on the request.
|
||||||
// This module assumes that the Debug Communication Library uses a FIFO depth of
|
// This module assumes that the Debug Communication Library uses a FIFO depth of
|
||||||
// SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH. The Debug Communication Library may actually be
|
// SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH. The Debug Communication Library may actually be
|
||||||
// using a larger FIFO, but there is no way to tell.
|
// using a larger FIFO, but there is no way to tell.
|
||||||
//
|
//
|
||||||
if (ReceiveFifoDepth == 0 || ReceiveFifoDepth >= SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH) {
|
if (ReceiveFifoDepth == 0 || ReceiveFifoDepth >= SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH) {
|
||||||
@ -512,21 +512,21 @@ SerialGetControl (
|
|||||||
// Raise TPL to prevent recursion from EFI timer interrupts
|
// Raise TPL to prevent recursion from EFI timer interrupts
|
||||||
//
|
//
|
||||||
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
|
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
|
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
|
||||||
//
|
//
|
||||||
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
|
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
|
||||||
Handle = GetDebugPortHandle ();
|
Handle = GetDebugPortHandle ();
|
||||||
|
|
||||||
//
|
//
|
||||||
// Always assume the output buffer is empty and the Debug Communication Library can process
|
// Always assume the output buffer is empty and the Debug Communication Library can process
|
||||||
// more write requests.
|
// more write requests.
|
||||||
//
|
//
|
||||||
*Control = mSerialIoMode.ControlMask | EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
|
*Control = mSerialIoMode.ControlMask | EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Check to see if the Terminal FIFO is empty and
|
// Check to see if the Terminal FIFO is empty and
|
||||||
// check to see if the input buffer in the Debug Communication Library is empty
|
// check to see if the input buffer in the Debug Communication Library is empty
|
||||||
//
|
//
|
||||||
if (!IsDebugTermianlFifoEmpty (&mSerialFifoForTerminal) || DebugPortPollBuffer (Handle)) {
|
if (!IsDebugTermianlFifoEmpty (&mSerialFifoForTerminal) || DebugPortPollBuffer (Handle)) {
|
||||||
@ -535,14 +535,14 @@ SerialGetControl (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Restore Debug Timer interrupt
|
// Restore Debug Timer interrupt
|
||||||
//
|
//
|
||||||
SaveAndSetDebugTimerInterrupt (DebugTimerInterruptState);
|
SaveAndSetDebugTimerInterrupt (DebugTimerInterruptState);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Restore to original TPL
|
// Restore to original TPL
|
||||||
//
|
//
|
||||||
gBS->RestoreTPL (Tpl);
|
gBS->RestoreTPL (Tpl);
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -575,13 +575,13 @@ SerialWrite (
|
|||||||
// Raise TPL to prevent recursion from EFI timer interrupts
|
// Raise TPL to prevent recursion from EFI timer interrupts
|
||||||
//
|
//
|
||||||
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
|
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
|
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
|
||||||
//
|
//
|
||||||
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
|
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
|
||||||
Handle = GetDebugPortHandle ();
|
Handle = GetDebugPortHandle ();
|
||||||
|
|
||||||
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
|
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
|
||||||
if (*BufferSize == 0) {
|
if (*BufferSize == 0) {
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
@ -598,14 +598,14 @@ SerialWrite (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Restore Debug Timer interrupt
|
// Restore Debug Timer interrupt
|
||||||
//
|
//
|
||||||
SaveAndSetDebugTimerInterrupt (DebugTimerInterruptState);
|
SaveAndSetDebugTimerInterrupt (DebugTimerInterruptState);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Restore to original TPL
|
// Restore to original TPL
|
||||||
//
|
//
|
||||||
gBS->RestoreTPL (Tpl);
|
gBS->RestoreTPL (Tpl);
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -643,13 +643,13 @@ SerialRead (
|
|||||||
// Raise TPL to prevent recursion from EFI timer interrupts
|
// Raise TPL to prevent recursion from EFI timer interrupts
|
||||||
//
|
//
|
||||||
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
|
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
|
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
|
||||||
//
|
//
|
||||||
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
|
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
|
||||||
Handle = GetDebugPortHandle ();
|
Handle = GetDebugPortHandle ();
|
||||||
|
|
||||||
Data8 = (UINT8 *) &DebugHeader;
|
Data8 = (UINT8 *) &DebugHeader;
|
||||||
Uint8Buffer = (UINT8 *)Buffer;
|
Uint8Buffer = (UINT8 *)Buffer;
|
||||||
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
|
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
|
||||||
@ -671,7 +671,7 @@ SerialRead (
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
//
|
//
|
||||||
// Read the input character from Debug Port
|
// Read the input character from Debug Port
|
||||||
//
|
//
|
||||||
if (!DebugPortPollBuffer (Handle)) {
|
if (!DebugPortPollBuffer (Handle)) {
|
||||||
break;
|
break;
|
||||||
@ -703,14 +703,14 @@ SerialRead (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Restore Debug Timer interrupt
|
// Restore Debug Timer interrupt
|
||||||
//
|
//
|
||||||
SaveAndSetDebugTimerInterrupt (DebugTimerInterruptState);
|
SaveAndSetDebugTimerInterrupt (DebugTimerInterruptState);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Restore to original TPL
|
// Restore to original TPL
|
||||||
//
|
//
|
||||||
gBS->RestoreTPL (Tpl);
|
gBS->RestoreTPL (Tpl);
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -757,7 +757,7 @@ DebugReadBreakFromDebugPort (
|
|||||||
DebugAgentMsgPrint (DEBUG_AGENT_INFO, "Debug Timer attach symbol received %x", *Data8);
|
DebugAgentMsgPrint (DEBUG_AGENT_INFO, "Debug Timer attach symbol received %x", *Data8);
|
||||||
*BreakSymbol = *Data8;
|
*BreakSymbol = *Data8;
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
if (*Data8 == DEBUG_STARTING_SYMBOL_NORMAL) {
|
if (*Data8 == DEBUG_STARTING_SYMBOL_NORMAL) {
|
||||||
Status = ReadRemainingBreakPacket (Handle, &DebugHeader);
|
Status = ReadRemainingBreakPacket (Handle, &DebugHeader);
|
||||||
if (Status == EFI_SUCCESS) {
|
if (Status == EFI_SUCCESS) {
|
||||||
@ -775,7 +775,7 @@ DebugReadBreakFromDebugPort (
|
|||||||
DebugTerminalFifoAdd (&mSerialFifoForTerminal, *Data8);
|
DebugTerminalFifoAdd (&mSerialFifoForTerminal, *Data8);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_NOT_FOUND;
|
return EFI_NOT_FOUND;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -93,7 +93,7 @@
|
|||||||
|
|
||||||
[Protocols]
|
[Protocols]
|
||||||
gEfiSerialIoProtocolGuid ## SOMETIMES_PRODUCES
|
gEfiSerialIoProtocolGuid ## SOMETIMES_PRODUCES
|
||||||
gEfiDevicePathProtocolGuid ## SOMETIMES_PRODUCES
|
gEfiDevicePathProtocolGuid ## SOMETIMES_PRODUCES
|
||||||
|
|
||||||
[Pcd]
|
[Pcd]
|
||||||
gEfiMdePkgTokenSpaceGuid.PcdFSBClock ## SOMETIMES_CONSUMES
|
gEfiMdePkgTokenSpaceGuid.PcdFSBClock ## SOMETIMES_CONSUMES
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Debug Agent library implementition.
|
Debug Agent library implementition.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -77,7 +77,7 @@ GetMailboxFromHob (
|
|||||||
)
|
)
|
||||||
{
|
{
|
||||||
EFI_HOB_GUID_TYPE *GuidHob;
|
EFI_HOB_GUID_TYPE *GuidHob;
|
||||||
UINT64 *MailboxLocation;
|
UINT64 *MailboxLocation;
|
||||||
DEBUG_AGENT_MAILBOX *Mailbox;
|
DEBUG_AGENT_MAILBOX *Mailbox;
|
||||||
|
|
||||||
GuidHob = GetFirstGuidHob (&gEfiDebugAgentGuid);
|
GuidHob = GetFirstGuidHob (&gEfiDebugAgentGuid);
|
||||||
@ -87,7 +87,7 @@ GetMailboxFromHob (
|
|||||||
MailboxLocation = (UINT64 *) (GET_GUID_HOB_DATA(GuidHob));
|
MailboxLocation = (UINT64 *) (GET_GUID_HOB_DATA(GuidHob));
|
||||||
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
|
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
|
||||||
VerifyMailboxChecksum (Mailbox);
|
VerifyMailboxChecksum (Mailbox);
|
||||||
|
|
||||||
return Mailbox;
|
return Mailbox;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -224,7 +224,7 @@ InitializeDebugAgent (
|
|||||||
//
|
//
|
||||||
// Check if Debug Agent initialized in SEC/PEI phase
|
// Check if Debug Agent initialized in SEC/PEI phase
|
||||||
//
|
//
|
||||||
Mailbox = GetMailboxFromHob ();
|
Mailbox = GetMailboxFromHob ();
|
||||||
if (Mailbox != NULL) {
|
if (Mailbox != NULL) {
|
||||||
mMailboxPointer = Mailbox;
|
mMailboxPointer = Mailbox;
|
||||||
break;
|
break;
|
||||||
@ -237,7 +237,7 @@ InitializeDebugAgent (
|
|||||||
//
|
//
|
||||||
// Save original IDT entries
|
// Save original IDT entries
|
||||||
//
|
//
|
||||||
AsmReadIdtr (&IdtDescriptor);
|
AsmReadIdtr (&IdtDescriptor);
|
||||||
CopyMem (&IdtEntry, (VOID *)IdtDescriptor.Base, 33 * sizeof(IA32_IDT_GATE_DESCRIPTOR));
|
CopyMem (&IdtEntry, (VOID *)IdtDescriptor.Base, 33 * sizeof(IA32_IDT_GATE_DESCRIPTOR));
|
||||||
//
|
//
|
||||||
// Initialized Debug Agent
|
// Initialized Debug Agent
|
||||||
@ -269,11 +269,11 @@ InitializeDebugAgent (
|
|||||||
}
|
}
|
||||||
//
|
//
|
||||||
// Find and report PE/COFF image info to HOST
|
// Find and report PE/COFF image info to HOST
|
||||||
//
|
//
|
||||||
FindAndReportModuleImageInfo (SIZE_4KB);
|
FindAndReportModuleImageInfo (SIZE_4KB);
|
||||||
//
|
//
|
||||||
// Restore saved IDT entries
|
// Restore saved IDT entries
|
||||||
//
|
//
|
||||||
CopyMem ((VOID *)IdtDescriptor.Base, &IdtEntry, 33 * sizeof(IA32_IDT_GATE_DESCRIPTOR));
|
CopyMem ((VOID *)IdtDescriptor.Base, &IdtEntry, 33 * sizeof(IA32_IDT_GATE_DESCRIPTOR));
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@ -381,12 +381,12 @@ InitializeDebugAgent (
|
|||||||
|
|
||||||
default:
|
default:
|
||||||
//
|
//
|
||||||
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
|
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
|
||||||
// Debug Agent library instance.
|
// Debug Agent library instance.
|
||||||
//
|
//
|
||||||
DEBUG ((EFI_D_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
|
DEBUG ((EFI_D_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
|
||||||
CpuDeadLoop ();
|
CpuDeadLoop ();
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Debug Port Library implementation based on serial port.
|
Debug Port Library implementation based on serial port.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -65,7 +65,7 @@ DebugPortInitialize (
|
|||||||
|
|
||||||
Status = SerialPortInitialize ();
|
Status = SerialPortInitialize ();
|
||||||
if (RETURN_ERROR(Status)) {
|
if (RETURN_ERROR(Status)) {
|
||||||
DEBUG ((EFI_D_ERROR, "Debug Serial Port: Initialization failed!\n"));
|
DEBUG ((EFI_D_ERROR, "Debug Serial Port: Initialization failed!\n"));
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Function != NULL) {
|
if (Function != NULL) {
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Debug Port Library implementation based on usb debug port.
|
Debug Port Library implementation based on usb debug port.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -191,7 +191,7 @@ CalculateUsbDebugPortBar (
|
|||||||
|
|
||||||
VendorId = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_VENDOR_ID_OFFSET);
|
VendorId = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_VENDOR_ID_OFFSET);
|
||||||
DeviceId = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_DEVICE_ID_OFFSET);
|
DeviceId = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_DEVICE_ID_OFFSET);
|
||||||
|
|
||||||
if ((VendorId == 0xFFFF) || (DeviceId == 0xFFFF)) {
|
if ((VendorId == 0xFFFF) || (DeviceId == 0xFFFF)) {
|
||||||
return RETURN_UNSUPPORTED;
|
return RETURN_UNSUPPORTED;
|
||||||
}
|
}
|
||||||
@ -199,7 +199,7 @@ CalculateUsbDebugPortBar (
|
|||||||
ProgInterface = PciRead8 (PcdGet32(PcdUsbEhciPciAddress) + PCI_CLASSCODE_OFFSET);
|
ProgInterface = PciRead8 (PcdGet32(PcdUsbEhciPciAddress) + PCI_CLASSCODE_OFFSET);
|
||||||
SubClassCode = PciRead8 (PcdGet32(PcdUsbEhciPciAddress) + PCI_CLASSCODE_OFFSET + 1);
|
SubClassCode = PciRead8 (PcdGet32(PcdUsbEhciPciAddress) + PCI_CLASSCODE_OFFSET + 1);
|
||||||
BaseCode = PciRead8 (PcdGet32(PcdUsbEhciPciAddress) + PCI_CLASSCODE_OFFSET + 2);
|
BaseCode = PciRead8 (PcdGet32(PcdUsbEhciPciAddress) + PCI_CLASSCODE_OFFSET + 2);
|
||||||
|
|
||||||
if ((ProgInterface != PCI_IF_EHCI) || (SubClassCode != PCI_CLASS_SERIAL_USB) || (BaseCode != PCI_CLASS_SERIAL)) {
|
if ((ProgInterface != PCI_IF_EHCI) || (SubClassCode != PCI_CLASS_SERIAL_USB) || (BaseCode != PCI_CLASS_SERIAL)) {
|
||||||
return RETURN_UNSUPPORTED;
|
return RETURN_UNSUPPORTED;
|
||||||
}
|
}
|
||||||
@ -312,7 +312,7 @@ UsbDebugPortIn (
|
|||||||
return RETURN_DEVICE_ERROR;
|
return RETURN_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Clearing DONE bit by writing 1
|
// Clearing DONE bit by writing 1
|
||||||
//
|
//
|
||||||
@ -413,7 +413,7 @@ UsbDebugPortOut (
|
|||||||
return RETURN_DEVICE_ERROR;
|
return RETURN_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Clearing DONE bit by writing 1
|
// Clearing DONE bit by writing 1
|
||||||
//
|
//
|
||||||
@ -747,7 +747,7 @@ InitializeUsbDebugHardware (
|
|||||||
Handle->Initialized = USBDBG_NO_DBG_CAB;
|
Handle->Initialized = USBDBG_NO_DBG_CAB;
|
||||||
return Status;
|
return Status;
|
||||||
}
|
}
|
||||||
|
|
||||||
Handle->Initialized = USBDBG_DBG_CAB;
|
Handle->Initialized = USBDBG_DBG_CAB;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1053,7 +1053,7 @@ DebugPortInitialize (
|
|||||||
USB_DEBUG_PORT_HANDLE Handle;
|
USB_DEBUG_PORT_HANDLE Handle;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Validate the PCD PcdDebugPortHandleBufferSize value
|
// Validate the PCD PcdDebugPortHandleBufferSize value
|
||||||
//
|
//
|
||||||
ASSERT (PcdGet16 (PcdDebugPortHandleBufferSize) == sizeof (USB_DEBUG_PORT_HANDLE));
|
ASSERT (PcdGet16 (PcdDebugPortHandleBufferSize) == sizeof (USB_DEBUG_PORT_HANDLE));
|
||||||
|
|
||||||
|
@ -46,7 +46,7 @@ UINT16 mSerialNumberStrDesc[] = {
|
|||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
XhcSetR32Bit(
|
XhcSetR32Bit(
|
||||||
IN OUT UINTN Register,
|
IN OUT UINTN Register,
|
||||||
IN UINT32 BitMask
|
IN UINT32 BitMask
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
@ -65,7 +65,7 @@ XhcSetR32Bit(
|
|||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
XhcClearR32Bit(
|
XhcClearR32Bit(
|
||||||
IN OUT UINTN Register,
|
IN OUT UINTN Register,
|
||||||
IN UINT32 BitMask
|
IN UINT32 BitMask
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
@ -92,10 +92,10 @@ XhcWriteDebugReg (
|
|||||||
)
|
)
|
||||||
{
|
{
|
||||||
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
|
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
|
||||||
|
|
||||||
DebugCapabilityBase = Handle->DebugCapabilityBase;
|
DebugCapabilityBase = Handle->DebugCapabilityBase;
|
||||||
MmioWrite32 ((UINTN)(DebugCapabilityBase + Offset), Data);
|
MmioWrite32 ((UINTN)(DebugCapabilityBase + Offset), Data);
|
||||||
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -116,7 +116,7 @@ XhcReadDebugReg (
|
|||||||
{
|
{
|
||||||
UINT32 Data;
|
UINT32 Data;
|
||||||
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
|
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
|
||||||
|
|
||||||
DebugCapabilityBase = Handle->DebugCapabilityBase;
|
DebugCapabilityBase = Handle->DebugCapabilityBase;
|
||||||
Data = MmioRead32 ((UINTN)(DebugCapabilityBase + Offset));
|
Data = MmioRead32 ((UINTN)(DebugCapabilityBase + Offset));
|
||||||
|
|
||||||
@ -182,7 +182,7 @@ ProgramXhciBaseAddress (
|
|||||||
UINT32 Low;
|
UINT32 Low;
|
||||||
UINT32 High;
|
UINT32 High;
|
||||||
EFI_PHYSICAL_ADDRESS XhciMmioBase;
|
EFI_PHYSICAL_ADDRESS XhciMmioBase;
|
||||||
|
|
||||||
Low = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET);
|
Low = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET);
|
||||||
High = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET + 4);
|
High = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET + 4);
|
||||||
XhciMmioBase = (EFI_PHYSICAL_ADDRESS) (LShiftU64 ((UINT64) High, 32) | Low);
|
XhciMmioBase = (EFI_PHYSICAL_ADDRESS) (LShiftU64 ((UINT64) High, 32) | Low);
|
||||||
@ -263,7 +263,7 @@ CalculateUsbDebugPortMmioBase (
|
|||||||
|
|
||||||
VendorId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_VENDOR_ID_OFFSET);
|
VendorId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_VENDOR_ID_OFFSET);
|
||||||
DeviceId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_DEVICE_ID_OFFSET);
|
DeviceId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_DEVICE_ID_OFFSET);
|
||||||
|
|
||||||
if ((VendorId == 0xFFFF) || (DeviceId == 0xFFFF)) {
|
if ((VendorId == 0xFFFF) || (DeviceId == 0xFFFF)) {
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
@ -271,7 +271,7 @@ CalculateUsbDebugPortMmioBase (
|
|||||||
ProgInterface = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET);
|
ProgInterface = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET);
|
||||||
SubClassCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 1);
|
SubClassCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 1);
|
||||||
BaseCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 2);
|
BaseCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 2);
|
||||||
|
|
||||||
if ((ProgInterface != PCI_IF_XHCI) || (SubClassCode != PCI_CLASS_SERIAL_USB) || (BaseCode != PCI_CLASS_SERIAL)) {
|
if ((ProgInterface != PCI_IF_XHCI) || (SubClassCode != PCI_CLASS_SERIAL_USB) || (BaseCode != PCI_CLASS_SERIAL)) {
|
||||||
goto Done;
|
goto Done;
|
||||||
}
|
}
|
||||||
@ -282,7 +282,7 @@ CalculateUsbDebugPortMmioBase (
|
|||||||
// Get capability pointer from HCCPARAMS at offset 0x10
|
// Get capability pointer from HCCPARAMS at offset 0x10
|
||||||
//
|
//
|
||||||
CapabilityPointer = Handle->XhciMmioBase + (MmioRead32 ((UINTN)(Handle->XhciMmioBase + XHC_HCCPARAMS_OFFSET)) >> 16) * 4;
|
CapabilityPointer = Handle->XhciMmioBase + (MmioRead32 ((UINTN)(Handle->XhciMmioBase + XHC_HCCPARAMS_OFFSET)) >> 16) * 4;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Search XHCI debug capability
|
// Search XHCI debug capability
|
||||||
//
|
//
|
||||||
@ -377,7 +377,7 @@ CreateEventRing (
|
|||||||
EVENT_RING_SEG_TABLE_ENTRY *ERSTBase;
|
EVENT_RING_SEG_TABLE_ENTRY *ERSTBase;
|
||||||
|
|
||||||
ASSERT (EventRing != NULL);
|
ASSERT (EventRing != NULL);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Allocate Event Ring
|
// Allocate Event Ring
|
||||||
//
|
//
|
||||||
@ -390,7 +390,7 @@ CreateEventRing (
|
|||||||
EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
|
EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
|
||||||
EventRing->EventRingDequeue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
|
EventRing->EventRingDequeue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
|
||||||
EventRing->EventRingEnqueue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
|
EventRing->EventRingEnqueue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Software maintains an Event Ring Consumer Cycle State (CCS) bit, initializing it to '1'
|
// Software maintains an Event Ring Consumer Cycle State (CCS) bit, initializing it to '1'
|
||||||
// and toggling it every time the Event Ring Dequeue Pointer wraps back to the beginning of the Event Ring.
|
// and toggling it every time the Event Ring Dequeue Pointer wraps back to the beginning of the Event Ring.
|
||||||
@ -473,7 +473,7 @@ CreateTransferRing (
|
|||||||
{
|
{
|
||||||
VOID *Buf;
|
VOID *Buf;
|
||||||
LINK_TRB *EndTrb;
|
LINK_TRB *EndTrb;
|
||||||
|
|
||||||
Buf = AllocateAlignBuffer (sizeof (TRB_TEMPLATE) * TrbNum);
|
Buf = AllocateAlignBuffer (sizeof (TRB_TEMPLATE) * TrbNum);
|
||||||
ASSERT (Buf != NULL);
|
ASSERT (Buf != NULL);
|
||||||
ASSERT (((UINTN) Buf & 0xF) == 0);
|
ASSERT (((UINTN) Buf & 0xF) == 0);
|
||||||
@ -523,7 +523,7 @@ CreateDebugCapabilityContext (
|
|||||||
UINT8 *ManufacturerStrDesc;
|
UINT8 *ManufacturerStrDesc;
|
||||||
UINT8 *ProductStrDesc;
|
UINT8 *ProductStrDesc;
|
||||||
UINT8 *SerialNumberStrDesc;
|
UINT8 *SerialNumberStrDesc;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Allocate debug device context
|
// Allocate debug device context
|
||||||
//
|
//
|
||||||
@ -531,10 +531,10 @@ CreateDebugCapabilityContext (
|
|||||||
ASSERT (Buf != NULL);
|
ASSERT (Buf != NULL);
|
||||||
ASSERT (((UINTN) Buf & 0xF) == 0);
|
ASSERT (((UINTN) Buf & 0xF) == 0);
|
||||||
ZeroMem (Buf, sizeof (XHC_DC_CONTEXT));
|
ZeroMem (Buf, sizeof (XHC_DC_CONTEXT));
|
||||||
|
|
||||||
DebugCapabilityContext = (XHC_DC_CONTEXT *)(UINTN) Buf;
|
DebugCapabilityContext = (XHC_DC_CONTEXT *)(UINTN) Buf;
|
||||||
Handle->DebugCapabilityContext = (EFI_PHYSICAL_ADDRESS)(UINTN) DebugCapabilityContext;
|
Handle->DebugCapabilityContext = (EFI_PHYSICAL_ADDRESS)(UINTN) DebugCapabilityContext;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Initialize DbcInfoContext.
|
// Initialize DbcInfoContext.
|
||||||
//
|
//
|
||||||
@ -550,7 +550,7 @@ CreateDebugCapabilityContext (
|
|||||||
DebugCapabilityContext->EpOutContext.EPType = ED_BULK_OUT;
|
DebugCapabilityContext->EpOutContext.EPType = ED_BULK_OUT;
|
||||||
DebugCapabilityContext->EpOutContext.MaxPacketSize = XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
|
DebugCapabilityContext->EpOutContext.MaxPacketSize = XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
|
||||||
DebugCapabilityContext->EpOutContext.AverageTRBLength = 0x1000;
|
DebugCapabilityContext->EpOutContext.AverageTRBLength = 0x1000;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Initialize EpInContext.
|
// Initialize EpInContext.
|
||||||
//
|
//
|
||||||
@ -558,7 +558,7 @@ CreateDebugCapabilityContext (
|
|||||||
DebugCapabilityContext->EpInContext.EPType = ED_BULK_IN;
|
DebugCapabilityContext->EpInContext.EPType = ED_BULK_IN;
|
||||||
DebugCapabilityContext->EpInContext.MaxPacketSize = XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
|
DebugCapabilityContext->EpInContext.MaxPacketSize = XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
|
||||||
DebugCapabilityContext->EpInContext.AverageTRBLength = 0x1000;
|
DebugCapabilityContext->EpInContext.AverageTRBLength = 0x1000;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Update string descriptor address
|
// Update string descriptor address
|
||||||
//
|
//
|
||||||
@ -567,19 +567,19 @@ CreateDebugCapabilityContext (
|
|||||||
ZeroMem (String0Desc, STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN);
|
ZeroMem (String0Desc, STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN);
|
||||||
CopyMem (String0Desc, mString0Desc, STRING0_DESC_LEN);
|
CopyMem (String0Desc, mString0Desc, STRING0_DESC_LEN);
|
||||||
DebugCapabilityContext->DbcInfoContext.String0DescAddress = (UINT64)(UINTN)String0Desc;
|
DebugCapabilityContext->DbcInfoContext.String0DescAddress = (UINT64)(UINTN)String0Desc;
|
||||||
|
|
||||||
ManufacturerStrDesc = String0Desc + STRING0_DESC_LEN;
|
ManufacturerStrDesc = String0Desc + STRING0_DESC_LEN;
|
||||||
CopyMem (ManufacturerStrDesc, mManufacturerStrDesc, MANU_DESC_LEN);
|
CopyMem (ManufacturerStrDesc, mManufacturerStrDesc, MANU_DESC_LEN);
|
||||||
DebugCapabilityContext->DbcInfoContext.ManufacturerStrDescAddress = (UINT64)(UINTN)ManufacturerStrDesc;
|
DebugCapabilityContext->DbcInfoContext.ManufacturerStrDescAddress = (UINT64)(UINTN)ManufacturerStrDesc;
|
||||||
|
|
||||||
ProductStrDesc = ManufacturerStrDesc + MANU_DESC_LEN;
|
ProductStrDesc = ManufacturerStrDesc + MANU_DESC_LEN;
|
||||||
CopyMem (ProductStrDesc, mProductStrDesc, PRODUCT_DESC_LEN);
|
CopyMem (ProductStrDesc, mProductStrDesc, PRODUCT_DESC_LEN);
|
||||||
DebugCapabilityContext->DbcInfoContext.ProductStrDescAddress = (UINT64)(UINTN)ProductStrDesc;
|
DebugCapabilityContext->DbcInfoContext.ProductStrDescAddress = (UINT64)(UINTN)ProductStrDesc;
|
||||||
|
|
||||||
SerialNumberStrDesc = ProductStrDesc + PRODUCT_DESC_LEN;
|
SerialNumberStrDesc = ProductStrDesc + PRODUCT_DESC_LEN;
|
||||||
CopyMem (SerialNumberStrDesc, mSerialNumberStrDesc, SERIAL_DESC_LEN);
|
CopyMem (SerialNumberStrDesc, mSerialNumberStrDesc, SERIAL_DESC_LEN);
|
||||||
DebugCapabilityContext->DbcInfoContext.SerialNumberStrDescAddress = (UINT64)(UINTN)SerialNumberStrDesc;
|
DebugCapabilityContext->DbcInfoContext.SerialNumberStrDescAddress = (UINT64)(UINTN)SerialNumberStrDesc;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Allocate and initialize the Transfer Ring for the Input Endpoint Context.
|
// Allocate and initialize the Transfer Ring for the Input Endpoint Context.
|
||||||
//
|
//
|
||||||
@ -687,7 +687,7 @@ InitializeUsbDebugHardware (
|
|||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
//
|
//
|
||||||
// If XHCI supports debug capability, hardware resource has been allocated,
|
// If XHCI supports debug capability, hardware resource has been allocated,
|
||||||
// but it has not been enabled, try to enable again.
|
// but it has not been enabled, try to enable again.
|
||||||
//
|
//
|
||||||
goto Enable;
|
goto Enable;
|
||||||
@ -708,7 +708,7 @@ InitializeUsbDebugHardware (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Reset port to get debug device discovered
|
// Reset port to get debug device discovered
|
||||||
//
|
//
|
||||||
for (Index = 0; Index < TotalUsb3Port; Index++) {
|
for (Index = 0; Index < TotalUsb3Port; Index++) {
|
||||||
XhcSetR32Bit ((UINTN)XhciOpRegister + XHC_PORTSC_OFFSET + Index * 0x10, BIT4);
|
XhcSetR32Bit ((UINTN)XhciOpRegister + XHC_PORTSC_OFFSET + Index * 0x10, BIT4);
|
||||||
MicroSecondDelay (10 * 1000);
|
MicroSecondDelay (10 * 1000);
|
||||||
@ -727,20 +727,20 @@ InitializeUsbDebugHardware (
|
|||||||
Handle->UrbIn.Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer;
|
Handle->UrbIn.Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer;
|
||||||
Handle->Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
|
Handle->Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
|
||||||
Handle->UrbOut.Data = Handle->UrbIn.Data + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE * 2;
|
Handle->UrbOut.Data = Handle->UrbIn.Data + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE * 2;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Initialize event ring
|
// Initialize event ring
|
||||||
//
|
//
|
||||||
ZeroMem (&Handle->EventRing, sizeof (EVENT_RING));
|
ZeroMem (&Handle->EventRing, sizeof (EVENT_RING));
|
||||||
Status = CreateEventRing (Handle, &Handle->EventRing);
|
Status = CreateEventRing (Handle, &Handle->EventRing);
|
||||||
ASSERT_EFI_ERROR (Status);
|
ASSERT_EFI_ERROR (Status);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Init IN and OUT endpoint context
|
// Init IN and OUT endpoint context
|
||||||
//
|
//
|
||||||
Status = CreateDebugCapabilityContext (Handle);
|
Status = CreateDebugCapabilityContext (Handle);
|
||||||
ASSERT_EFI_ERROR (Status);
|
ASSERT_EFI_ERROR (Status);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Init DCDDI1 and DCDDI2
|
// Init DCDDI1 and DCDDI2
|
||||||
//
|
//
|
||||||
@ -748,7 +748,7 @@ InitializeUsbDebugHardware (
|
|||||||
Handle,
|
Handle,
|
||||||
XHC_DC_DCDDI1,
|
XHC_DC_DCDDI1,
|
||||||
(UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) | XHCI_DEBUG_DEVICE_PROTOCOL)
|
(UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) | XHCI_DEBUG_DEVICE_PROTOCOL)
|
||||||
);
|
);
|
||||||
|
|
||||||
XhcWriteDebugReg (
|
XhcWriteDebugReg (
|
||||||
Handle,
|
Handle,
|
||||||
@ -759,7 +759,7 @@ InitializeUsbDebugHardware (
|
|||||||
Enable:
|
Enable:
|
||||||
if ((Handle->Initialized == USB3DBG_NOT_ENABLED) && (!Handle->ChangePortPower)) {
|
if ((Handle->Initialized == USB3DBG_NOT_ENABLED) && (!Handle->ChangePortPower)) {
|
||||||
//
|
//
|
||||||
// If the first time detection is failed, turn port power off and on in order to
|
// If the first time detection is failed, turn port power off and on in order to
|
||||||
// reset port status this time, then try to check if debug device is ready again.
|
// reset port status this time, then try to check if debug device is ready again.
|
||||||
//
|
//
|
||||||
for (Index = 0; Index < TotalUsb3Port; Index++) {
|
for (Index = 0; Index < TotalUsb3Port; Index++) {
|
||||||
@ -775,9 +775,9 @@ Enable:
|
|||||||
// Set DCE bit and LSE bit to "1" in DCCTRL in first initialization
|
// Set DCE bit and LSE bit to "1" in DCCTRL in first initialization
|
||||||
//
|
//
|
||||||
XhcSetDebugRegBit (Handle, XHC_DC_DCCTRL, BIT1|BIT31);
|
XhcSetDebugRegBit (Handle, XHC_DC_DCCTRL, BIT1|BIT31);
|
||||||
|
|
||||||
XhcDetectDebugCapabilityReady (Handle);
|
XhcDetectDebugCapabilityReady (Handle);
|
||||||
|
|
||||||
Status = RETURN_SUCCESS;
|
Status = RETURN_SUCCESS;
|
||||||
if (!Handle->Ready) {
|
if (!Handle->Ready) {
|
||||||
Handle->Initialized = USB3DBG_NOT_ENABLED;
|
Handle->Initialized = USB3DBG_NOT_ENABLED;
|
||||||
@ -823,7 +823,7 @@ DiscoverInitializeUsbDebugPort (
|
|||||||
|
|
||||||
@param[in] Instance Debug port instance.
|
@param[in] Instance Debug port instance.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
SetUsb3DebugPortInstance (
|
SetUsb3DebugPortInstance (
|
||||||
IN USB3_DEBUG_PORT_HANDLE *Instance
|
IN USB3_DEBUG_PORT_HANDLE *Instance
|
||||||
@ -839,7 +839,7 @@ SetUsb3DebugPortInstance (
|
|||||||
/**
|
/**
|
||||||
Return USB3 debug instance address.
|
Return USB3 debug instance address.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
USB3_DEBUG_PORT_HANDLE *
|
USB3_DEBUG_PORT_HANDLE *
|
||||||
GetUsb3DebugPortInstance (
|
GetUsb3DebugPortInstance (
|
||||||
VOID
|
VOID
|
||||||
@ -1010,7 +1010,7 @@ DebugPortWriteBuffer (
|
|||||||
XhcDataTransfer (UsbDebugPortHandle, EfiUsbDataOut, Buffer + Total, &Sent, DATA_TRANSFER_WRITE_TIMEOUT);
|
XhcDataTransfer (UsbDebugPortHandle, EfiUsbDataOut, Buffer + Total, &Sent, DATA_TRANSFER_WRITE_TIMEOUT);
|
||||||
Total += Sent;
|
Total += Sent;
|
||||||
}
|
}
|
||||||
|
|
||||||
return Total;
|
return Total;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1123,7 +1123,7 @@ DebugPortInitialize (
|
|||||||
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
|
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Validate the PCD PcdDebugPortHandleBufferSize value
|
// Validate the PCD PcdDebugPortHandleBufferSize value
|
||||||
//
|
//
|
||||||
ASSERT (PcdGet16 (PcdDebugPortHandleBufferSize) == sizeof (USB3_DEBUG_PORT_HANDLE));
|
ASSERT (PcdGet16 (PcdDebugPortHandleBufferSize) == sizeof (USB3_DEBUG_PORT_HANDLE));
|
||||||
|
|
||||||
|
@ -280,7 +280,7 @@ Usb3PciIoNotify (
|
|||||||
);
|
);
|
||||||
if (!EFI_ERROR (Status) &&
|
if (!EFI_ERROR (Status) &&
|
||||||
(PciIoHandleBuffer != NULL) &&
|
(PciIoHandleBuffer != NULL) &&
|
||||||
(PciIoHandleCount != 0)) {
|
(PciIoHandleCount != 0)) {
|
||||||
for (Index = 0; Index < PciIoHandleCount; Index++) {
|
for (Index = 0; Index < PciIoHandleCount; Index++) {
|
||||||
Status = gBS->HandleProtocol (
|
Status = gBS->HandleProtocol (
|
||||||
PciIoHandleBuffer[Index],
|
PciIoHandleBuffer[Index],
|
||||||
@ -327,7 +327,7 @@ Usb3PciIoNotify (
|
|||||||
/**
|
/**
|
||||||
Return USB3 debug instance address pointer.
|
Return USB3 debug instance address pointer.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
EFI_PHYSICAL_ADDRESS *
|
EFI_PHYSICAL_ADDRESS *
|
||||||
GetUsb3DebugPortInstanceAddrPtr (
|
GetUsb3DebugPortInstanceAddrPtr (
|
||||||
VOID
|
VOID
|
||||||
@ -391,7 +391,7 @@ Usb3AllocateDmaBuffer (
|
|||||||
Allocate aligned memory for XHC's usage.
|
Allocate aligned memory for XHC's usage.
|
||||||
|
|
||||||
@param BufferSize The size, in bytes, of the Buffer.
|
@param BufferSize The size, in bytes, of the Buffer.
|
||||||
|
|
||||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -403,9 +403,9 @@ AllocateAlignBuffer (
|
|||||||
EFI_PHYSICAL_ADDRESS TmpAddr;
|
EFI_PHYSICAL_ADDRESS TmpAddr;
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
VOID *Buf;
|
VOID *Buf;
|
||||||
|
|
||||||
Buf = NULL;
|
Buf = NULL;
|
||||||
|
|
||||||
if (gBS != NULL) {
|
if (gBS != NULL) {
|
||||||
if (mUsb3PciIo != NULL) {
|
if (mUsb3PciIo != NULL) {
|
||||||
Usb3AllocateDmaBuffer (
|
Usb3AllocateDmaBuffer (
|
||||||
|
@ -50,7 +50,7 @@
|
|||||||
# The format of pci address please refer to SourceLevelDebugPkg.dec
|
# The format of pci address please refer to SourceLevelDebugPkg.dec
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress ## CONSUMES
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress ## CONSUMES
|
||||||
|
|
||||||
# Per XHCI spec, software shall impose a timeout between the detection of the Debug Host
|
# Per XHCI spec, software shall impose a timeout between the detection of the Debug Host
|
||||||
# connection and the DbC Run transition to 1. This PCD specifies the timeout value in microsecond.
|
# connection and the DbC Run transition to 1. This PCD specifies the timeout value in microsecond.
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout ## SOMETIMES_CONSUMES
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout ## SOMETIMES_CONSUMES
|
||||||
|
|
||||||
|
@ -248,12 +248,12 @@ typedef struct _ENDPOINT_CONTEXT_64 {
|
|||||||
UINT32 RsvdZ5; // Reserved
|
UINT32 RsvdZ5; // Reserved
|
||||||
UINT32 RsvdZ6;
|
UINT32 RsvdZ6;
|
||||||
UINT32 RsvdZ7;
|
UINT32 RsvdZ7;
|
||||||
|
|
||||||
UINT32 RsvdZ8;
|
UINT32 RsvdZ8;
|
||||||
UINT32 RsvdZ9;
|
UINT32 RsvdZ9;
|
||||||
UINT32 RsvdZ10;
|
UINT32 RsvdZ10;
|
||||||
UINT32 RsvdZ11;
|
UINT32 RsvdZ11;
|
||||||
|
|
||||||
UINT32 RsvdZ12;
|
UINT32 RsvdZ12;
|
||||||
UINT32 RsvdZ13;
|
UINT32 RsvdZ13;
|
||||||
UINT32 RsvdZ14;
|
UINT32 RsvdZ14;
|
||||||
@ -396,7 +396,7 @@ typedef struct _DBC_INFO_CONTEXT {
|
|||||||
UINT64 RsvdZ1:32;
|
UINT64 RsvdZ1:32;
|
||||||
UINT64 RsvdZ2;
|
UINT64 RsvdZ2;
|
||||||
UINT64 RsvdZ3;
|
UINT64 RsvdZ3;
|
||||||
UINT64 RsvdZ4;
|
UINT64 RsvdZ4;
|
||||||
} DBC_INFO_CONTEXT;
|
} DBC_INFO_CONTEXT;
|
||||||
|
|
||||||
//
|
//
|
||||||
@ -460,7 +460,7 @@ typedef struct _USB3_DEBUG_PORT_INSTANCE {
|
|||||||
// The flag indicates debug capability is supported
|
// The flag indicates debug capability is supported
|
||||||
//
|
//
|
||||||
BOOLEAN DebugSupport;
|
BOOLEAN DebugSupport;
|
||||||
|
|
||||||
//
|
//
|
||||||
// The flag indicates debug device is ready
|
// The flag indicates debug device is ready
|
||||||
//
|
//
|
||||||
@ -483,7 +483,7 @@ typedef struct _USB3_DEBUG_PORT_INSTANCE {
|
|||||||
|
|
||||||
//
|
//
|
||||||
// The flag indicates if USB 3.0 ports has been turn off/on power
|
// The flag indicates if USB 3.0 ports has been turn off/on power
|
||||||
//
|
//
|
||||||
BOOLEAN ChangePortPower;
|
BOOLEAN ChangePortPower;
|
||||||
|
|
||||||
//
|
//
|
||||||
@ -493,24 +493,24 @@ typedef struct _USB3_DEBUG_PORT_INSTANCE {
|
|||||||
|
|
||||||
//
|
//
|
||||||
// XHCI OP RegisterBase address
|
// XHCI OP RegisterBase address
|
||||||
//
|
//
|
||||||
EFI_PHYSICAL_ADDRESS XhciOpRegister;
|
EFI_PHYSICAL_ADDRESS XhciOpRegister;
|
||||||
|
|
||||||
//
|
//
|
||||||
// XHCI Debug Register Base Address
|
// XHCI Debug Register Base Address
|
||||||
//
|
//
|
||||||
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
|
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
|
||||||
|
|
||||||
//
|
//
|
||||||
// XHCI Debug Capability offset
|
// XHCI Debug Capability offset
|
||||||
//
|
//
|
||||||
UINT64 DebugCapabilityOffset;
|
UINT64 DebugCapabilityOffset;
|
||||||
|
|
||||||
//
|
//
|
||||||
// XHCI Debug Context Address
|
// XHCI Debug Context Address
|
||||||
//
|
//
|
||||||
EFI_PHYSICAL_ADDRESS DebugCapabilityContext;
|
EFI_PHYSICAL_ADDRESS DebugCapabilityContext;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Transfer Ring
|
// Transfer Ring
|
||||||
//
|
//
|
||||||
@ -521,7 +521,7 @@ typedef struct _USB3_DEBUG_PORT_INSTANCE {
|
|||||||
// EventRing
|
// EventRing
|
||||||
//
|
//
|
||||||
EVENT_RING EventRing;
|
EVENT_RING EventRing;
|
||||||
|
|
||||||
//
|
//
|
||||||
// URB - Read
|
// URB - Read
|
||||||
//
|
//
|
||||||
@ -573,7 +573,7 @@ XhcSetDebugRegBit (
|
|||||||
IN UINT32 Offset,
|
IN UINT32 Offset,
|
||||||
IN UINT32 Bit
|
IN UINT32 Bit
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Write the data to the debug register.
|
Write the data to the debug register.
|
||||||
|
|
||||||
@ -581,7 +581,7 @@ XhcSetDebugRegBit (
|
|||||||
@param Offset The offset of the debug register.
|
@param Offset The offset of the debug register.
|
||||||
@param Data The data to write.
|
@param Data The data to write.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
XhcWriteDebugReg (
|
XhcWriteDebugReg (
|
||||||
IN USB3_DEBUG_PORT_HANDLE *Handle,
|
IN USB3_DEBUG_PORT_HANDLE *Handle,
|
||||||
@ -596,12 +596,12 @@ XhcWriteDebugReg (
|
|||||||
@param[in] BitMask 32-bit mask
|
@param[in] BitMask 32-bit mask
|
||||||
|
|
||||||
@return BOOLEAN - TRUE if all bits specified by the mask are enabled.
|
@return BOOLEAN - TRUE if all bits specified by the mask are enabled.
|
||||||
- FALSE even if one of the bits specified by the mask
|
- FALSE even if one of the bits specified by the mask
|
||||||
is not enabled.
|
is not enabled.
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
BOOLEAN
|
||||||
XhcIsBitSet(
|
XhcIsBitSet(
|
||||||
UINTN Register,
|
UINTN Register,
|
||||||
UINT32 BitMask
|
UINT32 BitMask
|
||||||
);
|
);
|
||||||
|
|
||||||
@ -613,7 +613,7 @@ XhcIsBitSet(
|
|||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
XhcSetR32Bit(
|
XhcSetR32Bit(
|
||||||
UINTN Register,
|
UINTN Register,
|
||||||
UINT32 BitMask
|
UINT32 BitMask
|
||||||
);
|
);
|
||||||
|
|
||||||
@ -625,13 +625,13 @@ XhcSetR32Bit(
|
|||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
XhcClearR32Bit(
|
XhcClearR32Bit(
|
||||||
IN OUT UINTN Register,
|
IN OUT UINTN Register,
|
||||||
IN UINT32 BitMask
|
IN UINT32 BitMask
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Initialize USB3 debug port.
|
Initialize USB3 debug port.
|
||||||
|
|
||||||
This method invokes various internal functions to facilitate
|
This method invokes various internal functions to facilitate
|
||||||
detection and initialization of USB3 debug port.
|
detection and initialization of USB3 debug port.
|
||||||
|
|
||||||
@ -656,7 +656,7 @@ GetXhciPciCommand (
|
|||||||
Allocate aligned memory for XHC's usage.
|
Allocate aligned memory for XHC's usage.
|
||||||
|
|
||||||
@param BufferSize The size, in bytes, of the Buffer.
|
@param BufferSize The size, in bytes, of the Buffer.
|
||||||
|
|
||||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
@ -667,7 +667,7 @@ AllocateAlignBuffer (
|
|||||||
|
|
||||||
/**
|
/**
|
||||||
The real function to initialize USB3 debug port.
|
The real function to initialize USB3 debug port.
|
||||||
|
|
||||||
This method invokes various internal functions to facilitate
|
This method invokes various internal functions to facilitate
|
||||||
detection and initialization of USB3 debug port.
|
detection and initialization of USB3 debug port.
|
||||||
|
|
||||||
@ -725,7 +725,7 @@ InitializeUsbDebugHardware (
|
|||||||
/**
|
/**
|
||||||
Return USB3 debug instance address pointer.
|
Return USB3 debug instance address pointer.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
EFI_PHYSICAL_ADDRESS *
|
EFI_PHYSICAL_ADDRESS *
|
||||||
GetUsb3DebugPortInstanceAddrPtr (
|
GetUsb3DebugPortInstanceAddrPtr (
|
||||||
VOID
|
VOID
|
||||||
@ -734,7 +734,7 @@ GetUsb3DebugPortInstanceAddrPtr (
|
|||||||
/**
|
/**
|
||||||
Return USB3 debug instance address.
|
Return USB3 debug instance address.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
USB3_DEBUG_PORT_HANDLE *
|
USB3_DEBUG_PORT_HANDLE *
|
||||||
GetUsb3DebugPortInstance (
|
GetUsb3DebugPortInstance (
|
||||||
VOID
|
VOID
|
||||||
|
@ -179,7 +179,7 @@ Usb3GetIoMmu (
|
|||||||
/**
|
/**
|
||||||
Return USB3 debug instance address pointer.
|
Return USB3 debug instance address pointer.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
EFI_PHYSICAL_ADDRESS *
|
EFI_PHYSICAL_ADDRESS *
|
||||||
GetUsb3DebugPortInstanceAddrPtr (
|
GetUsb3DebugPortInstanceAddrPtr (
|
||||||
VOID
|
VOID
|
||||||
@ -221,7 +221,7 @@ GetUsb3DebugPortInstanceAddrPtr (
|
|||||||
Allocate aligned memory for XHC's usage.
|
Allocate aligned memory for XHC's usage.
|
||||||
|
|
||||||
@param BufferSize The size, in bytes, of the Buffer.
|
@param BufferSize The size, in bytes, of the Buffer.
|
||||||
|
|
||||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
|
@ -52,7 +52,7 @@
|
|||||||
# The format of pci address please refer to SourceLevelDebugPkg.dec
|
# The format of pci address please refer to SourceLevelDebugPkg.dec
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress ## CONSUMES
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress ## CONSUMES
|
||||||
|
|
||||||
# Per XHCI spec, software shall impose a timeout between the detection of the Debug Host
|
# Per XHCI spec, software shall impose a timeout between the detection of the Debug Host
|
||||||
# connection and the DbC Run transition to 1. This PCD specifies the timeout value in microsecond.
|
# connection and the DbC Run transition to 1. This PCD specifies the timeout value in microsecond.
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout ## SOMETIMES_CONSUMES
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout ## SOMETIMES_CONSUMES
|
||||||
|
|
||||||
|
@ -41,7 +41,7 @@ XhcSyncTrsRing (
|
|||||||
TrsTrb = (TRB_TEMPLATE *)(UINTN) TrsRing->RingEnqueue;
|
TrsTrb = (TRB_TEMPLATE *)(UINTN) TrsRing->RingEnqueue;
|
||||||
|
|
||||||
ASSERT (TrsTrb != NULL);
|
ASSERT (TrsTrb != NULL);
|
||||||
|
|
||||||
for (Index = 0; Index < TrsRing->TrbNumber; Index++) {
|
for (Index = 0; Index < TrsRing->TrbNumber; Index++) {
|
||||||
if (TrsTrb->CycleBit != (TrsRing->RingPCS & BIT0)) {
|
if (TrsTrb->CycleBit != (TrsRing->RingPCS & BIT0)) {
|
||||||
break;
|
break;
|
||||||
@ -185,9 +185,9 @@ IsTrbInTrsRing (
|
|||||||
{
|
{
|
||||||
TRB_TEMPLATE *CheckedTrb;
|
TRB_TEMPLATE *CheckedTrb;
|
||||||
UINTN Index;
|
UINTN Index;
|
||||||
|
|
||||||
CheckedTrb = (TRB_TEMPLATE *)(UINTN) Ring->RingSeg0;
|
CheckedTrb = (TRB_TEMPLATE *)(UINTN) Ring->RingSeg0;
|
||||||
|
|
||||||
ASSERT (Ring->TrbNumber == TR_RING_TRB_NUMBER);
|
ASSERT (Ring->TrbNumber == TR_RING_TRB_NUMBER);
|
||||||
|
|
||||||
for (Index = 0; Index < Ring->TrbNumber; Index++) {
|
for (Index = 0; Index < Ring->TrbNumber; Index++) {
|
||||||
@ -222,7 +222,7 @@ XhcCheckUrbResult (
|
|||||||
UINT64 XhcDequeue;
|
UINT64 XhcDequeue;
|
||||||
UINT32 High;
|
UINT32 High;
|
||||||
UINT32 Low;
|
UINT32 Low;
|
||||||
|
|
||||||
ASSERT ((Handle != NULL) && (Urb != NULL));
|
ASSERT ((Handle != NULL) && (Urb != NULL));
|
||||||
|
|
||||||
if (Urb->Finished) {
|
if (Urb->Finished) {
|
||||||
@ -230,12 +230,12 @@ XhcCheckUrbResult (
|
|||||||
}
|
}
|
||||||
|
|
||||||
EvtTrb = NULL;
|
EvtTrb = NULL;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Traverse the event ring to find out all new events from the previous check.
|
// Traverse the event ring to find out all new events from the previous check.
|
||||||
//
|
//
|
||||||
XhcSyncEventRing (Handle, &Handle->EventRing);
|
XhcSyncEventRing (Handle, &Handle->EventRing);
|
||||||
|
|
||||||
for (Index = 0; Index < Handle->EventRing.TrbNumber; Index++) {
|
for (Index = 0; Index < Handle->EventRing.TrbNumber; Index++) {
|
||||||
|
|
||||||
Status = XhcCheckNewEvent (Handle, &Handle->EventRing, ((TRB_TEMPLATE **)&EvtTrb));
|
Status = XhcCheckNewEvent (Handle, &Handle->EventRing, ((TRB_TEMPLATE **)&EvtTrb));
|
||||||
@ -245,13 +245,13 @@ XhcCheckUrbResult (
|
|||||||
//
|
//
|
||||||
goto EXIT;
|
goto EXIT;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((EvtTrb->Type != TRB_TYPE_COMMAND_COMPLT_EVENT) && (EvtTrb->Type != TRB_TYPE_TRANS_EVENT)) {
|
if ((EvtTrb->Type != TRB_TYPE_COMMAND_COMPLT_EVENT) && (EvtTrb->Type != TRB_TYPE_TRANS_EVENT)) {
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
TRBPtr = (TRB_TEMPLATE *)(UINTN)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64) EvtTrb->TRBPtrHi, 32));
|
TRBPtr = (TRB_TEMPLATE *)(UINTN)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64) EvtTrb->TRBPtrHi, 32));
|
||||||
|
|
||||||
if (IsTrbInTrsRing ((TRANSFER_RING *)(UINTN)(Urb->Ring), TRBPtr)) {
|
if (IsTrbInTrsRing ((TRANSFER_RING *)(UINTN)(Urb->Ring), TRBPtr)) {
|
||||||
CheckedUrb = Urb;
|
CheckedUrb = Urb;
|
||||||
} else if (IsTrbInTrsRing ((TRANSFER_RING *)(UINTN)(Handle->UrbIn.Ring), TRBPtr)) {
|
} else if (IsTrbInTrsRing ((TRANSFER_RING *)(UINTN)(Handle->UrbIn.Ring), TRBPtr)) {
|
||||||
@ -269,7 +269,7 @@ XhcCheckUrbResult (
|
|||||||
} else {
|
} else {
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((EvtTrb->Completecode == TRB_COMPLETION_SHORT_PACKET) ||
|
if ((EvtTrb->Completecode == TRB_COMPLETION_SHORT_PACKET) ||
|
||||||
(EvtTrb->Completecode == TRB_COMPLETION_SUCCESS)) {
|
(EvtTrb->Completecode == TRB_COMPLETION_SUCCESS)) {
|
||||||
//
|
//
|
||||||
@ -326,9 +326,9 @@ XhcRingDoorBell (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// 7.6.8.2 DCDB Register
|
// 7.6.8.2 DCDB Register
|
||||||
//
|
//
|
||||||
Dcdb = (Urb->Direction == EfiUsbDataIn) ? 0x100 : 0x0;
|
Dcdb = (Urb->Direction == EfiUsbDataIn) ? 0x100 : 0x0;
|
||||||
|
|
||||||
XhcWriteDebugReg (
|
XhcWriteDebugReg (
|
||||||
Handle,
|
Handle,
|
||||||
XHC_DC_DCDB,
|
XHC_DC_DCDB,
|
||||||
@ -378,7 +378,7 @@ XhcExecTransfer (
|
|||||||
// If time out occurs.
|
// If time out occurs.
|
||||||
//
|
//
|
||||||
Urb->Result |= EFI_USB_ERR_TIMEOUT;
|
Urb->Result |= EFI_USB_ERR_TIMEOUT;
|
||||||
}
|
}
|
||||||
//
|
//
|
||||||
// If URB transfer is error, restore transfer ring to original value before URB transfer
|
// If URB transfer is error, restore transfer ring to original value before URB transfer
|
||||||
// This will make the current transfer TRB is always at the latest unused one in transfer ring.
|
// This will make the current transfer TRB is always at the latest unused one in transfer ring.
|
||||||
@ -425,7 +425,7 @@ XhcCreateTransferTrb (
|
|||||||
} else {
|
} else {
|
||||||
EPRing = &Handle->TransferRingOut;
|
EPRing = &Handle->TransferRingOut;
|
||||||
}
|
}
|
||||||
|
|
||||||
Urb->Ring = (EFI_PHYSICAL_ADDRESS)(UINTN) EPRing;
|
Urb->Ring = (EFI_PHYSICAL_ADDRESS)(UINTN) EPRing;
|
||||||
XhcSyncTrsRing (Handle, EPRing);
|
XhcSyncTrsRing (Handle, EPRing);
|
||||||
|
|
||||||
@ -439,12 +439,12 @@ XhcCreateTransferTrb (
|
|||||||
Trb->TrbNormal.ISP = 1;
|
Trb->TrbNormal.ISP = 1;
|
||||||
Trb->TrbNormal.IOC = 1;
|
Trb->TrbNormal.IOC = 1;
|
||||||
Trb->TrbNormal.Type = TRB_TYPE_NORMAL;
|
Trb->TrbNormal.Type = TRB_TYPE_NORMAL;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Update the cycle bit to indicate this TRB has been consumed.
|
// Update the cycle bit to indicate this TRB has been consumed.
|
||||||
//
|
//
|
||||||
Trb->TrbNormal.CycleBit = EPRing->RingPCS & BIT0;
|
Trb->TrbNormal.CycleBit = EPRing->RingPCS & BIT0;
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -470,7 +470,7 @@ XhcCreateUrb (
|
|||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
URB *Urb;
|
URB *Urb;
|
||||||
EFI_PHYSICAL_ADDRESS UrbData;
|
EFI_PHYSICAL_ADDRESS UrbData;
|
||||||
|
|
||||||
if (Direction == EfiUsbDataIn) {
|
if (Direction == EfiUsbDataIn) {
|
||||||
Urb = &Handle->UrbIn;
|
Urb = &Handle->UrbIn;
|
||||||
} else {
|
} else {
|
||||||
@ -478,17 +478,17 @@ XhcCreateUrb (
|
|||||||
}
|
}
|
||||||
|
|
||||||
UrbData = Urb->Data;
|
UrbData = Urb->Data;
|
||||||
|
|
||||||
ZeroMem (Urb, sizeof (URB));
|
ZeroMem (Urb, sizeof (URB));
|
||||||
Urb->Direction = Direction;
|
Urb->Direction = Direction;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Allocate memory to move data from CAR or SMRAM to normal memory
|
// Allocate memory to move data from CAR or SMRAM to normal memory
|
||||||
// to make XHCI DMA successfully
|
// to make XHCI DMA successfully
|
||||||
// re-use the pre-allocate buffer in PEI to avoid DXE memory service or gBS are not ready
|
// re-use the pre-allocate buffer in PEI to avoid DXE memory service or gBS are not ready
|
||||||
//
|
//
|
||||||
Urb->Data = UrbData;
|
Urb->Data = UrbData;
|
||||||
|
|
||||||
if (Direction == EfiUsbDataIn) {
|
if (Direction == EfiUsbDataIn) {
|
||||||
//
|
//
|
||||||
// Do not break URB data in buffer as it may contain the data which were just put in via DMA by XHC
|
// Do not break URB data in buffer as it may contain the data which were just put in via DMA by XHC
|
||||||
@ -502,7 +502,7 @@ XhcCreateUrb (
|
|||||||
CopyMem ((VOID*)(UINTN) Urb->Data, Data, DataLen);
|
CopyMem ((VOID*)(UINTN) Urb->Data, Data, DataLen);
|
||||||
Urb->DataLen = (UINT32) DataLen;
|
Urb->DataLen = (UINT32) DataLen;
|
||||||
}
|
}
|
||||||
|
|
||||||
Status = XhcCreateTransferTrb (Handle, Urb);
|
Status = XhcCreateTransferTrb (Handle, Urb);
|
||||||
ASSERT_EFI_ERROR (Status);
|
ASSERT_EFI_ERROR (Status);
|
||||||
|
|
||||||
@ -539,7 +539,7 @@ XhcDataTransfer (
|
|||||||
{
|
{
|
||||||
URB *Urb;
|
URB *Urb;
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Validate the parameters
|
// Validate the parameters
|
||||||
//
|
//
|
||||||
@ -562,7 +562,7 @@ XhcDataTransfer (
|
|||||||
if (Urb->Result == EFI_USB_NOERROR) {
|
if (Urb->Result == EFI_USB_NOERROR) {
|
||||||
Status = EFI_SUCCESS;
|
Status = EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Direction == EfiUsbDataIn) {
|
if (Direction == EfiUsbDataIn) {
|
||||||
//
|
//
|
||||||
// Move data from internal buffer to outside buffer (outside buffer may be in SMRAM...)
|
// Move data from internal buffer to outside buffer (outside buffer may be in SMRAM...)
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
Ia32 arch functions to access IDT vector.
|
Ia32 arch functions to access IDT vector.
|
||||||
|
|
||||||
Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -24,7 +24,7 @@
|
|||||||
@retval FALSE IDT entries were not setuo by Debug Agent.
|
@retval FALSE IDT entries were not setuo by Debug Agent.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
BOOLEAN
|
||||||
CheckDebugAgentHandler (
|
CheckDebugAgentHandler (
|
||||||
IN IA32_DESCRIPTOR *IdtDescriptor,
|
IN IA32_DESCRIPTOR *IdtDescriptor,
|
||||||
IN UINTN InterruptType
|
IN UINTN InterruptType
|
||||||
@ -48,7 +48,7 @@ CheckDebugAgentHandler (
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Save IDT entry for INT1 and update it.
|
Save IDT entry for INT1 and update it.
|
||||||
|
|
||||||
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
||||||
@param[out] SavedIdtEntry Original IDT entry returned.
|
@param[out] SavedIdtEntry Original IDT entry returned.
|
||||||
@ -63,7 +63,7 @@ SaveAndUpdateIdtEntry1 (
|
|||||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||||
UINT16 CodeSegment;
|
UINT16 CodeSegment;
|
||||||
UINTN InterruptHandler;
|
UINTN InterruptHandler;
|
||||||
|
|
||||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
||||||
CopyMem (SavedIdtEntry, &IdtEntry[1], sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
CopyMem (SavedIdtEntry, &IdtEntry[1], sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
||||||
|
|
||||||
@ -80,7 +80,7 @@ SaveAndUpdateIdtEntry1 (
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Restore IDT entry for INT1.
|
Restore IDT entry for INT1.
|
||||||
|
|
||||||
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
||||||
@param[in] RestoredIdtEntry IDT entry to be restored.
|
@param[in] RestoredIdtEntry IDT entry to be restored.
|
||||||
@ -93,7 +93,7 @@ RestoreIdtEntry1 (
|
|||||||
)
|
)
|
||||||
{
|
{
|
||||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||||
|
|
||||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
||||||
CopyMem (&IdtEntry[1], RestoredIdtEntry, sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
CopyMem (&IdtEntry[1], RestoredIdtEntry, sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
||||||
}
|
}
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
PE/Coff Extra Action library instances.
|
PE/Coff Extra Action library instances.
|
||||||
|
|
||||||
Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -16,7 +16,7 @@
|
|||||||
|
|
||||||
/**
|
/**
|
||||||
Check if the hardware breakpoint in Drx is enabled by checking the Lx and Gx bit in Dr7.
|
Check if the hardware breakpoint in Drx is enabled by checking the Lx and Gx bit in Dr7.
|
||||||
|
|
||||||
It assumes that DebugAgent will set both Lx and Gx bit when setting up the hardware breakpoint.
|
It assumes that DebugAgent will set both Lx and Gx bit when setting up the hardware breakpoint.
|
||||||
|
|
||||||
|
|
||||||
@ -40,7 +40,7 @@ IsDrxEnabled (
|
|||||||
Common routine to report the PE/COFF image loading/relocating or unloading event.
|
Common routine to report the PE/COFF image loading/relocating or unloading event.
|
||||||
|
|
||||||
If ImageContext is NULL, then ASSERT().
|
If ImageContext is NULL, then ASSERT().
|
||||||
|
|
||||||
@param ImageContext Pointer to the image context structure that describes the
|
@param ImageContext Pointer to the image context structure that describes the
|
||||||
PE/COFF image.
|
PE/COFF image.
|
||||||
@param Signature IMAGE_LOAD_SIGNATURE or IMAGE_UNLOAD_SIGNATURE.
|
@param Signature IMAGE_LOAD_SIGNATURE or IMAGE_UNLOAD_SIGNATURE.
|
||||||
@ -83,7 +83,7 @@ PeCoffLoaderExtraActionCommon (
|
|||||||
if (LoadImageMethod == DEBUG_LOAD_IMAGE_METHOD_IO_HW_BREAKPOINT) {
|
if (LoadImageMethod == DEBUG_LOAD_IMAGE_METHOD_IO_HW_BREAKPOINT) {
|
||||||
//
|
//
|
||||||
// If the CPU does not support Debug Extensions(CPUID:01 EDX:BIT2)
|
// If the CPU does not support Debug Extensions(CPUID:01 EDX:BIT2)
|
||||||
// then force use of DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3
|
// then force use of DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3
|
||||||
//
|
//
|
||||||
AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
|
AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
|
||||||
if ((RegEdx & BIT2) == 0) {
|
if ((RegEdx & BIT2) == 0) {
|
||||||
@ -107,7 +107,7 @@ PeCoffLoaderExtraActionCommon (
|
|||||||
IdtEntryHooked = TRUE;
|
IdtEntryHooked = TRUE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Save Debug Register State
|
// Save Debug Register State
|
||||||
//
|
//
|
||||||
@ -152,7 +152,7 @@ PeCoffLoaderExtraActionCommon (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Restore Debug Register State only when Host didn't change it inside exception handler.
|
// Restore Debug Register State only when Host didn't change it inside exception handler.
|
||||||
// E.g.: User halts the target and sets the HW breakpoint while target is
|
// E.g.: User halts the target and sets the HW breakpoint while target is
|
||||||
// in the above exception handler
|
// in the above exception handler
|
||||||
//
|
//
|
||||||
NewDr7 = AsmReadDr7 () | BIT10; // H/w sets bit 10, some simulators don't
|
NewDr7 = AsmReadDr7 () | BIT10; // H/w sets bit 10, some simulators don't
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
PE/Coff Extra Action library instances, it will report image debug info.
|
PE/Coff Extra Action library instances, it will report image debug info.
|
||||||
|
|
||||||
Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -43,14 +43,14 @@ extern UINTN AsmInterruptHandle;
|
|||||||
@retval FALSE IDT entries were not setuo by Debug Agent.
|
@retval FALSE IDT entries were not setuo by Debug Agent.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
BOOLEAN
|
||||||
CheckDebugAgentHandler (
|
CheckDebugAgentHandler (
|
||||||
IN IA32_DESCRIPTOR *IdtDescriptor,
|
IN IA32_DESCRIPTOR *IdtDescriptor,
|
||||||
IN UINTN InterruptType
|
IN UINTN InterruptType
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Save IDT entry for INT1 and update it.
|
Save IDT entry for INT1 and update it.
|
||||||
|
|
||||||
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
||||||
@param[out] SavedIdtEntry Original IDT entry returned.
|
@param[out] SavedIdtEntry Original IDT entry returned.
|
||||||
@ -63,7 +63,7 @@ SaveAndUpdateIdtEntry1 (
|
|||||||
);
|
);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Restore IDT entry for INT1.
|
Restore IDT entry for INT1.
|
||||||
|
|
||||||
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
||||||
@param[in] RestoredIdtEntry IDT entry to be restored.
|
@param[in] RestoredIdtEntry IDT entry to be restored.
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
/** @file
|
/** @file
|
||||||
X64 arch function to access IDT vector.
|
X64 arch function to access IDT vector.
|
||||||
|
|
||||||
Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
|
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
This program and the accompanying materials
|
This program and the accompanying materials
|
||||||
are licensed and made available under the terms and conditions of the BSD License
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
which accompanies this distribution. The full text of the license may be found at
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
@ -24,7 +24,7 @@
|
|||||||
@retval FALSE IDT entries were not setuo by Debug Agent.
|
@retval FALSE IDT entries were not setuo by Debug Agent.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
BOOLEAN
|
||||||
CheckDebugAgentHandler (
|
CheckDebugAgentHandler (
|
||||||
IN IA32_DESCRIPTOR *IdtDescriptor,
|
IN IA32_DESCRIPTOR *IdtDescriptor,
|
||||||
IN UINTN InterruptType
|
IN UINTN InterruptType
|
||||||
@ -39,7 +39,7 @@ CheckDebugAgentHandler (
|
|||||||
}
|
}
|
||||||
|
|
||||||
InterruptHandler = IdtEntry[InterruptType].Bits.OffsetLow +
|
InterruptHandler = IdtEntry[InterruptType].Bits.OffsetLow +
|
||||||
(((UINTN)IdtEntry[InterruptType].Bits.OffsetHigh) << 16) +
|
(((UINTN)IdtEntry[InterruptType].Bits.OffsetHigh) << 16) +
|
||||||
(((UINTN)IdtEntry[InterruptType].Bits.OffsetUpper) << 32);
|
(((UINTN)IdtEntry[InterruptType].Bits.OffsetUpper) << 32);
|
||||||
if (InterruptHandler >= sizeof (UINT32) && *(UINT32 *)(InterruptHandler - sizeof (UINT32)) == AGENT_HANDLER_SIGNATURE) {
|
if (InterruptHandler >= sizeof (UINT32) && *(UINT32 *)(InterruptHandler - sizeof (UINT32)) == AGENT_HANDLER_SIGNATURE) {
|
||||||
return TRUE;
|
return TRUE;
|
||||||
@ -49,7 +49,7 @@ CheckDebugAgentHandler (
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Save IDT entry for INT1 and update it.
|
Save IDT entry for INT1 and update it.
|
||||||
|
|
||||||
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
||||||
@param[out] SavedIdtEntry Original IDT entry returned.
|
@param[out] SavedIdtEntry Original IDT entry returned.
|
||||||
@ -64,7 +64,7 @@ SaveAndUpdateIdtEntry1 (
|
|||||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||||
UINT16 CodeSegment;
|
UINT16 CodeSegment;
|
||||||
UINTN InterruptHandler;
|
UINTN InterruptHandler;
|
||||||
|
|
||||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
||||||
CopyMem (SavedIdtEntry, &IdtEntry[1], sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
CopyMem (SavedIdtEntry, &IdtEntry[1], sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
||||||
|
|
||||||
@ -82,7 +82,7 @@ SaveAndUpdateIdtEntry1 (
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Restore IDT entry for INT1.
|
Restore IDT entry for INT1.
|
||||||
|
|
||||||
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
@param[in] IdtDescriptor Pointer to IDT Descriptor.
|
||||||
@param[in] RestoredIdtEntry IDT entry to be restored.
|
@param[in] RestoredIdtEntry IDT entry to be restored.
|
||||||
@ -95,7 +95,7 @@ RestoreIdtEntry1 (
|
|||||||
)
|
)
|
||||||
{
|
{
|
||||||
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
|
||||||
|
|
||||||
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
|
||||||
CopyMem (&IdtEntry[1], RestoredIdtEntry, sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
CopyMem (&IdtEntry[1], RestoredIdtEntry, sizeof (IA32_IDT_GATE_DESCRIPTOR));
|
||||||
}
|
}
|
||||||
|
@ -7,13 +7,13 @@
|
|||||||
# etc.
|
# etc.
|
||||||
#
|
#
|
||||||
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
# This program and the accompanying materials are licensed and made available under
|
# This program and the accompanying materials are licensed and made available under
|
||||||
# the terms and conditions of the BSD License that accompanies this distribution.
|
# the terms and conditions of the BSD License that accompanies this distribution.
|
||||||
# The full text of the license may be found at
|
# The full text of the license may be found at
|
||||||
# http://opensource.org/licenses/bsd-license.php.
|
# http://opensource.org/licenses/bsd-license.php.
|
||||||
#
|
#
|
||||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
#
|
#
|
||||||
##
|
##
|
||||||
|
|
||||||
@ -72,7 +72,7 @@
|
|||||||
# @Expression 0x80000001 | (gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbEhciPciAddress & 0xF0000FFF) == 0
|
# @Expression 0x80000001 | (gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbEhciPciAddress & 0xF0000FFF) == 0
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbEhciPciAddress|0x000EF000|UINT32|0x00000003
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbEhciPciAddress|0x000EF000|UINT32|0x00000003
|
||||||
|
|
||||||
## The mask of exception numbers whose handlers would be ignored and cannot be replaced or
|
## The mask of exception numbers whose handlers would be ignored and cannot be replaced or
|
||||||
# hooked by Debug Agent Library. Masking INT1/INT3 is invalid.
|
# hooked by Debug Agent Library. Masking INT1/INT3 is invalid.
|
||||||
# @Prompt Configure exception numbers not to be hooked by Debug Agent.
|
# @Prompt Configure exception numbers not to be hooked by Debug Agent.
|
||||||
# @Expression 0x80000001 | (gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdExceptionsIgnoredByDebugger & 0xA) == 0
|
# @Expression 0x80000001 | (gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdExceptionsIgnoredByDebugger & 0xA) == 0
|
||||||
@ -94,7 +94,7 @@
|
|||||||
## Note that the memory BAR address is only used before Pci bus resource allocation.
|
## Note that the memory BAR address is only used before Pci bus resource allocation.
|
||||||
# @Prompt Configure xhci host controller memory BAR.
|
# @Prompt Configure xhci host controller memory BAR.
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciMemorySpaceBase|0xD0000000|UINT64|0x00000007
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciMemorySpaceBase|0xD0000000|UINT64|0x00000007
|
||||||
|
|
||||||
## The pci address of xhci host controller, in which usb debug feature is enabled.
|
## The pci address of xhci host controller, in which usb debug feature is enabled.
|
||||||
# The format of pci address is :<BR>
|
# The format of pci address is :<BR>
|
||||||
# -----------------------------------------------------------------------<BR>
|
# -----------------------------------------------------------------------<BR>
|
||||||
@ -106,8 +106,8 @@
|
|||||||
# @Prompt Configure xhci host controller pci address.
|
# @Prompt Configure xhci host controller pci address.
|
||||||
# @Expression 0x80000001 | (gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress & 0xF0000FFF) == 0
|
# @Expression 0x80000001 | (gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress & 0xF0000FFF) == 0
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress|0x000A0000|UINT32|0x00000008
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciPciAddress|0x000A0000|UINT32|0x00000008
|
||||||
|
|
||||||
## Per XHCI spec, software shall impose a timeout between the detection of the Debug Host
|
## Per XHCI spec, software shall impose a timeout between the detection of the Debug Host
|
||||||
## connection and the DbC Run transition to 1. This PCD specifies the timeout value in microsecond.
|
## connection and the DbC Run transition to 1. This PCD specifies the timeout value in microsecond.
|
||||||
# @Prompt Configure debug device detection timeout value.
|
# @Prompt Configure debug device detection timeout value.
|
||||||
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout|3000000|UINT64|0x00000009
|
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout|3000000|UINT64|0x00000009
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
## @file
|
## @file
|
||||||
# Source Level Debug Package.
|
# Source Level Debug Package.
|
||||||
#
|
#
|
||||||
# Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
|
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
#
|
#
|
||||||
# This program and the accompanying materials
|
# This program and the accompanying materials
|
||||||
# are licensed and made available under the terms and conditions of the BSD License
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
@ -30,7 +30,7 @@
|
|||||||
|
|
||||||
[LibraryClasses.common]
|
[LibraryClasses.common]
|
||||||
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
|
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
|
||||||
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
|
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
|
||||||
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
|
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
|
||||||
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
|
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
|
||||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||||
|
@ -14,7 +14,7 @@
|
|||||||
// the terms and conditions of the BSD License that accompanies this distribution.
|
// the terms and conditions of the BSD License that accompanies this distribution.
|
||||||
// The full text of the license may be found at
|
// The full text of the license may be found at
|
||||||
// http://opensource.org/licenses/bsd-license.php.
|
// http://opensource.org/licenses/bsd-license.php.
|
||||||
//
|
//
|
||||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
//
|
//
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
// /** @file
|
// /** @file
|
||||||
// SourceLevelDebug Package Localized Strings and Content.
|
// SourceLevelDebug Package Localized Strings and Content.
|
||||||
//
|
//
|
||||||
// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
|
// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||||
//
|
//
|
||||||
// This program and the accompanying materials are licensed and made available under
|
// This program and the accompanying materials are licensed and made available under
|
||||||
// the terms and conditions of the BSD License that accompanies this distribution.
|
// the terms and conditions of the BSD License that accompanies this distribution.
|
||||||
@ -13,6 +13,6 @@
|
|||||||
//
|
//
|
||||||
// **/
|
// **/
|
||||||
|
|
||||||
#string STR_PROPERTIES_PACKAGE_NAME
|
#string STR_PROPERTIES_PACKAGE_NAME
|
||||||
#language en-US
|
#language en-US
|
||||||
"SourceLevelDebug package"
|
"SourceLevelDebug package"
|
||||||
|
Reference in New Issue
Block a user