OVMF ResetVector: Modify interface with SEC module
Previously it was: ESI/RSI - SEC Core entry point EDI/RDI - PEI Core entry point EBP/RBP - Start of BFV Now it is: RAX/EAX Initial value of the EAX register (BIST: Built-in Self Test) DI 'BP': boot-strap processor, or 'AP': application processor RBP/EBP Address of Boot Firmware Volume (BFV) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9571 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -1,6 +1,8 @@
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;------------------------------------------------------------------------------
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; @file
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; First code exectuted by processor after resetting.
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;
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; Copyright (c) 2008, Intel Corporation
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; Copyright (c) 2008 - 2009, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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@@ -9,28 +11,25 @@
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; Reset-16Bit-vft0.asm
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;
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; Abstract:
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;
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; First code exectuted by processor after resetting.
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;
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;------------------------------------------------------------------------------
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BITS 16
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BITS 16
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earlyInit_Real16:
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ALIGN 16
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jmp real16InitSerialPort
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real16SerialPortInitReturn:
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applicationProcessorEntryPoint:
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;
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; Application Processors entry point
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;
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; GenFv generates code aligned on a 4k boundary which will jump to this
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; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
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; used to wake up the application processors.
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;
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jmp short EarlyApInitReal16
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jmp to32BitFlat
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ALIGN 8
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ALIGN 16
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DD 0, 0, 0
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DD 0
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;
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; The VTF signature
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@@ -39,16 +38,20 @@ ALIGN 16
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; any fixups.
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;
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vtfSignature:
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DB 'V', 'T', 'F', 0
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DB 'V', 'T', 'F', 0
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ALIGN 16
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resetVector:
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;
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; Reset Vector
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;
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; This is where the processor will begin execution
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;
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jmp short earlyInit_Real16
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wbinvd
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jmp short EarlyBspInitReal16
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ALIGN 16
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ALIGN 16
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fourGigabytes:
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