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OVMF ResetVector: Modify interface with SEC module

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Previously it was:
  ESI/RSI - SEC Core entry point
  EDI/RDI - PEI Core entry point
  EBP/RBP - Start of BFV

Now it is:
  RAX/EAX  Initial value of the EAX register
           (BIST: Built-in Self Test)
  DI       'BP': boot-strap processor, or
           'AP': application processor
  RBP/EBP  Address of Boot Firmware Volume (BFV)

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9571 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten
2009-12-16 23:29:15 +00:00
parent 8861fc792c
commit 7a55c43b07
21 changed files with 479 additions and 333 deletions
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25
OvmfPkg/ResetVector/PostCodes.inc Normal file
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@@ -0,0 +1,25 @@
;------------------------------------------------------------------------------
; @file
; Definitions of POST CODES for the reset vector module
;
; Copyright (c) 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
%define POSTCODE_16BIT_MODE 0x16
%define POSTCODE_32BIT_MODE 0x32
%define POSTCODE_64BIT_MODE 0x64
%define POSTCODE_BFV_NOT_FOUND 0xb0
%define POSTCODE_BFV_FOUND 0xb1
%define POSTCODE_SEC_NOT_FOUND 0xf0
%define POSTCODE_SEC_FOUND 0xf1