1. add public functions header.

2. apply for doxgen format for file header.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5043 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff
2008-04-11 03:36:07 +00:00
parent 987da59835
commit 7b414b4ed6
23 changed files with 1221 additions and 392 deletions

View File

@@ -1,15 +1,16 @@
#******************************************************************************
#*
#* Copyright (c) 2006, Intel Corporation
#* All rights reserved. This program and the accompanying materials
#* are licensed and made available under the terms and conditions of the BSD License
#* which accompanies this distribution. The full text of the license may be found at
#* http://opensource.org/licenses/bsd-license.php
#*
#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#*
#******************************************************************************
#/**@file
# Low leve IA32 specific debug support functions.
#
# Copyright (c) 2006, Intel Corporation
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
.globl ASM_PFX(OrigVector)
.globl ASM_PFX(InterruptEntryStub)
@@ -29,12 +30,12 @@ ASM_PFX(StubSize): .long ASM_PFX(InterruptEntryStubEnd) - ASM_PFX(Interr
ASM_PFX(FxStorSupport):
push %ebx
mov $0x1,%eax
cpuid
cpuid
mov %edx,%eax
and $0x1000000,%eax
shr $0x18,%eax
pop %ebx
ret
ret
.globl ASM_PFX(GetIdtr)
ASM_PFX(GetIdtr):
@@ -43,25 +44,25 @@ ASM_PFX(GetIdtr):
add $0xfffffff8,%esp
sidtl 0xfffffffa(%ebp)
mov 0xfffffffc(%ebp),%eax
leave
ret
leave
ret
.globl ASM_PFX(WriteInterruptFlag)
ASM_PFX(WriteInterruptFlag):
push %ebp
mov %esp,%ebp
pushf
pushf
pop %eax
and $0x200,%eax
shr $0x9,%eax
mov 0x8(%ebp),%ecx
or %cl,%cl
jne ASM_PFX(WriteInterruptFlag+0x17)
cli
cli
jmp ASM_PFX(WriteInterruptFlag+0x18)
sti
leave
ret
sti
leave
ret
.globl ASM_PFX(Vect2Desc)
ASM_PFX(Vect2Desc):
@@ -74,8 +75,8 @@ ASM_PFX(Vect2Desc):
movw $0x8e00,0x4(%ecx)
shr $0x10,%eax
mov %ax,0x6(%ecx)
leave
ret
leave
ret
.globl ASM_PFX(InterruptEntryStub)
ASM_PFX(InterruptEntryStub):
@@ -88,8 +89,8 @@ ASM_PFX(InterruptEntryStubEnd):
.globl ASM_PFX(CommonIdtEntry)
ASM_PFX(CommonIdtEntry):
pusha
pushf
pusha
pushf
pop %eax
mov %eax,0x0
cmpl $0x8,0x0
@@ -259,12 +260,12 @@ ASM_PFX(CommonIdtEntry):
push %ebx
push %cs
push $0x0
iret
iret
PhonyIretd:
popa
popa
mov 0x0,%esp
jmp *0x0
popa
popa
mov 0x0,%esp
iret
iret

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@@ -1,15 +1,16 @@
;******************************************************************************
;*
;* Copyright (c) 2006, Intel Corporation
;* All rights reserved. This program and the accompanying materials
;* are licensed and made available under the terms and conditions of the BSD License
;* which accompanies this distribution. The full text of the license may be found at
;* http://opensource.org/licenses/bsd-license.php
;*
;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;*
;******************************************************************************
;/** @file
; Low leve IA32 specific debug support functions.
;
; Copyright (c) 2006, Intel Corporation. <BR>
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;**/
.586p
.MODEL FLAT, C
@@ -95,7 +96,7 @@ OrigVector dd 66666666h ; ?
align 16
DebugStackEnd db "DbgStkEnd >>>>>>" ;; 16 byte long string - must be 16 bytes to preserve alignment
dd 1ffdh dup (000000000h) ;; 32K should be enough stack
;; This allocation is coocked to insure
;; This allocation is coocked to insure
;; that the the buffer for the FXSTORE instruction
;; will be 16 byte aligned also.
;;

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@@ -1,24 +1,18 @@
//++
// Copyright (c) 2006, Intel Corporation
// All rights reserved. This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// AsmFuncs.s
//
// Abstract:
//
// Low level IPF routines used by the debug support driver
//
// Revision History:
//
//--
/// @file
/// Low level IPF routines used by the debug support driver
///
/// Copyright (c) 2006, Intel Corporation
/// All rights reserved. This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: AsmFuncs.s
///
///
#include "common.i"
@@ -127,32 +121,32 @@ LoopBack: // $L143:
// our chained handler installed:
//
//
//
//
//
// This IVT entry is Failsafe bundle
// reserved by the
// Itanium architecture Original bundle 0
// and is used for
// for locating our
// handler and the
// original bundle Patch code...
// zero of the ext
// interrupt handler
//
// RSVD (3400) Unused
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
// This IVT entry is Failsafe bundle
// reserved by the
// Itanium architecture Original bundle 0
// and is used for
// for locating our
// handler and the
// original bundle Patch code...
// zero of the ext
// interrupt handler
//
// RSVD (3400) Unused
//
//
//
//
//
//
//
//
//
//
//
//
// EXT_INT (3000) Bundle 0 Bundle zero - This one is
// modified, all other bundles
// in the EXT_INT entry are
@@ -430,7 +424,7 @@ RelocateSlot:
add loc3=loc2, in1;; // loc3 = physical address of branch target
(p14) sub loc2=r0,loc2;; // flip sign in loc2 if offset is negative
sub loc4=loc3,in2;; // loc4 = relative offset from new ip to branch target
cmp.lt p15, p14 = 0, loc4;; // get new sign bit
cmp.lt p15, p14 = 0, loc4;; // get new sign bit
(p14) sub loc5=r0,loc4 // get absolute value of offset
(p15) mov loc5=loc4;;
movl loc6=0x0FFFFFF;; // maximum offset in bytes for ip-rel branch
@@ -1230,7 +1224,7 @@ HookHandler:
// the backing store. The processor, however may not be aware that the
// stacked registers need to be reloaded from the backing store. Therefore,
// we explicitly cause the RSE to refresh the stacked register's contents
// from the backing store.
// from the backing store.
mov loc0=ar.rsc // get RSC value
mov loc1=ar.rsc // save it so we can restore it
movl loc3=0xffffffffc000ffff;; // create mask for clearing RSC.loadrs
@@ -1307,7 +1301,7 @@ PatchCode:
movl SCRATCH_REG1 = ~( MASK(PSR_DT,1) | MASK(PSR_RT,1));;
and SCRATCH_REG1 = SCRATCH_REG0, SCRATCH_REG1;;
mov psr.l = SCRATCH_REG1;;
srlz.d
srlz.d
tbit.z p14, p15 = SCRATCH_REG6, PSR_IS;; // Check to see if we were
// interrupted from IA32
// context. If so, bail out

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@@ -1,24 +1,19 @@
//++
// Copyright (c) 2006, Intel Corporation
// All rights reserved. This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// Ds64Macros.i
//
// Abstract:
//
// This is set of macros used in calculating offsets in the IVT
//
// Revision History:
//
//--
/// @file
/// This is set of macros used in calculating offsets in the IVT.
///
/// Copyright (c) 2006, Intel Corporation
/// All rights reserved. This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: Ds64Macros.i
///
///
#define EXCPT_EXTERNAL_INTERRUPT 12
#define MASK_0_4 0x000000000000001F // mask bits 0 through 4

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@@ -1,24 +1,19 @@
//++
// Copyright (c) 2006, Intel Corporation
// All rights reserved. This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// Common.i
//
// Abstract:
//
// This is set of useful macros
//
// Revision History:
//
//--
/// @file
/// This is set of useful macros.
///
/// Copyright (c) 2006, Intel Corporation
/// All rights reserved. This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: common.i
///
///
#define NESTED_SETUP(i,l,o,r) \
alloc loc1=ar##.##pfs,i,l,o,r ; \

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@@ -1,15 +1,16 @@
#******************************************************************************
#*
#* Copyright (c) 2007, Intel Corporation
#* All rights reserved. This program and the accompanying materials
#* are licensed and made available under the terms and conditions of the BSD License
#* which accompanies this distribution. The full text of the license may be found at
#* http://opensource.org/licenses/bsd-license.php
#*
#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#*
#******************************************************************************
#/**@file
# Low leve x64 specific debug support functions.
#
# Copyright (c) 2006, Intel Corporation
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
.globl _OrigVector
.globl _InterruptEntryStub
@@ -27,31 +28,31 @@ _StubSize: .long _InterruptEntryStubEnd - _InterruptEntryStub
.globl _FxStorSupport
_FxStorSupport:
ret
ret
.globl _GetIdtr
_GetIdtr:
ret
ret
.globl _WriteInterruptFlag
_WriteInterruptFlag:
ret
ret
.globl _Vect2Desc
_Vect2Desc:
ret
ret
.globl _InterruptEntryStub
_InterruptEntryStub:
ret
ret
.globl _InterruptEntryStubEnd
_InterruptEntryStubEnd:
ret
ret
.globl _CommonIdtEntry
_CommonIdtEntry:
ret
ret
PhonyIretd:
iret
iret

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@@ -1,15 +1,16 @@
;******************************************************************************
;*
;* Copyright (c) 2006, Intel Corporation
;* All rights reserved. This program and the accompanying materials
;* are licensed and made available under the terms and conditions of the BSD License
;* which accompanies this distribution. The full text of the license may be found at
;* http://opensource.org/licenses/bsd-license.php
;*
;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;*
;******************************************************************************
;/** @file
; Low level x64 routines used by the debug support driver.
;
; Copyright (c) 2007 - 2008, Intel Corporation. <BR>
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;**/
EXCPT64_DIVIDE_ERROR EQU 0
EXCPT64_DEBUG EQU 1
@@ -93,7 +94,7 @@ OrigVector dq 6666666666666666h ; ?
align 16
DebugStackEnd db "DbgStkEnd >>>>>>" ;; 16 byte long string - must be 16 bytes to preserve alignment
dd 1ffch dup (000000000h) ;; 32K should be enough stack
;; This allocation is coocked to insure
;; This allocation is coocked to insure
;; that the the buffer for the FXSTORE instruction
;; will be 16 byte aligned also.
;;