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MdePkg/Include: Update definitions of SPI related header files

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BZ#: 4471
Update definitions according to PI spec 1.8 errata A

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
abnchang
2023-06-18 05:31:54 +08:00
committed by mergify[bot]
parent 0afb874349
commit 7dec566775
3 changed files with 35 additions and 3 deletions
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16
MdePkg/Include/Protocol/SpiHc.h
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@@ -2,10 +2,11 @@
This file defines the SPI Host Controller Protocol.
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol was introduced in UEFI PI Specification 1.6.
This Protocol was introduced in UEFI PI Specification 1.8 A.
**/
@@ -121,6 +122,19 @@ typedef EFI_STATUS
IN EFI_SPI_BUS_TRANSACTION *BusTransaction
);
///
/// Definitions of SPI Host Controller Attributes.
///
#define HC_SUPPORTS_WRITE_ONLY_OPERATIONS BIT0
#define HC_SUPPORTS_READ_ONLY_OPERATIONS BIT1
#define HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS BIT2
#define HC_TX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT3
#define HC_RX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT4
#define HC_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT5
#define HC_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT6
#define HC_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT7
#define HC_TRANSFER_SIZE_INCLUDES_OPCODE BIT8
#define HC_TRANSFER_SIZE_INCLUDES_ADDRESS BIT9
///
/// Support a SPI data transaction between the SPI controller and a SPI chip.
///