MdePkg/Include: Update definitions of SPI related header files

BZ#: 4471
Update definitions according to PI spec 1.8 errata A

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
abnchang
2023-06-18 05:31:54 +08:00
committed by mergify[bot]
parent 0afb874349
commit 7dec566775
3 changed files with 35 additions and 3 deletions

View File

@@ -2,10 +2,11 @@
This file defines the SPI I/O Protocol.
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol was introduced in UEFI PI Specification 1.6.
This Protocol was introduced in UEFI PI Specification 1.8 A.
**/
@@ -223,6 +224,15 @@ typedef struct _EFI_SPI_BUS_TRANSACTION {
UINT8 *ReadBuffer;
} EFI_SPI_BUS_TRANSACTION;
///
/// Definitions of SPI I/O Attributes.
///
#define SPI_IO_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0
#define SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT1
#define SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT2
#define SPI_IO_TRANSFER_SIZE_INCLUDES_OPCODE BIT3
#define SPI_IO_TRANSFER_SIZE_INCLUDES_ADDRESS BIT4
///
/// Support managed SPI data transactions between the SPI controller and a SPI
/// chip.