MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency

Some SdMmc host controllers are run by clocks with different
frequency than it is reflected in Capabilities Register 1.
It is allowed by SDHCI specification ver. 4.2 - if BaseClkFreq
field value of the Capability Register 1 is zero, the clock
frequency must be obtained via another method.

Because the bitfield is only 8 bits wide, a maximum value
that could be obtained from hardware is 255MHz.
In case the actual frequency exceeds 255MHz, the 8-bit BaseClkFreq
member of SD_MMC_HC_SLOT_CAP structure occurs to be not sufficient
to be used for setting the clock speed in SdMmcHcClockSupply
function.

This patch adds new UINT32 array ('BaseClkFreq[]') to
SD_MMC_HC_PRIVATE_DATA structure for specifying
the input clock speed for each slot of the host controller.
All routines that are used for clock configuration are
updated accordingly.

This patch also adds new IN OUT BaseClockFreq field
in the Capability callback of the SdMmcOverride,
protocol which allows to update BaseClkFreq value.

The patch reuses original commit from edk2-platforms:
20f6f144d3a8 ("Marvell/Drivers: XenonDxe: Allow overriding base clock
frequency")

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
This commit is contained in:
Marcin Wojtas
2018-11-10 07:01:27 +08:00
committed by Hao Wu
parent b7b803a6d5
commit 7f3b0bad4b
7 changed files with 43 additions and 22 deletions

View File

@@ -22,7 +22,7 @@
#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \
{ 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } }
#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x1
#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x2
typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE;
@@ -58,6 +58,8 @@ typedef enum {
@param[in] ControllerHandle The EFI_HANDLE of the controller.
@param[in] Slot The 0 based slot index.
@param[in,out] SdMmcHcSlotCapability The SDHCI capability structure.
@param[in,out] BaseClkFreq The base clock frequency value that
optionally can be updated.
@retval EFI_SUCCESS The override function completed successfully.
@retval EFI_NOT_FOUND The specified controller or slot does not exist.
@@ -69,7 +71,8 @@ EFI_STATUS
(EFIAPI * EDKII_SD_MMC_CAPABILITY) (
IN EFI_HANDLE ControllerHandle,
IN UINT8 Slot,
IN OUT VOID *SdMmcHcSlotCapability
IN OUT VOID *SdMmcHcSlotCapability,
IN OUT UINT32 *BaseClkFreq
);
/**