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MdeModulePkg/XhciDxe: Add access xHCI Extended Capabilities Pointer

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Add support process Port Speed field value of PORTSC according to
Supported Protocol Capability (define in xHCI spec 1.1)

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3914

The value of Port Speed field in PORTSC bit[10:13]
(xHCI spec 1.1 section 5.4.8) should be change to use this value to
query thru Protocol Speed ID (PSI) (xHCI spec 1.1 section 7.2.1)
in xHCI Supported Protocol Capability and return the value according
the Protocol Speed ID (PSIV) Dword.

With this mechanism may able to detect more kind of Protocol Speed
in USB3 and also compatiable with three kind of speed of USB2.

Cc: Jenny Huang <jenny.huang@intel.com>
Cc: More Shih <more.shih@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Ian Chiu <Ian.chiu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
This commit is contained in:
Ian Chiu
2022-06-23 14:21:45 +08:00
committed by mergify[bot]
parent b600f253b3
commit 7f4eca4cc2
4 changed files with 296 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

93
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
View File

@@ -25,8 +25,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USB_HUB_CLASS_CODE 0x09
#define USB_HUB_SUBCLASS_CODE 0x00
#define XHC_CAP_USB_LEGACY 0x01
#define XHC_CAP_USB_DEBUG 0x0A
#define XHC_CAP_USB_LEGACY 0x01
#define XHC_CAP_USB_DEBUG 0x0A
#define XHC_CAP_USB_SUPPORTED_PROTOCOL 0x02
// ============================================//
// XHCI register offset //
@@ -74,6 +75,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USBLEGSP_BIOS_SEMAPHORE BIT16 // HC BIOS Owned Semaphore
#define USBLEGSP_OS_SEMAPHORE BIT24 // HC OS Owned Semaphore
//
// xHCI Supported Protocol Capability
//
#define XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2 0x02
#define XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3 0x03
#define XHC_SUPPORTED_PROTOCOL_NAME_STRING_OFFSET 0x04
#define XHC_SUPPORTED_PROTOCOL_NAME_STRING_VALUE 0x20425355
#define XHC_SUPPORTED_PROTOCOL_DW2_OFFSET 0x08
#define XHC_SUPPORTED_PROTOCOL_PSI_OFFSET 0x10
#define XHC_SUPPORTED_PROTOCOL_USB2_HIGH_SPEED_PSIM 480
#define XHC_SUPPORTED_PROTOCOL_USB2_LOW_SPEED_PSIM 1500
#pragma pack (1)
typedef struct {
UINT8 MaxSlots; // Number of Device Slots
@@ -130,6 +143,52 @@ typedef union {
HCCPARAMS Data;
} XHC_HCCPARAMS;
//
// xHCI Supported Protocol Cabability
//
typedef struct {
UINT8 CapId;
UINT8 NextExtCapReg;
UINT8 RevMinor;
UINT8 RevMajor;
} SUPPORTED_PROTOCOL_DW0;
typedef union {
UINT32 Dword;
SUPPORTED_PROTOCOL_DW0 Data;
} XHC_SUPPORTED_PROTOCOL_DW0;
typedef struct {
UINT32 NameString;
} XHC_SUPPORTED_PROTOCOL_DW1;
typedef struct {
UINT8 CompPortOffset;
UINT8 CompPortCount;
UINT16 ProtocolDef : 12;
UINT16 Psic : 4;
} SUPPORTED_PROTOCOL_DW2;
typedef union {
UINT32 Dword;
SUPPORTED_PROTOCOL_DW2 Data;
} XHC_SUPPORTED_PROTOCOL_DW2;
typedef struct {
UINT16 Psiv : 4;
UINT16 Psie : 2;
UINT16 Plt : 2;
UINT16 Pfd : 1;
UINT16 RsvdP : 5;
UINT16 Lp : 2;
UINT16 Psim;
} SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID;
typedef union {
UINT32 Dword;
SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID Data;
} XHC_SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID;
#pragma pack ()
//
@@ -546,4 +605,34 @@ XhcGetCapabilityAddr (
IN UINT8 CapId
);
/**
Calculate the offset of the xHCI Supported Protocol Capability.
@param Xhc The XHCI Instance.
@param MajorVersion The USB Major Version in xHCI Support Protocol Capability Field
@return The offset of xHCI Supported Protocol capability register.
**/
UINT32
XhcGetSupportedProtocolCapabilityAddr (
IN USB_XHCI_INSTANCE *Xhc,
IN UINT8 MajorVersion
);
/**
Find SpeedField value match with Port Speed ID value.
@param Xhc The XHCI Instance.
@param Speed The Port Speed filed in USB PortSc register
@return The USB Port Speed.
**/
UINT16
XhcCheckUsbPortSpeedUsedPsic (
IN USB_XHCI_INSTANCE *Xhc,
IN UINT8 Speed
);
#endif