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Renamed ArmPlatformPkg/ArmVirtualizationPkg into ArmVirtPkg

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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17537 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin
2015-05-29 13:50:43 +00:00
committed by oliviermartin
parent 4c31caef17
commit 7fbd1eb231
57 changed files with 95 additions and 95 deletions
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392
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualization.dsc.inc
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@@ -1,392 +0,0 @@
#
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
[Defines]
DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F
[LibraryClasses.common]
!if $(TARGET) == RELEASE
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
!else
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
!endif
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
HobLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationDxeHobLib/ArmVirtualizationDxeHobLib.inf
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
#
# Allow dynamic PCDs
#
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
# 1/123 faster than Stm or Vstm version
#BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf
# Networking Requirements
NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
# ARM Architectural Libraries
CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf
PlatformPeiLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.inf
MemoryInitPeiLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationMemoryInitPeiLib/ArmVirtualizationMemoryInitPeiLib.inf
EfiResetSystemLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPsciResetSystemLib/ArmVirtualizationPsciResetSystemLib.inf
# ARM PL031 RTC Driver
RealTimeClockLib|ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.inf
# ARM PL011 UART Driver
PL011UartLib|ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
SerialPortLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf
SerialPortExtLib|EmbeddedPkg/Library/SerialPortExtLibNull/SerialPortExtLibNull.inf
#
# Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
# in the debugger will show load and unload commands for symbols. You can cut and paste this
# into the command window to load symbols. We should be able to use a script to do this, but
# the version of RVD I have does not support scripts accessing system memory.
#
#PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
#PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
# BDS Libraries
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
# PCI Libraries
PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
PciExpressLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
# USB Libraries
UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
XenIoMmioLib|OvmfPkg/Library/XenIoMmioLib/XenIoMmioLib.inf
#
# Secure Boot dependencies
#
!if $(SECURE_BOOT_ENABLE) == TRUE
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
# re-use the UserPhysicalPresent() dummy implementation from the ovmf tree
PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf
!endif
[LibraryClasses.common.SEC]
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf
DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
SerialPortLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
[LibraryClasses.common.PEI_CORE]
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
SerialPortLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
[LibraryClasses.common.PEIM]
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
SerialPortLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
[LibraryClasses.common.DXE_CORE]
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
[LibraryClasses.common.DXE_DRIVER]
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
[LibraryClasses.common.UEFI_APPLICATION]
UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
[LibraryClasses.common.UEFI_DRIVER]
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
[LibraryClasses.common.DXE_RUNTIME_DRIVER]
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
!endif
[LibraryClasses.ARM]
#
# It is not possible to prevent the ARM compiler for generic intrinsic functions.
# This library provides the instrinsic functions generate by a given compiler.
# [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
#
NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
# Add support for GCC stack protector
NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
[LibraryClasses.AARCH64]
NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
[BuildOptions]
RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
#
################################################################################
[PcdsFeatureFlag.common]
gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE
gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
#
# Control what commands are supported from the UI
# Turn these on and off to add features or save size
#
gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
# Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Virtualization Platform"
gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
# DEBUG_ASSERT_ENABLED 0x01
# DEBUG_PRINT_ENABLED 0x02
# DEBUG_CODE_ENABLED 0x04
# CLEAR_MEMORY_ENABLED 0x08
# ASSERT_BREAKPOINT_ENABLED 0x10
# ASSERT_DEADLOOP_ENABLED 0x20
!if $(TARGET) == RELEASE
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
!else
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
!endif
# DEBUG_INIT 0x00000001 // Initialization
# DEBUG_WARN 0x00000002 // Warnings
# DEBUG_LOAD 0x00000004 // Load events
# DEBUG_FS 0x00000008 // EFI File system
# DEBUG_POOL 0x00000010 // Alloc & Free's
# DEBUG_PAGE 0x00000020 // Alloc & Free's
# DEBUG_INFO 0x00000040 // Informational debug messages
# DEBUG_DISPATCH 0x00000080 // PEI/DXE/SMM Dispatchers
# DEBUG_VARIABLE 0x00000100 // Variable
# DEBUG_BM 0x00000400 // Boot Manager
# DEBUG_BLKIO 0x00001000 // BlkIo Driver
# DEBUG_NET 0x00004000 // SNI Driver
# DEBUG_UNDI 0x00010000 // UNDI Driver
# DEBUG_LOADFILE 0x00020000 // UNDI Driver
# DEBUG_EVENT 0x00080000 // Event messages
# DEBUG_GCD 0x00100000 // Global Coherency Database changes
# DEBUG_CACHE 0x00200000 // Memory range cachability changes
# DEBUG_VERBOSE 0x00400000 // Detailed debug messages that may
# // significantly impact boot performance
# DEBUG_ERROR 0x80000000 // Error
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|$(DEBUG_PRINT_ERROR_LEVEL)
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
#
# Optional feature to help prevent EFI memory map fragments
# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
# Values are in EFI Pages (4K). DXE Core will make sure that
# at least this much of each type of memory can be allocated
# from a single memory range. This way you only end up with
# maximum of two fragements for each type in the memory map
# (the memory used, and the free memory that was prereserved
# but not used).
#
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|50
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|20
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
#
# ARM Pcds
#
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000
!if $(SECURE_BOOT_ENABLE) == TRUE
# override the default values from SecurityPkg to ensure images from all sources are verified in secure boot
gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04
gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04
gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
!endif
[Components.common]
#
# Networking stack
#
MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
#
# UEFI application (Shell Embedded Boot Loader)
#
ShellPkg/Application/Shell/Shell.inf {
<LibraryClasses>
ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
<PcdsFixedAtBuild>
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
}

87
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
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@@ -1,87 +0,0 @@
#/** @file
#
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
DEC_SPECIFICATION = 0x00010005
PACKAGE_NAME = ArmVirtualizationPkg
PACKAGE_GUID = A0B31216-508E-4025-BEAB-56D836C66F0A
PACKAGE_VERSION = 0.1
################################################################################
#
# Include Section - list of Include Paths that are provided by this package.
# Comments are used for Keywords and Module Types.
#
# Supported Module Types:
# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
#
################################################################################
[Includes.common]
Include # Root include for the package
[Guids.common]
gArmVirtualizationTokenSpaceGuid = { 0x0B6F5CA7, 0x4F53, 0x445A, { 0xB7, 0x6E, 0x2E, 0x36, 0x5B, 0x80, 0x63, 0x66 } }
gEarlyPL011BaseAddressGuid = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80, 0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }
[PcdsFixedAtBuild, PcdsPatchableInModule]
#
# This is the physical address where the device tree is expected to be stored
# upon first entry into UEFI. This needs to be a FixedAtBuild PCD, so that we
# can do a first pass over the device tree in the SEC phase to discover the
# UART base address.
#
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0|UINT64|0x00000001
#
# Padding in bytes to add to the device tree allocation, so that the DTB can
# be modified in place (default: 256 bytes)
#
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeAllocationPadding|256|UINT32|0x00000002
[PcdsDynamic, PcdsFixedAtBuild]
#
# ARM PSCI function invocations can be done either through hypervisor
# calls (HVC) or secure monitor calls (SMC).
# PcdArmPsciMethod == 1 : use HVC
# PcdArmPsciMethod == 2 : use SMC
#
gArmVirtualizationTokenSpaceGuid.PcdArmPsciMethod|0|UINT32|0x00000003
gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x00000004
gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00000005
[PcdsFeatureFlag]
#
# "Map PCI MMIO as Cached"
#
# Due to the way Stage1 and Stage2 mappings are combined on Aarch64, and
# because KVM -- for the time being -- does not try to interfere with the
# Stage1 mappings, we must not set EFI_MEMORY_UC for emulated PCI MMIO
# regions.
#
# EFI_MEMORY_UC is mapped to Device-nGnRnE, and that Stage1 attribute would
# direct guest writes to host DRAM immediately, bypassing the cache
# regardless of Stage2 attributes. However, QEMU's reads of the same range
# can easily be served from the (stale) CPU cache.
#
# Setting this PCD to TRUE will use EFI_MEMORY_WB for mapping PCI MMIO
# regions, which ensures that guest writes to such regions go through the CPU
# cache. Strictly speaking this is wrong, but it is needed as a temporary
# workaround for emulated PCI devices. Setting the PCD to FALSE results in
# the theoretically correct EFI_MEMORY_UC mapping, and should be the long
# term choice, especially with assigned devices.
#
# The default is to turn off the kludge; DSC's can selectively enable it.
#
gArmVirtualizationTokenSpaceGuid.PcdKludgeMapPciMmioAsCached|FALSE|BOOLEAN|0x00000006

370
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.dsc
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@@ -1,370 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
PLATFORM_NAME = ArmVirtualizationQemu
PLATFORM_GUID = 37d7e986-f7e9-45c2-8067-e371421a626c
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/ArmVirtualizationQemu-$(ARCH)
SUPPORTED_ARCHITECTURES = AARCH64|ARM
BUILD_TARGETS = DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.fdf
#
# Defines for default states. These can be changed on the command line.
# -D FLAG=VALUE
#
DEFINE SECURE_BOOT_ENABLE = FALSE
!include ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualization.dsc.inc
[LibraryClasses.AARCH64]
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf
[LibraryClasses.ARM]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
[LibraryClasses.common]
# Virtio Support
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
QemuFwCfgLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
ArmPlatformLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/ArmVirtualizationPlatformLib.inf
ArmPlatformSysConfigLib|ArmPlatformPkg/Library/ArmPlatformSysConfigLibNull/ArmPlatformSysConfigLibNull.inf
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
NorFlashPlatformLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf
!ifdef INTEL_BDS
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf
!endif
[LibraryClasses.common.UEFI_DRIVER]
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
[LibraryClasses.AARCH64.SEC]
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
[LibraryClasses.ARM.SEC]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
[BuildOptions]
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVirtualizationPkg/Include
GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVirtualizationPkg/Include
*_*_AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVirtualizationPkg/Include
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
#
################################################################################
[PcdsFeatureFlag.common]
gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE
gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|TRUE
## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
# It could be set FALSE to save size.
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
# Activate KVM workaround for now.
gArmVirtualizationTokenSpaceGuid.PcdKludgeMapPciMmioAsCached|TRUE
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"QEMU"
gArmPlatformTokenSpaceGuid.PcdCoreCount|1
!if $(ARCH) == AARCH64
gArmTokenSpaceGuid.PcdVFPEnabled|1
!endif
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x4007c000
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
# Size of the region used by UEFI in permanent memory (Reserved 64MB)
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
#
# ARM Pcds
#
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
## Trustzone enable (to make the transition from EL3 to EL2 in ArmPlatformPkg/Sec)
gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE
#
# ARM PrimeCell
#
## PL011 - Serial Terminal
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
#
# ARM OS Loader
#
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux (EFI stub) on virtio31:hd0:part0"
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(837DCA9E-E874-4D82-B29A-23FE0E23D1E2,003E000A00000000)/HD(1,MBR,0x00000000,0x3F,0x19FC0)/Image"
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"root=/dev/vda2 console=ttyAMA0 earlycon uefi_debug"
gArmPlatformTokenSpaceGuid.PcdDefaultBootType|0
#
# Settings for ARM BDS -- use the serial console (ConIn & ConOut).
#
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenVt100()"
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenVt100()"
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
#
# ARM Virtual Architectural Timer -- fetch frequency from QEMU (TCG) or KVM
#
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0
#
# NV Storage PCDs. Use base of 0x04000000 for NOR1
#
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x04000000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00040000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x04040000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00040000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x04080000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00040000
# System Memory Base -- fixed at 0x4000_0000
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x40000000
# initial location of the device tree blob passed by QEMU -- base of DRAM
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x40000000
!ifdef INTEL_BDS
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
!endif
#
# The maximum physical I/O addressability of the processor, set with
# BuildCpuHob().
#
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
[PcdsDynamicDefault.common]
## If TRUE, OvmfPkg/AcpiPlatformDxe will not wait for PCI
# enumeration to complete before installing ACPI tables.
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
# System Memory Size -- 1 MB initially, actual size will be fetched from DT
gArmTokenSpaceGuid.PcdSystemMemorySize|0x00100000
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
#
# ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
## PL031 RealTimeClock
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
gArmPlatformTokenSpaceGuid.PcdPciBusMin|0x0
gArmPlatformTokenSpaceGuid.PcdPciBusMax|0x0
gArmPlatformTokenSpaceGuid.PcdPciIoBase|0x0
gArmPlatformTokenSpaceGuid.PcdPciIoSize|0x0
gArmPlatformTokenSpaceGuid.PcdPciIoTranslation|0x0
gArmPlatformTokenSpaceGuid.PcdPciMmio32Base|0x0
gArmPlatformTokenSpaceGuid.PcdPciMmio32Size|0x0
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x0
gArmVirtualizationTokenSpaceGuid.PcdArmPsciMethod|0
gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0
gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress|0x0
#
# Set video resolution for boot options and for text setup.
# PlatformDxe can set the former at runtime.
#
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform
#
################################################################################
[Components.common]
#
# PEI Phase modules
#
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf {
<LibraryClasses>
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
}
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
ArmPkg/Drivers/CpuPei/CpuPei.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf {
<LibraryClasses>
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
}
!else
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
!endif
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
<LibraryClasses>
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
#
# DXE
#
MdeModulePkg/Core/Dxe/DxeMain.inf {
<LibraryClasses>
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
}
MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
#
# Architectural Protocols
#
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
<LibraryClasses>
NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
}
SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableRuntimeDxe.inf {
<LibraryClasses>
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
}
SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
!else
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
!endif
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
EmbeddedPkg/SerialDxe/SerialDxe.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf
!else
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
!endif
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
#
# Platform Driver
#
ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf
OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
OvmfPkg/VirtioNetDxe/VirtioNet.inf
#
# FAT filesystem + GPT/MBR partitioning
#
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
#
# Bds
#
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
!ifdef INTEL_BDS
MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
!else
ArmPlatformPkg/Bds/Bds.inf
!endif
#
# SCSI Bus and Disk Driver
#
MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
#
# ACPI Support
#
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
OvmfPkg/AcpiPlatformDxe/QemuFwCfgAcpiPlatformDxe.inf
#
# PCI support
#
ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
#
# Video support
#
OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf {
<LibraryClasses>
BltLib|OptionRomPkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
}
OvmfPkg/PlatformDxe/Platform.inf
#
# USB Support
#
MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf

389
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.fdf
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@@ -1,389 +0,0 @@
#
# Copyright (c) 2011, 2013, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
################################################################################
#
# FD Section
# The [FD] Section is made up of the definition statements and a
# description of what goes into the Flash Device Image. Each FD section
# defines one flash "device" image. A flash device image may be one of
# the following: Removable media bootable image (like a boot floppy
# image,) an Option ROM image (that would be "flashed" into an add-in
# card,) a System "Flash" image (that would be burned into a system's
# flash) or an Update ("Capsule") image that will be used to update and
# existing system flash.
#
################################################################################
[FD.QEMU_EFI]
BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # QEMU assigns 0 - 0x8000000 for a BootROM
Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
ErasePolarity = 1
# This one is tricky, it must be: BlockSize * NumBlocks = Size
BlockSize = 0x00001000
NumBlocks = 0x200
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
# images within the flash device.
#
# Regions must be defined in ascending order and may not overlap.
#
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
# the pipe "|" character, followed by the size of the region, also in hex with the leading
# "0x" characters. Like:
# Offset|Size
# PcdOffsetCName|PcdSizeCName
# RegionType <FV, DATA, or FILE>
#
################################################################################
#
# UEFI has trouble dealing with FVs that reside at physical address 0x0.
# So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the
# real FV at offset 0x1000
#
0x00000000|0x00001000
DATA = {
!if $(ARCH) == AARCH64
0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM
!else
0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM
!endif
}
0x00001000|0x001ff000
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
FV = FVMAIN_COMPACT
################################################################################
#
# FV Section
#
# [FV] section is used to define what components or modules are placed within a flash
# device file. This section also defines order the components and modules are positioned
# within the image. The [FV] section consists of define statements, set statements and
# module statements.
#
################################################################################
[FV.FvMain]
BlockSize = 0x40
NumBlocks = 0 # This FV gets compressed so make it just big enough
FvAlignment = 16 # FV alignment and FV attributes setting.
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
APRIORI DXE {
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf
}
INF MdeModulePkg/Core/Dxe/DxeMain.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf
#
# PI DXE Drivers producing Architectural Protocols (EFI Services)
#
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableRuntimeDxe.inf
INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
!else
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
!endif
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
#
# Multiple Console IO support
#
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf
!else
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
!endif
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
#
# FAT filesystem + GPT/MBR partitioning
#
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
INF FatBinPkg/EnhancedFatDxe/Fat.inf
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
#
# Platform Driver
#
INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
INF OvmfPkg/VirtioNetDxe/VirtioNet.inf
INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
#
# UEFI application (Shell Embedded Boot Loader)
#
INF ShellPkg/Application/Shell/Shell.inf
#
# Bds
#
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
!ifdef INTEL_BDS
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
!else
INF ArmPlatformPkg/Bds/Bds.inf
!endif
#
# Networking stack
#
INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
#
# SCSI Bus and Disk Driver
#
INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
#
# ACPI Support
#
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
INF OvmfPkg/AcpiPlatformDxe/QemuFwCfgAcpiPlatformDxe.inf
#
# PCI support
#
INF ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
#
# Video support
#
INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf
INF OvmfPkg/PlatformDxe/Platform.inf
#
# USB Support
#
INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
!ifdef INTEL_BDS
#
# TianoCore logo (splash screen)
#
FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
SECTION RAW = MdeModulePkg/Logo/Logo.bmp
}
!endif
[FV.FVMAIN_COMPACT]
FvAlignment = 16
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
APRIORI PEI {
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
}
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
INF SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf
!else
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
!endif
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
################################################################################
#
# Rules are use with the [FV] section's module INF type to define
# how an FFS file is created for a given INF file. The following Rule are the default
# rules for the different module type. User can add the customized rules to define the
# content of the FFS file.
#
################################################################################
############################################################################
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
############################################################################
#
#[Rule.Common.DXE_DRIVER]
# FILE DRIVER = $(NAMED_GUID) {
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
# COMPRESS PI_STD {
# GUIDED {
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
# UI STRING="$(MODULE_NAME)" Optional
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
# }
# }
# }
#
############################################################################
[Rule.Common.SEC]
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
TE TE Align = 128 $(INF_OUTPUT)/$(MODULE_NAME).efi
}
[Rule.Common.PEI_CORE]
FILE PEI_CORE = $(NAMED_GUID) {
TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING ="$(MODULE_NAME)" Optional
}
[Rule.Common.PEIM]
FILE PEIM = $(NAMED_GUID) {
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.PEIM.TIANOCOMPRESSED]
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
}
[Rule.Common.DXE_CORE]
FILE DXE_CORE = $(NAMED_GUID) {
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.UEFI_DRIVER]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.DXE_DRIVER]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.DXE_RUNTIME_DRIVER]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.UEFI_APPLICATION]
FILE APPLICATION = $(NAMED_GUID) {
UI STRING ="$(MODULE_NAME)" Optional
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
}
[Rule.Common.UEFI_DRIVER.BINARY]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional |.depex
PE32 PE32 |.efi
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
[Rule.Common.UEFI_APPLICATION.BINARY]
FILE APPLICATION = $(NAMED_GUID) {
PE32 PE32 |.efi
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
[Rule.Common.USER_DEFINED.ACPITABLE]
FILE FREEFORM = $(NAMED_GUID) {
RAW ACPI |.acpi
RAW ASL |.aml
UI STRING="$(MODULE_NAME)" Optional
}

227
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationXen.dsc
View File

@@ -1,227 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
PLATFORM_NAME = ArmVirtualizationXen
PLATFORM_GUID = d1c43be3-3373-4a06-86fb-d1cb3083a207
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/ArmVirtualizationXen-$(ARCH)
SUPPORTED_ARCHITECTURES = AARCH64
BUILD_TARGETS = DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationXen.fdf
!include ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualization.dsc.inc
[LibraryClasses]
SerialPortLib|OvmfPkg/Library/XenConsoleSerialPortLib/XenConsoleSerialPortLib.inf
RealTimeClockLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/XenRealTimeClockLib/XenRealTimeClockLib.inf
XenHypercallLib|OvmfPkg/Library/XenHypercallLib/XenHypercallLib.inf
[LibraryClasses.AARCH64]
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf
[LibraryClasses.ARM]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
[LibraryClasses.common]
# Virtio Support
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
ArmPlatformLib|ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmXenRelocatablePlatformLib/ArmXenRelocatablePlatformLib.inf
ArmPlatformSysConfigLib|ArmPlatformPkg/Library/ArmPlatformSysConfigLibNull/ArmPlatformSysConfigLibNull.inf
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
[LibraryClasses.common.UEFI_DRIVER]
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
[LibraryClasses.AARCH64.SEC]
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
[LibraryClasses.ARM.SEC]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
[BuildOptions]
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVirtualizationPkg/Include
GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVirtualizationPkg/Include
GCC:*_*_AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVirtualizationPkg/Include
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
#
################################################################################
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"XEN-UEFI"
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
gArmPlatformTokenSpaceGuid.PcdCoreCount|1
!if $(ARCH) == AARCH64
gArmTokenSpaceGuid.PcdVFPEnabled|1
!endif
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
# Size of the region used by UEFI in permanent memory (Reserved 64MB)
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
#
# ARM Virtual Architectural Timer
#
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
[PcdsPatchableInModule.common]
#
# This will be overridden in the code
#
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x0
gArmTokenSpaceGuid.PcdSystemMemorySize|0x0
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0
gArmTokenSpaceGuid.PcdFdBaseAddress|0x0
gArmTokenSpaceGuid.PcdFvBaseAddress|0x0
[PcdsDynamicDefault.common]
## If TRUE, OvmfPkg/AcpiPlatformDxe will not wait for PCI
# enumeration to complete before installing ACPI tables.
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
#
# ARM General Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
## PL031 RealTimeClock
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
gArmPlatformTokenSpaceGuid.PcdPciBusMin|0x0
gArmPlatformTokenSpaceGuid.PcdPciBusMax|0x0
gArmPlatformTokenSpaceGuid.PcdPciIoBase|0x0
gArmPlatformTokenSpaceGuid.PcdPciIoSize|0x0
gArmPlatformTokenSpaceGuid.PcdPciIoTranslation|0x0
gArmPlatformTokenSpaceGuid.PcdPciMmio32Base|0x0
gArmPlatformTokenSpaceGuid.PcdPciMmio32Size|0x0
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x0
gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0
gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress|0x0
gArmVirtualizationTokenSpaceGuid.PcdArmPsciMethod|0
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform
#
################################################################################
[Components.common]
#
# PEI Phase modules
#
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf {
<LibraryClasses>
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
SerialPortLib|OvmfPkg/Library/XenConsoleSerialPortLib/XenConsoleSerialPortLib.inf
}
#
# DXE
#
MdeModulePkg/Core/Dxe/DxeMain.inf {
<LibraryClasses>
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
}
MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
#
# Architectural Protocols
#
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
EmbeddedPkg/SerialDxe/SerialDxe.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
#
# Platform Driver
#
ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf
#
# FAT filesystem + GPT/MBR partitioning
#
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
#
# Bds
#
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
OvmfPkg/XenBusDxe/XenBusDxe.inf
OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf

302
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationXen.fdf
View File

@@ -1,302 +0,0 @@
#
# Copyright (c) 2011, 2013, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
################################################################################
#
# FD Section
# The [FD] Section is made up of the definition statements and a
# description of what goes into the Flash Device Image. Each FD section
# defines one flash "device" image. A flash device image may be one of
# the following: Removable media bootable image (like a boot floppy
# image,) an Option ROM image (that would be "flashed" into an add-in
# card,) a System "Flash" image (that would be burned into a system's
# flash) or an Update ("Capsule") image that will be used to update and
# existing system flash.
#
################################################################################
[FD.XEN_EFI]
BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress
Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize
ErasePolarity = 1
# This one is tricky, it must be: BlockSize * NumBlocks = Size
BlockSize = 0x00001000
NumBlocks = 0x200
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
# images within the flash device.
#
# Regions must be defined in ascending order and may not overlap.
#
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
# the pipe "|" character, followed by the size of the region, also in hex with the leading
# "0x" characters. Like:
# Offset|Size
# PcdOffsetCName|PcdSizeCName
# RegionType <FV, DATA, or FILE>
#
################################################################################
#
# Implement the Linux kernel header layout so that the Xen loader will identify
# it as something bootable, and execute it with a FDT pointer in x0. This area
# will be reused to store a copy of the FDT so round it up to 8 KB.
#
0x00000000|0x00002000
DATA = {
0x01, 0x00, 0x00, 0x10, # code0: adr x1, .
0xff, 0x07, 0x00, 0x14, # code1: b 0x2000
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB
0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4
0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64"
0x00, 0x00, 0x00, 0x00 # res5
}
0x00002000|0x001fe000
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
FV = FVMAIN_COMPACT
################################################################################
#
# FV Section
#
# [FV] section is used to define what components or modules are placed within a flash
# device file. This section also defines order the components and modules are positioned
# within the image. The [FV] section consists of define statements, set statements and
# module statements.
#
################################################################################
[FV.FvMain]
BlockSize = 0x40
NumBlocks = 0 # This FV gets compressed so make it just big enough
FvAlignment = 16 # FV alignment and FV attributes setting.
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
APRIORI DXE {
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf
}
INF MdeModulePkg/Core/Dxe/DxeMain.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf
#
# PI DXE Drivers producing Architectural Protocols (EFI Services)
#
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
#
# Multiple Console IO support
#
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
#
# FAT filesystem + GPT/MBR partitioning
#
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
INF FatBinPkg/EnhancedFatDxe/Fat.inf
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
#
# UEFI application (Shell Embedded Boot Loader)
#
INF ShellPkg/Application/Shell/Shell.inf
#
# Bds
#
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
INF OvmfPkg/XenBusDxe/XenBusDxe.inf
INF OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
[FV.FVMAIN_COMPACT]
FvAlignment = 16
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
INF ArmPlatformPkg/ArmVirtualizationPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
################################################################################
#
# Rules are use with the [FV] section's module INF type to define
# how an FFS file is created for a given INF file. The following Rule are the default
# rules for the different module type. User can add the customized rules to define the
# content of the FFS file.
#
################################################################################
############################################################################
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
############################################################################
#
#[Rule.Common.DXE_DRIVER]
# FILE DRIVER = $(NAMED_GUID) {
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
# COMPRESS PI_STD {
# GUIDED {
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
# UI STRING="$(MODULE_NAME)" Optional
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
# }
# }
# }
#
############################################################################
[Rule.Common.SEC]
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi
}
[Rule.Common.PEI_CORE]
FILE PEI_CORE = $(NAMED_GUID) {
TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING ="$(MODULE_NAME)" Optional
}
[Rule.Common.PEIM]
FILE PEIM = $(NAMED_GUID) {
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.PEIM.TIANOCOMPRESSED]
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
}
[Rule.Common.DXE_CORE]
FILE DXE_CORE = $(NAMED_GUID) {
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.UEFI_DRIVER]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.DXE_DRIVER]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.DXE_RUNTIME_DRIVER]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
UI STRING="$(MODULE_NAME)" Optional
}
[Rule.Common.UEFI_APPLICATION]
FILE APPLICATION = $(NAMED_GUID) {
UI STRING ="$(MODULE_NAME)" Optional
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
}
[Rule.Common.UEFI_DRIVER.BINARY]
FILE DRIVER = $(NAMED_GUID) {
DXE_DEPEX DXE_DEPEX Optional |.depex
PE32 PE32 |.efi
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
[Rule.Common.UEFI_APPLICATION.BINARY]
FILE APPLICATION = $(NAMED_GUID) {
PE32 PE32 |.efi
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
[Rule.Common.USER_DEFINED.ACPITABLE]
FILE FREEFORM = $(NAMED_GUID) {
RAW ACPI |.acpi
RAW ASL |.aml
UI STRING="$(MODULE_NAME)" Optional
}

33
ArmPlatformPkg/ArmVirtualizationPkg/Include/ArmPlatform.h
View File

@@ -1,33 +0,0 @@
/** @file
* Header defining platform constants (Base addresses, sizes, flags)
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
* Copyright (c) 2014, Linaro Limited
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#ifndef __PLATFORM_H__
#define __PLATFORM_H__
//
// We don't care about this value, but the PL031 driver depends on the macro
// to exist: it will pass it on to our ArmPlatformSysConfigLib:ConfigGet()
// function, which just returns EFI_UNSUPPORTED.
//
#define SYS_CFG_RTC 0x0
#define QEMU_NOR_BLOCK_SIZE SIZE_256KB
#define QEMU_NOR0_BASE 0x0
#define QEMU_NOR0_SIZE SIZE_64MB
#define QEMU_NOR1_BASE 0x04000000
#define QEMU_NOR1_SIZE SIZE_64MB
#endif

27
ArmPlatformPkg/ArmVirtualizationPkg/Include/Guid/EarlyPL011BaseAddress.h
View File

@@ -1,27 +0,0 @@
/** @file
GUID for the HOB that caches the base address of the PL011 serial port, for
when PCD access is not available.
Copyright (C) 2014, Red Hat, Inc.
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License that accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __EARLY_PL011_BASE_ADDRESS_H__
#define __EARLY_PL011_BASE_ADDRESS_H__
#define EARLY_PL011_BASE_ADDRESS_GUID { \
0xB199DEA9, 0xFD5C, 0x4A84, \
{ 0x80, 0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } \
}
extern EFI_GUID gEarlyPL011BaseAddressGuid;
#endif

40
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationDxeHobLib/ArmVirtualizationDxeHobLib.inf
View File

@@ -1,40 +0,0 @@
## @file
# Instance of HOB Library using HOB list from EFI Configuration Table, with
# DebugLib dependency removed
#
# HOB Library implementation that retrieves the HOB List
# from the System Configuration Table in the EFI System Table.
#
# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ArmVirtualizationDxeHobLib
FILE_GUID = 3CD90EEC-EBF3-425D-AAE8-B16215AC4F50
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
LIBRARY_CLASS = HobLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER SMM_CORE DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER
CONSTRUCTOR = HobLibConstructor
[Sources]
HobLib.c
[Packages]
MdePkg/MdePkg.dec
[LibraryClasses]
BaseMemoryLib
[Guids]
gEfiHobListGuid ## CONSUMES ## SystemTable

577
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationDxeHobLib/HobLib.c
View File

@@ -1,577 +0,0 @@
/** @file
HOB Library implemenation for Dxe Phase with DebugLib dependency removed
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#define ASSERT(Expression) \
do { \
if (!(Expression)) { \
CpuDeadLoop (); \
} \
} while (FALSE)
#include <PiDxe.h>
#include <Guid/HobList.h>
#include <Library/HobLib.h>
#include <Library/UefiLib.h>
#include <Library/BaseMemoryLib.h>
VOID *mHobList = NULL;
/**
The constructor function caches the pointer to HOB list.
The constructor function gets the start address of HOB list from system configuration table.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The constructor successfully gets HobList.
@retval Other value The constructor can't get HobList.
**/
EFI_STATUS
EFIAPI
HobLibConstructor (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
UINTN Index;
for (Index = 0; Index < SystemTable->NumberOfTableEntries; Index++) {
if (CompareGuid (&gEfiHobListGuid, &(SystemTable->ConfigurationTable[Index].VendorGuid))) {
mHobList = SystemTable->ConfigurationTable[Index].VendorTable;
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
/**
Returns the pointer to the HOB list.
This function returns the pointer to first HOB in the list.
For PEI phase, the PEI service GetHobList() can be used to retrieve the pointer
to the HOB list. For the DXE phase, the HOB list pointer can be retrieved through
the EFI System Table by looking up theHOB list GUID in the System Configuration Table.
Since the System Configuration Table does not exist that the time the DXE Core is
launched, the DXE Core uses a global variable from the DXE Core Entry Point Library
to manage the pointer to the HOB list.
If the pointer to the HOB list is NULL, then ASSERT().
@return The pointer to the HOB list.
**/
VOID *
EFIAPI
GetHobList (
VOID
)
{
ASSERT (mHobList != NULL);
return mHobList;
}
/**
Returns the next instance of a HOB type from the starting HOB.
This function searches the first instance of a HOB type from the starting HOB pointer.
If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
unconditionally: it returns HobStart back if HobStart itself meets the requirement;
caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
If HobStart is NULL, then ASSERT().
@param Type The HOB type to return.
@param HobStart The starting HOB pointer to search from.
@return The next instance of a HOB type from the starting HOB.
**/
VOID *
EFIAPI
GetNextHob (
IN UINT16 Type,
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS Hob;
ASSERT (HobStart != NULL);
Hob.Raw = (UINT8 *) HobStart;
//
// Parse the HOB list until end of list or matching type is found.
//
while (!END_OF_HOB_LIST (Hob)) {
if (Hob.Header->HobType == Type) {
return Hob.Raw;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
return NULL;
}
/**
Returns the first instance of a HOB type among the whole HOB list.
This function searches the first instance of a HOB type among the whole HOB list.
If there does not exist such HOB type in the HOB list, it will return NULL.
If the pointer to the HOB list is NULL, then ASSERT().
@param Type The HOB type to return.
@return The next instance of a HOB type from the starting HOB.
**/
VOID *
EFIAPI
GetFirstHob (
IN UINT16 Type
)
{
VOID *HobList;
HobList = GetHobList ();
return GetNextHob (Type, HobList);
}
/**
Returns the next instance of the matched GUID HOB from the starting HOB.
This function searches the first instance of a HOB from the starting HOB pointer.
Such HOB should satisfy two conditions:
its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
If there does not exist such HOB from the starting HOB pointer, it will return NULL.
Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
to extract the data section and its size information, respectively.
In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer
unconditionally: it returns HobStart back if HobStart itself meets the requirement;
caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.
If Guid is NULL, then ASSERT().
If HobStart is NULL, then ASSERT().
@param Guid The GUID to match with in the HOB list.
@param HobStart A pointer to a Guid.
@return The next instance of the matched GUID HOB from the starting HOB.
**/
VOID *
EFIAPI
GetNextGuidHob (
IN CONST EFI_GUID *Guid,
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS GuidHob;
GuidHob.Raw = (UINT8 *) HobStart;
while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
break;
}
GuidHob.Raw = GET_NEXT_HOB (GuidHob);
}
return GuidHob.Raw;
}
/**
Returns the first instance of the matched GUID HOB among the whole HOB list.
This function searches the first instance of a HOB among the whole HOB list.
Such HOB should satisfy two conditions:
its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
If there does not exist such HOB from the starting HOB pointer, it will return NULL.
Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()
to extract the data section and its size information, respectively.
If the pointer to the HOB list is NULL, then ASSERT().
If Guid is NULL, then ASSERT().
@param Guid The GUID to match with in the HOB list.
@return The first instance of the matched GUID HOB among the whole HOB list.
**/
VOID *
EFIAPI
GetFirstGuidHob (
IN CONST EFI_GUID *Guid
)
{
VOID *HobList;
HobList = GetHobList ();
return GetNextGuidHob (Guid, HobList);
}
/**
Get the system boot mode from the HOB list.
This function returns the system boot mode information from the
PHIT HOB in HOB list.
If the pointer to the HOB list is NULL, then ASSERT().
@param VOID
@return The Boot Mode.
**/
EFI_BOOT_MODE
EFIAPI
GetBootModeHob (
VOID
)
{
EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;
HandOffHob = (EFI_HOB_HANDOFF_INFO_TABLE *) GetHobList ();
return HandOffHob->BootMode;
}
/**
Builds a HOB for a loaded PE32 module.
This function builds a HOB for a loaded PE32 module.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If ModuleName is NULL, then ASSERT().
If there is no additional space for HOB creation, then ASSERT().
@param ModuleName The GUID File Name of the module.
@param MemoryAllocationModule The 64 bit physical address of the module.
@param ModuleLength The length of the module in bytes.
@param EntryPoint The 64 bit physical address of the module entry point.
**/
VOID
EFIAPI
BuildModuleHob (
IN CONST EFI_GUID *ModuleName,
IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
IN UINT64 ModuleLength,
IN EFI_PHYSICAL_ADDRESS EntryPoint
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}
/**
Builds a HOB that describes a chunk of system memory.
This function builds a HOB that describes a chunk of system memory.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If there is no additional space for HOB creation, then ASSERT().
@param ResourceType The type of resource described by this HOB.
@param ResourceAttribute The resource attributes of the memory described by this HOB.
@param PhysicalStart The 64 bit physical address of memory described by this HOB.
@param NumberOfBytes The length of the memory described by this HOB in bytes.
**/
VOID
EFIAPI
BuildResourceDescriptorHob (
IN EFI_RESOURCE_TYPE ResourceType,
IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,
IN EFI_PHYSICAL_ADDRESS PhysicalStart,
IN UINT64 NumberOfBytes
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}
/**
Builds a customized HOB tagged with a GUID for identification and returns
the start address of GUID HOB data.
This function builds a customized HOB tagged with a GUID for identification
and returns the start address of GUID HOB data so that caller can fill the customized data.
The HOB Header and Name field is already stripped.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If Guid is NULL, then ASSERT().
If there is no additional space for HOB creation, then ASSERT().
If DataLength > (0xFFF8 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT().
HobLength is UINT16 and multiples of 8 bytes, so the max HobLength is 0xFFF8.
@param Guid The GUID to tag the customized HOB.
@param DataLength The size of the data payload for the GUID HOB.
@retval NULL The GUID HOB could not be allocated.
@retval others The start address of GUID HOB data.
**/
VOID *
EFIAPI
BuildGuidHob (
IN CONST EFI_GUID *Guid,
IN UINTN DataLength
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
return NULL;
}
/**
Builds a customized HOB tagged with a GUID for identification, copies the input data to the HOB
data field, and returns the start address of the GUID HOB data.
This function builds a customized HOB tagged with a GUID for identification and copies the input
data to the HOB data field and returns the start address of the GUID HOB data. It can only be
invoked during PEI phase; for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
The HOB Header and Name field is already stripped.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If Guid is NULL, then ASSERT().
If Data is NULL and DataLength > 0, then ASSERT().
If there is no additional space for HOB creation, then ASSERT().
If DataLength > (0xFFF8 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT().
HobLength is UINT16 and multiples of 8 bytes, so the max HobLength is 0xFFF8.
@param Guid The GUID to tag the customized HOB.
@param Data The data to be copied into the data field of the GUID HOB.
@param DataLength The size of the data payload for the GUID HOB.
@retval NULL The GUID HOB could not be allocated.
@retval others The start address of GUID HOB data.
**/
VOID *
EFIAPI
BuildGuidDataHob (
IN CONST EFI_GUID *Guid,
IN VOID *Data,
IN UINTN DataLength
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
return NULL;
}
/**
Builds a Firmware Volume HOB.
This function builds a Firmware Volume HOB.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If there is no additional space for HOB creation, then ASSERT().
@param BaseAddress The base address of the Firmware Volume.
@param Length The size of the Firmware Volume in bytes.
**/
VOID
EFIAPI
BuildFvHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}
/**
Builds a EFI_HOB_TYPE_FV2 HOB.
This function builds a EFI_HOB_TYPE_FV2 HOB.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If there is no additional space for HOB creation, then ASSERT().
@param BaseAddress The base address of the Firmware Volume.
@param Length The size of the Firmware Volume in bytes.
@param FvName The name of the Firmware Volume.
@param FileName The name of the file.
**/
VOID
EFIAPI
BuildFv2Hob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN CONST EFI_GUID *FvName,
IN CONST EFI_GUID *FileName
)
{
ASSERT (FALSE);
}
/**
Builds a Capsule Volume HOB.
This function builds a Capsule Volume HOB.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If the platform does not support Capsule Volume HOBs, then ASSERT().
If there is no additional space for HOB creation, then ASSERT().
@param BaseAddress The base address of the Capsule Volume.
@param Length The size of the Capsule Volume in bytes.
**/
VOID
EFIAPI
BuildCvHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}
/**
Builds a HOB for the CPU.
This function builds a HOB for the CPU.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If there is no additional space for HOB creation, then ASSERT().
@param SizeOfMemorySpace The maximum physical memory addressability of the processor.
@param SizeOfIoSpace The maximum physical I/O addressability of the processor.
**/
VOID
EFIAPI
BuildCpuHob (
IN UINT8 SizeOfMemorySpace,
IN UINT8 SizeOfIoSpace
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}
/**
Builds a HOB for the Stack.
This function builds a HOB for the stack.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If there is no additional space for HOB creation, then ASSERT().
@param BaseAddress The 64 bit physical address of the Stack.
@param Length The length of the stack in bytes.
**/
VOID
EFIAPI
BuildStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}
/**
Builds a HOB for the BSP store.
This function builds a HOB for BSP store.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If there is no additional space for HOB creation, then ASSERT().
@param BaseAddress The 64 bit physical address of the BSP.
@param Length The length of the BSP store in bytes.
@param MemoryType Type of memory allocated by this HOB.
**/
VOID
EFIAPI
BuildBspStoreHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}
/**
Builds a HOB for the memory allocation.
This function builds a HOB for the memory allocation.
It can only be invoked during PEI phase;
for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.
If there is no additional space for HOB creation, then ASSERT().
@param BaseAddress The 64 bit physical address of the memory.
@param Length The length of the memory allocation in bytes.
@param MemoryType Type of memory allocated by this HOB.
**/
VOID
EFIAPI
BuildMemoryAllocationHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
)
{
//
// PEI HOB is read only for DXE phase
//
ASSERT (FALSE);
}

101
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationMemoryInitPeiLib/ArmVirtualizationMemoryInitPeiLib.c
View File

@@ -1,101 +0,0 @@
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
* Copyright (c) 2014, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <PiPei.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PcdLib.h>
#include <Library/CacheMaintenanceLib.h>
VOID
BuildMemoryTypeInformationHob (
VOID
);
VOID
InitMmu (
VOID
)
{
ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;
VOID *TranslationTableBase;
UINTN TranslationTableSize;
RETURN_STATUS Status;
// Get Virtual Memory Map from the Platform Library
ArmPlatformGetVirtualMemoryMap (&MemoryTable);
//Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in
// DRAM (even at the top of DRAM as it is the first permanent memory allocation)
Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU\n"));
}
}
EFI_STATUS
EFIAPI
MemoryPeim (
IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,
IN UINT64 UefiMemorySize
)
{
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
// Ensure PcdSystemMemorySize has been set
ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);
//
// Now, the permanent memory has been installed, we can call AllocatePages()
//
ResourceAttributes = (
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED
);
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
PcdGet64 (PcdSystemMemoryBase),
PcdGet64 (PcdSystemMemorySize)
);
//
// When running under virtualization, the PI/UEFI memory region may be
// clean but not invalidated in system caches or in lower level caches
// on other CPUs. So invalidate the region by virtual address, to ensure
// that the contents we put there with the caches and MMU off will still
// be visible after turning them on.
//
InvalidateDataCacheRange ((VOID*)(UINTN)UefiMemoryBase, UefiMemorySize);
// Build Memory Allocation Hob
InitMmu ();
if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) {
// Optional feature that helps prevent EFI memory map fragmentation.
BuildMemoryTypeInformationHob ();
}
return EFI_SUCCESS;
}

67
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationMemoryInitPeiLib/ArmVirtualizationMemoryInitPeiLib.inf
View File

@@ -1,67 +0,0 @@
#/** @file
#
# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ArmVirtMemoryInitPeiLib
FILE_GUID = 021b6156-3cc8-4e99-85ee-13d8a871edf2
MODULE_TYPE = SEC
VERSION_STRING = 1.0
LIBRARY_CLASS = MemoryInitPeiLib
[Sources]
ArmVirtualizationMemoryInitPeiLib.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
DebugLib
HobLib
ArmLib
ArmPlatformLib
CacheMaintenanceLib
[Guids]
gEfiMemoryTypeInformationGuid
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
[FixedPcd]
gArmTokenSpaceGuid.PcdFdSize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmTokenSpaceGuid.PcdFdBaseAddress
[Depex]
TRUE

86
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/AARCH64/VirtHelper.S
View File

@@ -1,86 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLibV8.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmGetPhysAddrTop)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
ASM_PFX(ArmPlatformPeiBootAction):
ret
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
ldrh w0, [x0]
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
mov x0, #1
ret
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
ASM_PFX(ArmPlatformGetCorePosition):
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
ret
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_PFX(ArmGetPhysAddrTop):
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
ldrb w1, [x1, x0]
mov x0, #1
lsl x0, x0, x1
ret
//
// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
// physical address space support on this CPU:
// 0 == 32 bits, 1 == 36 bits, etc etc
// 6 and 7 are reserved
//
.LPARanges:
.byte 32, 36, 40, 42, 44, 48, -1, -1
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

74
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/ARM/VirtHelper.S
View File

@@ -1,74 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmGetPhysAddrTop)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
ASM_PFX(ArmPlatformPeiBootAction):
bx lr
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
mov r0, #1
bx lr
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
ASM_PFX(ArmPlatformGetCorePosition):
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #6
bx lr
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_PFX(ArmGetPhysAddrTop):
mov r0, #0x00000000
mov r1, #0x10000
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

79
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/ARM/VirtHelper.asm
View File

@@ -1,79 +0,0 @@
//
// Copyright (c) 2011-2014, ARM Limited. All rights reserved.
// Copyright (c) 2014, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
EXPORT ArmPlatformPeiBootAction
EXPORT ArmPlatformIsPrimaryCore
EXPORT ArmPlatformGetPrimaryCoreMpId
EXPORT ArmPlatformGetCorePosition
EXPORT ArmGetPhysAddrTop
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
IMPORT _gPcd_FixedAtBuild_PcdCoreCount
AREA VirtHelper, CODE, READONLY
ArmPlatformPeiBootAction FUNCTION
bx lr
ENDFUNC
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
bx lr
ENDFUNC
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
mov r0, #1
bx lr
ENDFUNC
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
ArmPlatformGetCorePosition FUNCTION
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #6
bx lr
ENDFUNC
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ArmGetPhysAddrTop FUNCTION
mov r0, #0x00000000
mov r1, #0x10000
bx lr
ENDFUNC
END

63
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/ArmVirtualizationPlatformLib.inf
View File

@@ -1,63 +0,0 @@
#/* @file
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#*/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ArmVirtualizationPlatformLib
FILE_GUID = 00214cc1-06d1-45fe-9700-dca5726ad7bf
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = ArmPlatformLib|SEC PEIM
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
[LibraryClasses]
IoLib
MemoryAllocationLib
ArmLib
PrintLib
FdtLib
[Sources.common]
Virt.c
VirtMem.c
[Sources.AARCH64]
AARCH64/VirtHelper.S
[Sources.ARM]
ARM/VirtHelper.S | GCC
ARM/VirtHelper.asm | RVCT
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemorySize
[FixedPcd]
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdFdBaseAddress
gArmTokenSpaceGuid.PcdFdSize

155
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
View File

@@ -1,155 +0,0 @@
/** @file
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
* Copyright (c) 2014, Linaro Limited. All rights reserved.
* Copyright (c) 2014, Red Hat, Inc.
*
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/IoLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <ArmPlatform.h>
#include <libfdt.h>
#include <Pi/PiBootMode.h>
#include <Uefi/UefiBaseType.h>
#include <Uefi/UefiMultiPhase.h>
/**
Return the current Boot Mode
This function returns the boot reason on the platform
@return Return the current Boot Mode of the platform
**/
EFI_BOOT_MODE
ArmPlatformGetBootMode (
VOID
)
{
return BOOT_WITH_FULL_CONFIGURATION;
}
/**
This function is called by PrePeiCore, in the SEC phase.
**/
RETURN_STATUS
ArmPlatformInitialize (
IN UINTN MpId
)
{
//
// We are relying on ArmPlatformInitializeSystemMemory () being called from
// InitializeMemory (), which only occurs if the following feature is disabled
//
ASSERT (!FeaturePcdGet (PcdSystemMemoryInitializeInSec));
return RETURN_SUCCESS;
}
/**
Initialize the system (or sometimes called permanent) memory
This memory is generally represented by the DRAM.
This function is called from InitializeMemory() in MemoryInitPeim, in the PEI
phase.
**/
VOID
ArmPlatformInitializeSystemMemory (
VOID
)
{
VOID *DeviceTreeBase;
INT32 Node, Prev;
UINT64 NewBase;
UINT64 NewSize;
CONST CHAR8 *Type;
INT32 Len;
CONST UINT64 *RegProp;
NewBase = 0;
NewSize = 0;
DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
ASSERT (DeviceTreeBase != NULL);
//
// Make sure we have a valid device tree blob
//
ASSERT (fdt_check_header (DeviceTreeBase) == 0);
//
// Look for a memory node
//
for (Prev = 0;; Prev = Node) {
Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
if (Node < 0) {
break;
}
//
// Check for memory node
//
Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len);
if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) {
//
// Get the 'reg' property of this node. For now, we will assume
// two 8 byte quantities for base and size, respectively.
//
RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
if (RegProp != 0 && Len == (2 * sizeof (UINT64))) {
NewBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
NewSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));
//
// Make sure the start of DRAM matches our expectation
//
ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase);
PcdSet64 (PcdSystemMemorySize, NewSize);
DEBUG ((EFI_D_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n",
__FUNCTION__, NewBase, NewBase + NewSize - 1));
} else {
DEBUG ((EFI_D_ERROR, "%a: Failed to parse FDT memory node\n",
__FUNCTION__));
}
break;
}
}
//
// We need to make sure that the machine we are running on has at least
// 128 MB of memory configured, and is currently executing this binary from
// NOR flash. This prevents a device tree image in DRAM from getting
// clobbered when our caller installs permanent PEI RAM, before we have a
// chance of marking its location as reserved or copy it to a freshly
// allocated block in the permanent PEI RAM in the platform PEIM.
//
ASSERT (NewSize >= SIZE_128MB);
ASSERT (
(((UINT64)PcdGet64 (PcdFdBaseAddress) +
(UINT64)PcdGet32 (PcdFdSize)) <= NewBase) ||
((UINT64)PcdGet64 (PcdFdBaseAddress) >= (NewBase + NewSize)));
}
VOID
ArmPlatformGetPlatformPpiList (
OUT UINTN *PpiListSize,
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
)
{
*PpiListSize = 0;
*PpiList = NULL;
}

107
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/VirtMem.c
View File

@@ -1,107 +0,0 @@
/** @file
*
* Copyright (c) 2014, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/ArmPlatformGlobalVariableLib.h>
#include <ArmPlatform.h>
// Number of Virtual Memory Map Descriptors
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
// DDR attributes
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
EFI_PHYSICAL_ADDRESS
ArmGetPhysAddrTop (
VOID
);
/**
Return the Virtual Memory Map of your platform
This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU
on your platform.
@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR
describing a Physical-to-Virtual Memory
mapping. This array must be ended by a
zero-filled entry
**/
VOID
ArmPlatformGetVirtualMemoryMap (
IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
)
{
ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
ASSERT (VirtualMemoryMap != NULL);
VirtualMemoryTable = AllocatePages (
EFI_SIZE_TO_PAGES (
sizeof (ARM_MEMORY_REGION_DESCRIPTOR)
* MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS
)
);
if (VirtualMemoryTable == NULL) {
DEBUG ((EFI_D_ERROR, "%a: Error: Failed AllocatePages()\n", __FUNCTION__));
return;
}
if (FeaturePcdGet (PcdCacheEnable) == TRUE) {
CacheAttributes = DDR_ATTRIBUTES_CACHED;
} else {
CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
}
// System DRAM
VirtualMemoryTable[0].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
VirtualMemoryTable[0].VirtualBase = VirtualMemoryTable[0].PhysicalBase;
VirtualMemoryTable[0].Length = PcdGet64 (PcdSystemMemorySize);
VirtualMemoryTable[0].Attributes = CacheAttributes;
DEBUG ((EFI_D_INFO, "%a: Dumping System DRAM Memory Map:\n"
"\tPhysicalBase: 0x%lX\n"
"\tVirtualBase: 0x%lX\n"
"\tLength: 0x%lX\n",
__FUNCTION__,
VirtualMemoryTable[0].PhysicalBase,
VirtualMemoryTable[0].VirtualBase,
VirtualMemoryTable[0].Length));
// Peripheral space before DRAM
VirtualMemoryTable[1].PhysicalBase = 0x0;
VirtualMemoryTable[1].VirtualBase = 0x0;
VirtualMemoryTable[1].Length = VirtualMemoryTable[0].PhysicalBase;
VirtualMemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Peripheral space after DRAM
VirtualMemoryTable[2].PhysicalBase = VirtualMemoryTable[0].Length + VirtualMemoryTable[1].Length;
VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase;
VirtualMemoryTable[2].Length = ArmGetPhysAddrTop () - VirtualMemoryTable[2].PhysicalBase;
VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// End of Table
ZeroMem (&VirtualMemoryTable[3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
*VirtualMemoryMap = VirtualMemoryTable;
}

125
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPsciResetSystemLib/ArmVirtualizationPsciResetSystemLib.c
View File

@@ -1,125 +0,0 @@
/** @file
Support ResetSystem Runtime call using PSCI calls
Note: A similar library is implemented in
ArmPkg/Library/ArmPsciResetSystemLib. Similar issues might
exist in this implementation too.
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiDxe.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/EfiResetSystemLib.h>
#include <Library/ArmSmcLib.h>
#include <Library/ArmHvcLib.h>
#include <IndustryStandard/ArmStdSmc.h>
STATIC UINT32 mArmPsciMethod;
RETURN_STATUS
EFIAPI
ArmPsciResetSystemLibConstructor (
VOID
)
{
mArmPsciMethod = PcdGet32 (PcdArmPsciMethod);
return RETURN_SUCCESS;
}
/**
Resets the entire platform.
@param ResetType The type of reset to perform.
@param ResetStatus The status code for the reset.
@param DataSize The size, in bytes, of WatchdogData.
@param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or
EfiResetShutdown the data buffer starts with a Null-terminated
Unicode string, optionally followed by additional binary data.
**/
EFI_STATUS
EFIAPI
LibResetSystem (
IN EFI_RESET_TYPE ResetType,
IN EFI_STATUS ResetStatus,
IN UINTN DataSize,
IN CHAR16 *ResetData OPTIONAL
)
{
ARM_SMC_ARGS ArmSmcArgs;
ARM_HVC_ARGS ArmHvcArgs;
switch (ResetType) {
case EfiResetPlatformSpecific:
// Map the platform specific reset as reboot
case EfiResetWarm:
// Map a warm reset into a cold reset
case EfiResetCold:
// Send a PSCI 0.2 SYSTEM_RESET command
ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET;
ArmHvcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET;
break;
case EfiResetShutdown:
// Send a PSCI 0.2 SYSTEM_OFF command
ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_OFF;
ArmHvcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_OFF;
break;
default:
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
switch (mArmPsciMethod) {
case 1:
ArmCallHvc (&ArmHvcArgs);
break;
case 2:
ArmCallSmc (&ArmSmcArgs);
break;
default:
DEBUG ((EFI_D_ERROR, "%a: no PSCI method defined\n", __FUNCTION__));
return EFI_UNSUPPORTED;
}
// We should never be here
DEBUG ((EFI_D_ERROR, "%a: PSCI Reset failed\n", __FUNCTION__));
CpuDeadLoop ();
return EFI_UNSUPPORTED;
}
/**
Initialize any infrastructure required for LibResetSystem () to function.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
**/
EFI_STATUS
EFIAPI
LibInitializeResetSystem (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
return EFI_SUCCESS;
}

42
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPsciResetSystemLib/ArmVirtualizationPsciResetSystemLib.inf
View File

@@ -1,42 +0,0 @@
#/** @file
# Reset System lib using PSCI hypervisor or secure monitor calls
#
# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ArmVirtualizationPsciResetSystemLib
FILE_GUID = c81d76ed-66fa-44a3-ac4a-f163120187a9
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = EfiResetSystemLib
CONSTRUCTOR = ArmPsciResetSystemLibConstructor
[Sources]
ArmVirtualizationPsciResetSystemLib.c
[Packages]
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
[LibraryClasses]
DebugLib
BaseLib
ArmSmcLib
ArmHvcLib
[Pcd]
gArmVirtualizationTokenSpaceGuid.PcdArmPsciMethod

237
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/MemnodeParser.S
View File

@@ -1,237 +0,0 @@
/*
* Copyright (c) 2014, Linaro Ltd. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*/
/*
* Theory of operation
* -------------------
*
* This code parses a Flattened Device Tree binary (DTB) to find the base of
* system RAM. It is written in assembly so that it can be executed before a
* stack has been set up.
*
* To find the base of system RAM, we have to traverse the FDT to find a memory
* node. In the context of this implementation, the first node that has a
* device_type property with the value 'memory' and a 'reg' property is
* acceptable, and the name of the node (memory[@xxx]) is ignored, as are any
* other nodes that match the above constraints.
*
* In pseudo code, this implementation does the following:
*
* for each node {
* have_device_type = false
* have_reg = false
*
* for each property {
* if property value == 'memory' {
* if property name == 'device_type' {
* have_device_type = true
* }
* } else {
* if property name == 'reg' {
* have_reg = true
* membase = property value[0]
* memsize = property value[1]
* }
* }
* }
* if have_device_type and have_reg {
* return membase and memsize
* }
* }
* return NOT_FOUND
*/
#define FDT_MAGIC 0xedfe0dd0
#define FDT_BEGIN_NODE 0x1
#define FDT_END_NODE 0x2
#define FDT_PROP 0x3
#define FDT_END 0x9
xMEMSIZE .req x0 // recorded system RAM size
xMEMBASE .req x1 // recorded system RAM base
xLR .req x8 // our preserved link register
xDTP .req x9 // pointer to traverse the DT structure
xSTRTAB .req x10 // pointer to the DTB string table
xMEMNODE .req x11 // bit field to record found properties
#define HAVE_REG 0x1
#define HAVE_DEVICE_TYPE 0x2
.text
.align 3
_memory:
.asciz "memory"
_reg:
.asciz "reg"
_device_type:
.asciz "device_type"
/*
* Compare strings in x4 and x5, return in w7
*/
.align 3
strcmp:
ldrb w2, [x4], #1
ldrb w3, [x5], #1
subs w7, w2, w3
cbz w2, 0f
cbz w3, 0f
beq strcmp
0: ret
.globl find_memnode
find_memnode:
// preserve link register
mov xLR, x30
mov xDTP, x0
/*
* Check the DTB magic at offset 0
*/
movz w4, #:abs_g0_nc:FDT_MAGIC
movk w4, #:abs_g1:FDT_MAGIC
ldr w5, [xDTP]
cmp w4, w5
bne err_invalid_magic
/*
* Read the string offset and store it for later use
*/
ldr w4, [xDTP, #12]
rev w4, w4
add xSTRTAB, xDTP, x4
/*
* Read the struct offset and add it to the DT pointer
*/
ldr w5, [xDTP, #8]
rev w5, w5
add xDTP, xDTP, x5
/*
* Check current tag for FDT_BEGIN_NODE
*/
ldr w5, [xDTP]
rev w5, w5
cmp w5, #FDT_BEGIN_NODE
bne err_unexpected_begin_tag
begin_node:
mov xMEMNODE, #0
add xDTP, xDTP, #4
/*
* Advance xDTP past NULL terminated string
*/
0: ldrb w4, [xDTP], #1
cbnz w4, 0b
next_tag:
/*
* Align the DT pointer xDTP to the next 32-bit boundary
*/
add xDTP, xDTP, #3
and xDTP, xDTP, #~3
/*
* Read the next tag, could be BEGIN_NODE, END_NODE, PROP, END
*/
ldr w5, [xDTP]
rev w5, w5
cmp w5, #FDT_BEGIN_NODE
beq begin_node
cmp w5, #FDT_END_NODE
beq end_node
cmp w5, #FDT_PROP
beq prop_node
cmp w5, #FDT_END
beq err_end_of_fdt
b err_unexpected_tag
prop_node:
/*
* If propname == 'reg', record as membase and memsize
* If propname == 'device_type' and value == 'memory',
* set the 'is_memnode' flag for this node
*/
ldr w6, [xDTP, #4]
add xDTP, xDTP, #12
rev w6, w6
mov x5, xDTP
adr x4, _memory
bl strcmp
/*
* Get handle to property name
*/
ldr w5, [xDTP, #-4]
rev w5, w5
add x5, xSTRTAB, x5
cbz w7, check_device_type
/*
* Check for 'reg' property
*/
adr x4, _reg
bl strcmp
cbnz w7, inc_and_next_tag
/*
* Extract two 64-bit quantities from the 'reg' property. These values
* will only be used if the node also turns out to have a device_type
* property with a value of 'memory'.
*
* NOTE: xDTP is only guaranteed to be 32 bit aligned, and we are most
* likely executing with the MMU off, so we cannot use 64 bit
* wide accesses here.
*/
ldp w4, w5, [xDTP]
orr xMEMBASE, x4, x5, lsl #32
ldp w4, w5, [xDTP, #8]
orr xMEMSIZE, x4, x5, lsl #32
rev xMEMBASE, xMEMBASE
rev xMEMSIZE, xMEMSIZE
orr xMEMNODE, xMEMNODE, #HAVE_REG
b inc_and_next_tag
check_device_type:
/*
* Check whether the current property's name is 'device_type'
*/
adr x4, _device_type
bl strcmp
cbnz w7, inc_and_next_tag
orr xMEMNODE, xMEMNODE, #HAVE_DEVICE_TYPE
inc_and_next_tag:
add xDTP, xDTP, x6
b next_tag
end_node:
/*
* Check for device_type = memory and reg = xxxx
* If we have both, we are done
*/
add xDTP, xDTP, #4
cmp xMEMNODE, #(HAVE_REG | HAVE_DEVICE_TYPE)
bne next_tag
ret xLR
err_invalid_magic:
err_unexpected_begin_tag:
err_unexpected_tag:
err_end_of_fdt:
wfi

167
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
View File

@@ -1,167 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLibV8.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmGetPhysAddrTop)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
.LFdtMagic:
.byte 0xd0, 0x0d, 0xfe, 0xed
.LArm64LinuxMagic:
.byte 0x41, 0x52, 0x4d, 0x64
// VOID
// ArmPlatformPeiBootAction (
// VOID *DeviceTreeBaseAddress, // passed by loader in x0
// VOID *ImageBase // passed by FDF trampoline in x1
// );
ASM_PFX(ArmPlatformPeiBootAction):
mov x29, x30 // preserve LR
//
// If we are booting from RAM using the Linux kernel boot protocol, x0 will
// point to the DTB image in memory. Otherwise, we are just coming out of
// reset, and x0 will be 0. Check also the FDT magic.
//
cbz x0, .Lout
ldr w8, .LFdtMagic
ldr w9, [x0]
cmp w8, w9
bne .Lout
//
// The base of the runtime image has been preserved in x1. Check whether
// the expected magic number can be found in the header.
//
ldr w8, .LArm64LinuxMagic
ldr w9, [x1, #0x38]
cmp w8, w9
bne .Lout
//
//
// OK, so far so good. We have confirmed that we likely have a DTB and are
// booting via the arm64 Linux boot protocol. Update the base-of-image PCD
// to the actual relocated value, and add the shift of PcdFdBaseAddress to
// PcdFvBaseAddress as well
//
adr x8, PcdGet64 (PcdFdBaseAddress)
adr x9, PcdGet64 (PcdFvBaseAddress)
ldr x6, [x8]
ldr x7, [x9]
sub x7, x7, x6
add x7, x7, x1
str x1, [x8]
str x7, [x9]
//
// Copy the DTB to the slack space right after the 64 byte arm64/Linux style
// image header at the base of this image (defined in the FDF), and record the
// pointer in PcdDeviceTreeInitialBaseAddress.
//
adr x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
add x1, x1, #0x40
str x1, [x8]
ldr w8, [x0, #4] // get DTB size (BE)
mov x9, x1
rev w8, w8
add x8, x8, x0
0:ldp x6, x7, [x0], #16
stp x6, x7, [x9], #16
cmp x0, x8
blt 0b
//
// Discover the memory size and offset from the DTB, and record in the
// respective PCDs
//
mov x0, x1
bl find_memnode // returns (size, base) size in (x0, x1)
cbz x0, .Lout
adr x8, PcdGet64 (PcdSystemMemorySize)
adr x9, PcdGet64 (PcdSystemMemoryBase)
str x0, [x8]
str x1, [x9]
.Lout:
ret x29
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
ldrh w0, [x0]
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
mov x0, #1
ret
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
ASM_PFX(ArmPlatformGetCorePosition):
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
ret
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_PFX(ArmGetPhysAddrTop):
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
ldrb w1, [x1, x0]
mov x0, #1
lsl x0, x0, x1
ret
//
// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
// physical address space support on this CPU:
// 0 == 32 bits, 1 == 36 bits, etc etc
// 6 and 7 are reserved
//
.LPARanges:
.byte 32, 36, 40, 42, 44, 48, -1, -1
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

59
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmXenRelocatablePlatformLib/ArmXenRelocatablePlatformLib.inf
View File

@@ -1,59 +0,0 @@
#/* @file
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#*/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ArmXenRelocatablePlatformLib
FILE_GUID = c8602718-4faa-4119-90ca-cae72509ac4c
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = ArmPlatformLib|SEC PEIM
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
[LibraryClasses]
IoLib
ArmLib
PrintLib
[Sources.common]
RelocatableVirt.c
XenVirtMem.c
[Sources.AARCH64]
AARCH64/RelocatableVirtHelper.S
AARCH64/MemnodeParser.S
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
[PatchPcd]
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
gArmTokenSpaceGuid.PcdFdBaseAddress
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdFdSize

71
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmXenRelocatablePlatformLib/RelocatableVirt.c
View File

@@ -1,71 +0,0 @@
/** @file
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
* Copyright (c) 2014, Linaro Limited. All rights reserved.
* Copyright (c) 2014, Red Hat, Inc.
*
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/IoLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <ArmPlatform.h>
#include <Pi/PiBootMode.h>
/**
Return the current Boot Mode
This function returns the boot reason on the platform
@return Return the current Boot Mode of the platform
**/
EFI_BOOT_MODE
ArmPlatformGetBootMode (
VOID
)
{
return BOOT_WITH_FULL_CONFIGURATION;
}
/**
This function is called by PrePeiCore, in the SEC phase.
**/
RETURN_STATUS
ArmPlatformInitialize (
IN UINTN MpId
)
{
//
// We are relying on ArmPlatformInitializeSystemMemory () being called from
// InitializeMemory (), which only occurs if the following feature is disabled
//
ASSERT (!FeaturePcdGet (PcdSystemMemoryInitializeInSec));
return RETURN_SUCCESS;
}
VOID
ArmPlatformInitializeSystemMemory (
VOID
)
{
}
VOID
ArmPlatformGetPlatformPpiList (
OUT UINTN *PpiListSize,
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
)
{
*PpiListSize = 0;
*PpiList = NULL;
}

83
ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmXenRelocatablePlatformLib/XenVirtMem.c
View File

@@ -1,83 +0,0 @@
/** @file
*
* Copyright (c) 2014, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <ArmPlatform.h>
// Number of Virtual Memory Map Descriptors
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 2
// DDR attributes
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
EFI_PHYSICAL_ADDRESS
ArmGetPhysAddrTop (
VOID
);
/**
Return the Virtual Memory Map of your platform
This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU
on your platform.
@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR
describing a Physical-to-Virtual Memory
mapping. This array must be ended by a
zero-filled entry
**/
VOID
ArmPlatformGetVirtualMemoryMap (
IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
)
{
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
ASSERT (VirtualMemoryMap != NULL);
VirtualMemoryTable = AllocatePages (
EFI_SIZE_TO_PAGES (
sizeof (ARM_MEMORY_REGION_DESCRIPTOR)
* MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS
)
);
if (VirtualMemoryTable == NULL) {
DEBUG ((EFI_D_ERROR, "%a: Error: Failed AllocatePages()\n", __FUNCTION__));
return;
}
//
// Map the entire physical memory space as cached. The only device
// we care about is the GIC, which will be stage 2 mapped as a device
// by the hypervisor, which will override the cached mapping we install
// here.
//
VirtualMemoryTable[0].PhysicalBase = 0x0;
VirtualMemoryTable[0].VirtualBase = 0x0;
VirtualMemoryTable[0].Length = ArmGetPhysAddrTop ();
VirtualMemoryTable[0].Attributes = DDR_ATTRIBUTES_CACHED;
// End of Table
ZeroMem (&VirtualMemoryTable[1], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
*VirtualMemoryMap = VirtualMemoryTable;
}

46
ArmPlatformPkg/ArmVirtualizationPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
View File

@@ -1,46 +0,0 @@
## @file
# Instance of PCI Express Library using the 256 MB PCI Express MMIO window.
#
# PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
# PCI Configuration cycles. Layers on top of an I/O Library instance.
#
# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BaseCachingPciExpressLib
FILE_GUID = 3f3ffd80-04dc-4a2b-9d25-ecca55c2e520
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = PciExpressLib|DXE_DRIVER UEFI_DRIVER UEFI_APPLICATION
CONSTRUCTOR = PciExpressLibInitialize
#
# VALID_ARCHITECTURES = ARM AARCH64
#
[Sources]
PciExpressLib.c
[Packages]
MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
PcdLib
DebugLib
IoLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES

1429
ArmPlatformPkg/ArmVirtualizationPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
View File

File diff suppressed because it is too large Load Diff

185
ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.c
View File

@@ -1,185 +0,0 @@
/** @file
Serial I/O Port library functions with base address discovered from FDT
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2012 - 2013, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Base.h>
#include <Library/PcdLib.h>
#include <Library/SerialPortLib.h>
#include <Library/SerialPortExtLib.h>
#include <libfdt.h>
#include <Drivers/PL011Uart.h>
RETURN_STATUS
EFIAPI
SerialPortInitialize (
VOID
)
{
//
// This SerialPortInitialize() function is completely empty, for a number of
// reasons:
// - if we are executing from flash, it is hard to keep state (i.e., store the
// discovered base address in a global), and the most robust way to deal
// with this is to discover the base address at every Write ();
// - calls to the Write() function in this module may be issued before this
// initialization function is called: this is not a problem when the base
// address of the UART is hardcoded, and only the baud rate may be wrong,
// but if we don't know the base address yet, we may be poking into memory
// that does not tolerate being poked into;
// - SEC and PEI phases produce debug output only, so with debug disabled, no
// initialization (or device tree parsing) is performed at all.
//
// Note that this means that on *every* Write () call, the device tree will be
// parsed and the UART re-initialized. However, this is a small price to pay
// for having serial debug output on a UART with no fixed base address.
//
return RETURN_SUCCESS;
}
STATIC
UINT64
SerialPortGetBaseAddress (
VOID
)
{
UINT64 BaudRate;
UINT32 ReceiveFifoDepth;
EFI_PARITY_TYPE Parity;
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
VOID *DeviceTreeBase;
INT32 Node, Prev;
INT32 Len;
CONST CHAR8 *Compatible;
CONST CHAR8 *CompatibleItem;
CONST UINT64 *RegProperty;
UINTN UartBase;
RETURN_STATUS Status;
DeviceTreeBase = (VOID *)(UINTN)FixedPcdGet64 (PcdDeviceTreeInitialBaseAddress);
if ((DeviceTreeBase == NULL) || (fdt_check_header (DeviceTreeBase) != 0)) {
return 0;
}
//
// Enumerate all FDT nodes looking for a PL011 and capture its base address
//
for (Prev = 0;; Prev = Node) {
Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
if (Node < 0) {
break;
}
Compatible = fdt_getprop (DeviceTreeBase, Node, "compatible", &Len);
if (Compatible == NULL) {
continue;
}
//
// Iterate over the NULL-separated items in the compatible string
//
for (CompatibleItem = Compatible; CompatibleItem < Compatible + Len;
CompatibleItem += 1 + AsciiStrLen (CompatibleItem)) {
if (AsciiStrCmp (CompatibleItem, "arm,pl011") == 0) {
RegProperty = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
if (Len != 16) {
return 0;
}
UartBase = (UINTN)fdt64_to_cpu (ReadUnaligned64 (RegProperty));
BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);
ReceiveFifoDepth = 0; // Use the default value for Fifo depth
Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);
Status = PL011UartInitializePort (
UartBase,
&BaudRate, &ReceiveFifoDepth, &Parity, &DataBits, &StopBits);
if (!EFI_ERROR (Status)) {
return UartBase;
}
}
}
}
return 0;
}
/**
Write data to serial device.
@param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Write data failed.
@retval !0 Actual number of bytes written to serial device.
**/
UINTN
EFIAPI
SerialPortWrite (
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
UINT64 SerialRegisterBase;
SerialRegisterBase = SerialPortGetBaseAddress ();
if (SerialRegisterBase != 0) {
return PL011UartWrite ((UINTN)SerialRegisterBase, Buffer, NumberOfBytes);
}
return 0;
}
/**
Read data from serial device and save the data in buffer.
@param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Size of Buffer[].
@retval 0 Read data failed.
@retval !0 Actual number of bytes read from serial device.
**/
UINTN
EFIAPI
SerialPortRead (
OUT UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
return 0;
}
/**
Check to see if any data is available to be read from the debug device.
@retval TRUE At least one byte of data is available to be read
@retval FALSE No data is available to be read
**/
BOOLEAN
EFIAPI
SerialPortPoll (
VOID
)
{
return FALSE;
}

45
ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
View File

@@ -1,45 +0,0 @@
#/** @file
#
# Component description file for EarlyFdtPL011SerialPortLib module
#
# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = EarlyFdtPL011SerialPortLib
FILE_GUID = 0983616A-49BC-4732-B531-4AF98D2056F0
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerialPortLib|SEC PEI_CORE PEIM
[Sources.common]
EarlyFdtPL011SerialPortLib.c
[LibraryClasses]
PL011UartLib
PcdLib
FdtLib
[Packages]
MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
[FixedPcd]
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits

150
ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.c
View File

@@ -1,150 +0,0 @@
/** @file
Serial I/O Port library functions with base address discovered from FDT
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2012 - 2013, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
Copyright (c) 2014, Red Hat, Inc.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Base.h>
#include <Library/PcdLib.h>
#include <Library/SerialPortLib.h>
#include <Pi/PiBootMode.h>
#include <Uefi/UefiBaseType.h>
#include <Uefi/UefiMultiPhase.h>
#include <Pi/PiHob.h>
#include <Library/HobLib.h>
#include <Guid/EarlyPL011BaseAddress.h>
#include <Drivers/PL011Uart.h>
STATIC UINTN mSerialBaseAddress;
RETURN_STATUS
EFIAPI
SerialPortInitialize (
VOID
)
{
return RETURN_SUCCESS;
}
/**
Program hardware of Serial port
@return RETURN_NOT_FOUND if no PL011 base address could be found
Otherwise, result of PL011UartInitializePort () is returned
**/
RETURN_STATUS
EFIAPI
FdtPL011SerialPortLibInitialize (
VOID
)
{
VOID *Hob;
CONST UINT64 *UartBase;
UINT64 BaudRate;
UINT32 ReceiveFifoDepth;
EFI_PARITY_TYPE Parity;
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
Hob = GetFirstGuidHob (&gEarlyPL011BaseAddressGuid);
if (Hob == NULL || GET_GUID_HOB_DATA_SIZE (Hob) != sizeof *UartBase) {
return RETURN_NOT_FOUND;
}
UartBase = GET_GUID_HOB_DATA (Hob);
mSerialBaseAddress = (UINTN)*UartBase;
if (mSerialBaseAddress == 0) {
return RETURN_NOT_FOUND;
}
BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);
ReceiveFifoDepth = 0; // Use the default value for Fifo depth
Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);
DataBits = PcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);
return PL011UartInitializePort (
mSerialBaseAddress, &BaudRate, &ReceiveFifoDepth,
&Parity, &DataBits, &StopBits);
}
/**
Write data to serial device.
@param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Write data failed.
@retval !0 Actual number of bytes written to serial device.
**/
UINTN
EFIAPI
SerialPortWrite (
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
if (mSerialBaseAddress != 0) {
return PL011UartWrite (mSerialBaseAddress, Buffer, NumberOfBytes);
}
return 0;
}
/**
Read data from serial device and save the data in buffer.
@param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Read data failed.
@retval !0 Actual number of bytes read from serial device.
**/
UINTN
EFIAPI
SerialPortRead (
OUT UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
if (mSerialBaseAddress != 0) {
return PL011UartRead (mSerialBaseAddress, Buffer, NumberOfBytes);
}
return 0;
}
/**
Check to see if any data is available to be read from the debug device.
@retval TRUE At least one byte of data is available to be read
@retval FALSE No data is available to be read
**/
BOOLEAN
EFIAPI
SerialPortPoll (
VOID
)
{
if (mSerialBaseAddress != 0) {
return PL011UartPoll (mSerialBaseAddress);
}
return FALSE;
}

48
ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf
View File

@@ -1,48 +0,0 @@
#/** @file
#
# Component description file for PL011SerialPortLib module
#
# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FdtPL011SerialPortLib
FILE_GUID = CB768406-7DE6-49B6-BC2C-F324E110DE5A
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerialPortLib|DXE_CORE DXE_DRIVER UEFI_DRIVER DXE_RUNTIME_DRIVER UEFI_APPLICATION
CONSTRUCTOR = FdtPL011SerialPortLibInitialize
[Sources.common]
FdtPL011SerialPortLib.c
[LibraryClasses]
PL011UartLib
HobLib
[Packages]
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
ArmPkg/ArmPkg.dec
[FixedPcd]
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
[Guids]
gEarlyPL011BaseAddressGuid

51
ArmPlatformPkg/ArmVirtualizationPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c
View File

@@ -1,51 +0,0 @@
/** @file
Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <ArmPlatform.h>
#include <Library/NorFlashPlatformLib.h>
EFI_STATUS
NorFlashPlatformInitialization (
VOID
)
{
return EFI_SUCCESS;
}
NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
{
QEMU_NOR0_BASE,
QEMU_NOR0_BASE,
QEMU_NOR0_SIZE,
QEMU_NOR_BLOCK_SIZE,
{0xF9B94AE2, 0x8BA6, 0x409B, {0x9D, 0x56, 0xB9, 0xB4, 0x17, 0xF5, 0x3C, 0xB3}}
}, {
QEMU_NOR1_BASE,
QEMU_NOR1_BASE,
QEMU_NOR1_SIZE,
QEMU_NOR_BLOCK_SIZE,
{0x8047DB4B, 0x7E9C, 0x4C0C, {0x8E, 0xBC, 0xDF, 0xBB, 0xAA, 0xCA, 0xCE, 0x8F}}
}
};
EFI_STATUS
NorFlashPlatformGetDevices (
OUT NOR_FLASH_DESCRIPTION **NorFlashDescriptions,
OUT UINT32 *Count
)
{
*NorFlashDescriptions = mNorFlashDevices;
*Count = sizeof (mNorFlashDevices) / sizeof (mNorFlashDevices[0]);
return EFI_SUCCESS;
}

30
ArmPlatformPkg/ArmVirtualizationPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf
View File

@@ -1,30 +0,0 @@
#/** @file
#
# Component description file for NorFlashQemuLib module
#
# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = NorFlashQemuLib
FILE_GUID = 339B7829-4C5F-4EFC-B2DD-5050E530DECE
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
LIBRARY_CLASS = NorFlashPlatformLib
[Sources.common]
NorFlashQemuLib.c
[Packages]
MdePkg/MdePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec

477
ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
View File

@@ -1,477 +0,0 @@
/** @file
Implementation for PlatformBdsLib library class interfaces.
Copyright (C) 2015, Red Hat, Inc.
Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <IndustryStandard/Pci22.h>
#include <Library/DevicePathLib.h>
#include <Library/PcdLib.h>
#include <Library/PlatformBdsLib.h>
#include <Library/QemuBootOrderLib.h>
#include <Protocol/DevicePath.h>
#include <Protocol/GraphicsOutput.h>
#include <Protocol/PciIo.h>
#include <Protocol/PciRootBridgeIo.h>
#include "IntelBdsPlatform.h"
#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
#pragma pack (1)
typedef struct {
VENDOR_DEVICE_PATH SerialDxe;
UART_DEVICE_PATH Uart;
VENDOR_DEFINED_DEVICE_PATH Vt100;
EFI_DEVICE_PATH_PROTOCOL End;
} PLATFORM_SERIAL_CONSOLE;
#pragma pack ()
#define SERIAL_DXE_FILE_GUID { \
0xD3987D4B, 0x971A, 0x435F, \
{ 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
}
STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
//
// VENDOR_DEVICE_PATH SerialDxe
//
{
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
SERIAL_DXE_FILE_GUID
},
//
// UART_DEVICE_PATH Uart
//
{
{ MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
0, // Reserved
FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
FixedPcdGet8 (PcdUartDefaultParity), // Parity
FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
},
//
// VENDOR_DEFINED_DEVICE_PATH Vt100
//
{
{
MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
},
EFI_VT_100_GUID
},
//
// EFI_DEVICE_PATH_PROTOCOL End
//
{
END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
}
};
#pragma pack (1)
typedef struct {
USB_CLASS_DEVICE_PATH Keyboard;
EFI_DEVICE_PATH_PROTOCOL End;
} PLATFORM_USB_KEYBOARD;
#pragma pack ()
STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
//
// USB_CLASS_DEVICE_PATH Keyboard
//
{
{
MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
},
0xFFFF, // VendorId: any
0xFFFF, // ProductId: any
3, // DeviceClass: HID
1, // DeviceSubClass: boot
1 // DeviceProtocol: keyboard
},
//
// EFI_DEVICE_PATH_PROTOCOL End
//
{
END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
}
};
//
// BDS Platform Functions
//
/**
Platform Bds init. Include the platform firmware vendor, revision
and so crc check.
**/
VOID
EFIAPI
PlatformBdsInit (
VOID
)
{
}
/**
Check if the handle satisfies a particular condition.
@param[in] Handle The handle to check.
@param[in] ReportText A caller-allocated string passed in for reporting
purposes. It must never be NULL.
@retval TRUE The condition is satisfied.
@retval FALSE Otherwise. This includes the case when the condition could not
be fully evaluated due to an error.
**/
typedef
BOOLEAN
(EFIAPI *FILTER_FUNCTION) (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
);
/**
Process a handle.
@param[in] Handle The handle to process.
@param[in] ReportText A caller-allocated string passed in for reporting
purposes. It must never be NULL.
**/
typedef
VOID
(EFIAPI *CALLBACK_FUNCTION) (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
);
/**
Locate all handles that carry the specified protocol, filter them with a
callback function, and pass each handle that passes the filter to another
callback.
@param[in] ProtocolGuid The protocol to look for.
@param[in] Filter The filter function to pass each handle to. If this
parameter is NULL, then all handles are processed.
@param[in] Process The callback function to pass each handle to that
clears the filter.
**/
STATIC
VOID
FilterAndProcess (
IN EFI_GUID *ProtocolGuid,
IN FILTER_FUNCTION Filter OPTIONAL,
IN CALLBACK_FUNCTION Process
)
{
EFI_STATUS Status;
EFI_HANDLE *Handles;
UINTN NoHandles;
UINTN Idx;
Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
NULL /* SearchKey */, &NoHandles, &Handles);
if (EFI_ERROR (Status)) {
//
// This is not an error, just an informative condition.
//
DEBUG ((EFI_D_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
Status));
return;
}
ASSERT (NoHandles > 0);
for (Idx = 0; Idx < NoHandles; ++Idx) {
CHAR16 *DevicePathText;
STATIC CHAR16 Fallback[] = L"<device path unavailable>";
//
// The ConvertDevicePathToText() function handles NULL input transparently.
//
DevicePathText = ConvertDevicePathToText (
DevicePathFromHandle (Handles[Idx]),
FALSE, // DisplayOnly
FALSE // AllowShortcuts
);
if (DevicePathText == NULL) {
DevicePathText = Fallback;
}
if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
Process (Handles[Idx], DevicePathText);
}
if (DevicePathText != Fallback) {
FreePool (DevicePathText);
}
}
gBS->FreePool (Handles);
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
**/
STATIC
BOOLEAN
EFIAPI
IsPciDisplay (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
(VOID**)&PciIo);
if (EFI_ERROR (Status)) {
//
// This is not an error worth reporting.
//
return FALSE;
}
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
sizeof Pci / sizeof (UINT32), &Pci);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
return FALSE;
}
return IS_PCI_DISPLAY (&Pci);
}
/**
This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
the matching driver to produce all first-level child handles.
**/
STATIC
VOID
EFIAPI
Connect (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
EFI_STATUS Status;
Status = gBS->ConnectController (
Handle, // ControllerHandle
NULL, // DriverImageHandle
NULL, // RemainingDevicePath -- produce all children
FALSE // Recursive
);
DEBUG ((EFI_ERROR (Status) ? EFI_D_ERROR : EFI_D_VERBOSE, "%a: %s: %r\n",
__FUNCTION__, ReportText, Status));
}
/**
This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
handle, and adds it to ConOut and ErrOut.
**/
STATIC
VOID
EFIAPI
AddOutput (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
EFI_STATUS Status;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
DevicePath = DevicePathFromHandle (Handle);
if (DevicePath == NULL) {
DEBUG ((EFI_D_ERROR, "%a: %s: handle %p: device path not found\n",
__FUNCTION__, ReportText, Handle));
return;
}
Status = BdsLibUpdateConsoleVariable (L"ConOut", DevicePath, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
ReportText, Status));
return;
}
Status = BdsLibUpdateConsoleVariable (L"ErrOut", DevicePath, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
ReportText, Status));
return;
}
DEBUG ((EFI_D_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
ReportText));
}
/**
The function will execute with as the platform policy, current policy
is driven by boot mode. IBV/OEM can customize this code for their specific
policy action.
@param DriverOptionList The header of the driver option link list
@param BootOptionList The header of the boot option link list
@param ProcessCapsules A pointer to ProcessCapsules()
@param BaseMemoryTest A pointer to BaseMemoryTest()
**/
VOID
EFIAPI
PlatformBdsPolicyBehavior (
IN LIST_ENTRY *DriverOptionList,
IN LIST_ENTRY *BootOptionList,
IN PROCESS_CAPSULES ProcessCapsules,
IN BASEM_MEMORY_TEST BaseMemoryTest
)
{
//
// Locate the PCI root bridges and make the PCI bus driver connect each,
// non-recursively. This will produce a number of child handles with PciIo on
// them.
//
FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect);
//
// Find all display class PCI devices (using the handles from the previous
// step), and connect them non-recursively. This should produce a number of
// child handles with GOPs on them.
//
FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect);
//
// Now add the device path of all handles with GOP on them to ConOut and
// ErrOut.
//
FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
//
// Add the hardcoded short-form USB keyboard device path to ConIn.
//
BdsLibUpdateConsoleVariable (L"ConIn",
(EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
//
// Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
//
BdsLibUpdateConsoleVariable (L"ConIn",
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
BdsLibUpdateConsoleVariable (L"ConOut",
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
BdsLibUpdateConsoleVariable (L"ErrOut",
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
//
// Connect the consoles based on the above variables.
//
BdsLibConnectAllDefaultConsoles ();
//
// Show the splash screen.
//
EnableQuietBoot (PcdGetPtr (PcdLogoFile));
//
// Connect the rest of the devices.
//
BdsLibConnectAll ();
//
// Process QEMU's -kernel command line option. Note that the kernel booted
// this way should receive ACPI tables, which is why we connect all devices
// first (see above) -- PCI enumeration blocks ACPI table installation, if
// there is a PCI host.
//
TryRunningQemuKernel ();
BdsLibEnumerateAllBootOption (BootOptionList);
SetBootOrderFromQemu (BootOptionList);
//
// The BootOrder variable may have changed, reload the in-memory list with
// it.
//
BdsLibBuildOptionFromVar (BootOptionList, L"BootOrder");
PlatformBdsEnterFrontPage (GetFrontPageTimeoutFromQemu(), TRUE);
}
/**
Hook point after a boot attempt succeeds. We don't expect a boot option to
return, so the UEFI 2.0 specification defines that you will default to an
interactive mode and stop processing the BootOrder list in this case. This
is also a platform implementation and can be customized by IBV/OEM.
@param Option Pointer to Boot Option that succeeded to boot.
**/
VOID
EFIAPI
PlatformBdsBootSuccess (
IN BDS_COMMON_OPTION *Option
)
{
}
/**
Hook point after a boot attempt fails.
@param Option Pointer to Boot Option that failed to boot.
@param Status Status returned from failed boot.
@param ExitData Exit data returned from failed boot.
@param ExitDataSize Exit data size returned from failed boot.
**/
VOID
EFIAPI
PlatformBdsBootFail (
IN BDS_COMMON_OPTION *Option,
IN EFI_STATUS Status,
IN CHAR16 *ExitData,
IN UINTN ExitDataSize
)
{
}
/**
This function locks platform flash that is not allowed to be updated during normal boot path.
The flash layout is platform specific.
**/
VOID
EFIAPI
PlatformBdsLockNonUpdatableFlash (
VOID
)
{
return;
}

55
ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.h
View File

@@ -1,55 +0,0 @@
/** @file
Head file for BDS Platform specific code
Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _INTEL_BDS_PLATFORM_H_
#define _INTEL_BDS_PLATFORM_H_
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/DevicePathLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
VOID
PlatformBdsEnterFrontPage (
IN UINT16 TimeoutDefault,
IN BOOLEAN ConnectAllHappened
);
/**
Download the kernel, the initial ramdisk, and the kernel command line from
QEMU's fw_cfg. Construct a minimal SimpleFileSystem that contains the two
image files, and load and start the kernel from it.
The kernel will be instructed via its command line to load the initrd from
the same Simple FileSystem.
@retval EFI_NOT_FOUND Kernel image was not found.
@retval EFI_OUT_OF_RESOURCES Memory allocation failed.
@retval EFI_PROTOCOL_ERROR Unterminated kernel command line.
@return Error codes from any of the underlying
functions. On success, the function doesn't
return.
**/
EFI_STATUS
EFIAPI
TryRunningQemuKernel (
VOID
);
#endif // _INTEL_BDS_PLATFORM_H

74
ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
View File

@@ -1,74 +0,0 @@
## @file
# Implementation for PlatformBdsLib library class interfaces.
#
# Copyright (C) 2015, Red Hat, Inc.
# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available
# under the terms and conditions of the BSD License which accompanies this
# distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
# IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PlatformIntelBdsLib
FILE_GUID = 46DF84EB-F603-4D39-99D8-E1E86B50BCC2
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
LIBRARY_CLASS = PlatformBdsLib|DXE_DRIVER
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = ARM AARCH64
#
[Sources]
IntelBdsPlatform.c
QemuKernel.c
[Packages]
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
DebugLib
DevicePathLib
GenericBdsLib
MemoryAllocationLib
PcdLib
PrintLib
QemuBootOrderLib
QemuFwCfgLib
UefiBootServicesTableLib
UefiRuntimeServicesTableLib
[FixedPcd]
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
[Guids]
gEfiFileInfoGuid
gEfiFileSystemInfoGuid
gEfiFileSystemVolumeLabelInfoIdGuid
[Protocols]
gEfiDevicePathProtocolGuid
gEfiGraphicsOutputProtocolGuid
gEfiLoadedImageProtocolGuid
gEfiPciRootBridgeIoProtocolGuid
gEfiSimpleFileSystemProtocolGuid

1108
ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformIntelBdsLib/QemuKernel.c
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File diff suppressed because it is too large Load Diff

102
ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
View File

@@ -1,102 +0,0 @@
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
* Copyright (c) 2014, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <PiPei.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <libfdt.h>
#include <Guid/EarlyPL011BaseAddress.h>
#include <Guid/FdtHob.h>
EFI_STATUS
EFIAPI
PlatformPeim (
VOID
)
{
VOID *Base;
VOID *NewBase;
UINTN FdtSize;
UINTN FdtPages;
UINT64 *FdtHobData;
UINT64 *UartHobData;
INT32 Node, Prev;
CONST CHAR8 *Compatible;
CONST CHAR8 *CompItem;
INT32 Len;
CONST UINT64 *RegProp;
UINT64 UartBase;
Base = (VOID*)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
ASSERT (Base != NULL);
ASSERT (fdt_check_header (Base) == 0);
FdtSize = fdt_totalsize (Base) + PcdGet32 (PcdDeviceTreeAllocationPadding);
FdtPages = EFI_SIZE_TO_PAGES (FdtSize);
NewBase = AllocatePages (FdtPages);
ASSERT (NewBase != NULL);
fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages));
FdtHobData = BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData);
ASSERT (FdtHobData != NULL);
*FdtHobData = (UINTN)NewBase;
UartHobData = BuildGuidHob (&gEarlyPL011BaseAddressGuid, sizeof *UartHobData);
ASSERT (UartHobData != NULL);
*UartHobData = 0;
//
// Look for a UART node
//
for (Prev = 0;; Prev = Node) {
Node = fdt_next_node (Base, Prev, NULL);
if (Node < 0) {
break;
}
//
// Check for UART node
//
Compatible = fdt_getprop (Base, Node, "compatible", &Len);
//
// Iterate over the NULL-separated items in the compatible string
//
for (CompItem = Compatible; CompItem != NULL && CompItem < Compatible + Len;
CompItem += 1 + AsciiStrLen (CompItem)) {
if (AsciiStrCmp (CompItem, "arm,pl011") == 0) {
RegProp = fdt_getprop (Base, Node, "reg", &Len);
ASSERT (Len == 16);
UartBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
DEBUG ((EFI_D_INFO, "%a: PL011 UART @ 0x%lx\n", __FUNCTION__, UartBase));
*UartHobData = UartBase;
break;
}
}
}
BuildFvHob (PcdGet64 (PcdFvBaseAddress), PcdGet32 (PcdFvSize));
return EFI_SUCCESS;
}

52
ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.inf
View File

@@ -1,52 +0,0 @@
#/** @file
#
# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PlatformPeiLib
FILE_GUID = 59C11815-F8DA-4F49-B4FB-EC1E41ED1F06
MODULE_TYPE = SEC
VERSION_STRING = 1.0
LIBRARY_CLASS = PlatformPeiLib
[Sources]
PlatformPeiLib.c
[Packages]
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
[LibraryClasses]
DebugLib
HobLib
FdtLib
[FixedPcd]
gArmTokenSpaceGuid.PcdFvSize
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeAllocationPadding
[Pcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
[Guids]
gEarlyPL011BaseAddressGuid
gFdtHobGuid
[Depex]
gEfiPeiMemoryDiscoveredPpiGuid

358
ArmPlatformPkg/ArmVirtualizationPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c
View File

@@ -1,358 +0,0 @@
/** @file
Stateful and implicitly initialized fw_cfg library implementation.
Copyright (C) 2013 - 2014, Red Hat, Inc.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
#include <Library/QemuFwCfgLib.h>
STATIC UINTN mFwCfgSelectorAddress;
STATIC UINTN mFwCfgDataAddress;
/**
Returns a boolean indicating if the firmware configuration interface is
available for library-internal purposes.
This function never changes fw_cfg state.
@retval TRUE The interface is available internally.
@retval FALSE The interface is not available internally.
**/
BOOLEAN
EFIAPI
InternalQemuFwCfgIsAvailable (
VOID
)
{
return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
}
/**
Returns a boolean indicating if the firmware configuration interface
is available or not.
This function may change fw_cfg state.
@retval TRUE The interface is available
@retval FALSE The interface is not available
**/
BOOLEAN
EFIAPI
QemuFwCfgIsAvailable (
VOID
)
{
return InternalQemuFwCfgIsAvailable ();
}
RETURN_STATUS
EFIAPI
QemuFwCfgInitialize (
VOID
)
{
mFwCfgSelectorAddress = (UINTN)PcdGet64 (PcdFwCfgSelectorAddress);
mFwCfgDataAddress = (UINTN)PcdGet64 (PcdFwCfgDataAddress);
if (InternalQemuFwCfgIsAvailable ()) {
UINT32 Signature;
QemuFwCfgSelectItem (QemuFwCfgItemSignature);
Signature = QemuFwCfgRead32 ();
if (Signature != SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
mFwCfgSelectorAddress = 0;
mFwCfgDataAddress = 0;
}
}
return RETURN_SUCCESS;
}
/**
Selects a firmware configuration item for reading.
Following this call, any data read from this item will start from the
beginning of the configuration item's data.
@param[in] QemuFwCfgItem Firmware Configuration item to read
**/
VOID
EFIAPI
QemuFwCfgSelectItem (
IN FIRMWARE_CONFIG_ITEM QemuFwCfgItem
)
{
if (InternalQemuFwCfgIsAvailable ()) {
MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
}
}
/**
Reads firmware configuration bytes into a buffer
@param[in] Size Size in bytes to read
@param[in] Buffer Buffer to store data into (OPTIONAL if Size is 0)
**/
STATIC
VOID
EFIAPI
InternalQemuFwCfgReadBytes (
IN UINTN Size,
IN VOID *Buffer OPTIONAL
)
{
UINTN Left;
UINT8 *Ptr;
UINT8 *End;
#ifdef MDE_CPU_AARCH64
Left = Size & 7;
#else
Left = Size & 3;
#endif
Size -= Left;
Ptr = Buffer;
End = Ptr + Size;
#ifdef MDE_CPU_AARCH64
while (Ptr < End) {
*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
Ptr += 8;
}
if (Left & 4) {
*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
Ptr += 4;
}
#else
while (Ptr < End) {
*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
Ptr += 4;
}
#endif
if (Left & 2) {
*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
Ptr += 2;
}
if (Left & 1) {
*Ptr = MmioRead8 (mFwCfgDataAddress);
}
}
/**
Reads firmware configuration bytes into a buffer
If called multiple times, then the data read will continue at the offset of
the firmware configuration item where the previous read ended.
@param[in] Size Size in bytes to read
@param[in] Buffer Buffer to store data into
**/
VOID
EFIAPI
QemuFwCfgReadBytes (
IN UINTN Size,
IN VOID *Buffer
)
{
if (InternalQemuFwCfgIsAvailable ()) {
InternalQemuFwCfgReadBytes (Size, Buffer);
} else {
ZeroMem (Buffer, Size);
}
}
/**
Write firmware configuration bytes from a buffer
If called multiple times, then the data written will continue at the offset
of the firmware configuration item where the previous write ended.
@param[in] Size Size in bytes to write
@param[in] Buffer Buffer to read data from
**/
VOID
EFIAPI
QemuFwCfgWriteBytes (
IN UINTN Size,
IN VOID *Buffer
)
{
if (InternalQemuFwCfgIsAvailable ()) {
UINTN Idx;
for (Idx = 0; Idx < Size; ++Idx) {
MmioWrite8 (mFwCfgDataAddress, ((UINT8 *)Buffer)[Idx]);
}
}
}
/**
Reads a UINT8 firmware configuration value
@return Value of Firmware Configuration item read
**/
UINT8
EFIAPI
QemuFwCfgRead8 (
VOID
)
{
UINT8 Result;
QemuFwCfgReadBytes (sizeof Result, &Result);
return Result;
}
/**
Reads a UINT16 firmware configuration value
@return Value of Firmware Configuration item read
**/
UINT16
EFIAPI
QemuFwCfgRead16 (
VOID
)
{
UINT16 Result;
QemuFwCfgReadBytes (sizeof Result, &Result);
return Result;
}
/**
Reads a UINT32 firmware configuration value
@return Value of Firmware Configuration item read
**/
UINT32
EFIAPI
QemuFwCfgRead32 (
VOID
)
{
UINT32 Result;
QemuFwCfgReadBytes (sizeof Result, &Result);
return Result;
}
/**
Reads a UINT64 firmware configuration value
@return Value of Firmware Configuration item read
**/
UINT64
EFIAPI
QemuFwCfgRead64 (
VOID
)
{
UINT64 Result;
QemuFwCfgReadBytes (sizeof Result, &Result);
return Result;
}
/**
Find the configuration item corresponding to the firmware configuration file.
@param[in] Name Name of file to look up.
@param[out] Item Configuration item corresponding to the file, to be passed
to QemuFwCfgSelectItem ().
@param[out] Size Number of bytes in the file.
@retval RETURN_SUCCESS If file is found.
@retval RETURN_NOT_FOUND If file is not found.
@retval RETURN_UNSUPPORTED If firmware configuration is unavailable.
**/
RETURN_STATUS
EFIAPI
QemuFwCfgFindFile (
IN CONST CHAR8 *Name,
OUT FIRMWARE_CONFIG_ITEM *Item,
OUT UINTN *Size
)
{
UINT32 Count;
UINT32 Idx;
if (!InternalQemuFwCfgIsAvailable ()) {
return RETURN_UNSUPPORTED;
}
QemuFwCfgSelectItem (QemuFwCfgItemFileDir);
Count = SwapBytes32 (QemuFwCfgRead32 ());
for (Idx = 0; Idx < Count; ++Idx) {
UINT32 FileSize;
UINT16 FileSelect;
CHAR8 FName[QEMU_FW_CFG_FNAME_SIZE];
FileSize = QemuFwCfgRead32 ();
FileSelect = QemuFwCfgRead16 ();
QemuFwCfgRead16 (); // skip the field called "reserved"
InternalQemuFwCfgReadBytes (sizeof (FName), FName);
if (AsciiStrCmp (Name, FName) == 0) {
*Item = (FIRMWARE_CONFIG_ITEM) SwapBytes16 (FileSelect);
*Size = SwapBytes32 (FileSize);
return RETURN_SUCCESS;
}
}
return RETURN_NOT_FOUND;
}
/**
Determine if S3 support is explicitly enabled.
@retval TRUE if S3 support is explicitly enabled.
FALSE otherwise. This includes unavailability of the firmware
configuration interface.
**/
BOOLEAN
EFIAPI
QemuFwCfgS3Enabled (
VOID
)
{
return FALSE;
}

52
ArmPlatformPkg/ArmVirtualizationPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
View File

@@ -1,52 +0,0 @@
## @file
#
# Stateful, implicitly initialized fw_cfg library.
#
# Copyright (C) 2013 - 2014, Red Hat, Inc.
# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available
# under the terms and conditions of the BSD License which accompanies this
# distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
# IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = QemuFwCfgLib
FILE_GUID = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = QemuFwCfgLib|DXE_DRIVER
CONSTRUCTOR = QemuFwCfgInitialize
#
# The following information is for reference only and not required by the build
# tools.
#
# VALID_ARCHITECTURES = ARM AARCH64
#
[Sources]
QemuFwCfgLib.c
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
IoLib
PcdLib
[Pcd]
gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress
gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress

196
ArmPlatformPkg/ArmVirtualizationPkg/Library/XenRealTimeClockLib/XenRealTimeClockLib.c
View File

@@ -1,196 +0,0 @@
/** @file
Implement EFI RealTimeClock runtime services via Xen shared info page
Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Uefi.h>
#include <PiDxe.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
/**
Converts Epoch seconds (elapsed since 1970 JANUARY 01, 00:00:00 UTC) to EFI_TIME
**/
STATIC
VOID
EpochToEfiTime (
IN UINTN EpochSeconds,
OUT EFI_TIME *Time
)
{
UINTN a;
UINTN b;
UINTN c;
UINTN d;
UINTN g;
UINTN j;
UINTN m;
UINTN y;
UINTN da;
UINTN db;
UINTN dc;
UINTN dg;
UINTN hh;
UINTN mm;
UINTN ss;
UINTN J;
J = (EpochSeconds / 86400) + 2440588;
j = J + 32044;
g = j / 146097;
dg = j % 146097;
c = (((dg / 36524) + 1) * 3) / 4;
dc = dg - (c * 36524);
b = dc / 1461;
db = dc % 1461;
a = (((db / 365) + 1) * 3) / 4;
da = db - (a * 365);
y = (g * 400) + (c * 100) + (b * 4) + a;
m = (((da * 5) + 308) / 153) - 2;
d = da - (((m + 4) * 153) / 5) + 122;
Time->Year = y - 4800 + ((m + 2) / 12);
Time->Month = ((m + 2) % 12) + 1;
Time->Day = d + 1;
ss = EpochSeconds % 60;
a = (EpochSeconds - ss) / 60;
mm = a % 60;
b = (a - mm) / 60;
hh = b % 24;
Time->Hour = hh;
Time->Minute = mm;
Time->Second = ss;
Time->Nanosecond = 0;
}
/**
Returns the current time and date information, and the time-keeping capabilities
of the hardware platform.
@param Time A pointer to storage to receive a snapshot of the current time.
@param Capabilities An optional pointer to a buffer to receive the real time clock
device's capabilities.
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_INVALID_PARAMETER Time is NULL.
@retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error.
**/
EFI_STATUS
EFIAPI
LibGetTime (
OUT EFI_TIME *Time,
OUT EFI_TIME_CAPABILITIES *Capabilities
)
{
ASSERT (Time != NULL);
//
// For now, there is nothing that we can do besides returning a bogus time,
// as Xen's timekeeping uses a shared info page which cannot be shared
// between UEFI and the OS
//
EpochToEfiTime(1421770011, Time);
return EFI_SUCCESS;
}
/**
Sets the current local time and date information.
@param Time A pointer to the current time.
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_INVALID_PARAMETER A time field is out of range.
@retval EFI_DEVICE_ERROR The time could not be set due due to hardware error.
**/
EFI_STATUS
EFIAPI
LibSetTime (
IN EFI_TIME *Time
)
{
return EFI_DEVICE_ERROR;
}
/**
Returns the current wakeup alarm clock setting.
@param Enabled Indicates if the alarm is currently enabled or disabled.
@param Pending Indicates if the alarm signal is pending and requires acknowledgement.
@param Time The current alarm setting.
@retval EFI_SUCCESS The alarm settings were returned.
@retval EFI_INVALID_PARAMETER Any parameter is NULL.
@retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error.
@retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.
**/
EFI_STATUS
EFIAPI
LibGetWakeupTime (
OUT BOOLEAN *Enabled,
OUT BOOLEAN *Pending,
OUT EFI_TIME *Time
)
{
return EFI_UNSUPPORTED;
}
/**
Sets the system wakeup alarm clock time.
@param Enabled Enable or disable the wakeup alarm.
@param Time If Enable is TRUE, the time to set the wakeup alarm for.
@retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If
Enable is FALSE, then the wakeup alarm was disabled.
@retval EFI_INVALID_PARAMETER A time field is out of range.
@retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error.
@retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.
**/
EFI_STATUS
EFIAPI
LibSetWakeupTime (
IN BOOLEAN Enabled,
OUT EFI_TIME *Time
)
{
return EFI_UNSUPPORTED;
}
/**
This is the declaration of an EFI image entry point. This can be the entry point to an application
written to this specification, an EFI boot service driver, or an EFI runtime driver.
@param ImageHandle Handle that identifies the loaded image.
@param SystemTable System Table for this image.
@retval EFI_SUCCESS The operation completed successfully.
**/
EFI_STATUS
EFIAPI
LibRtcInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
return EFI_SUCCESS;
}

38
ArmPlatformPkg/ArmVirtualizationPkg/Library/XenRealTimeClockLib/XenRealTimeClockLib.inf
View File

@@ -1,38 +0,0 @@
#/** @file
#
# Copyright (c) 2015, L Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = XenRealTimeClockLib
FILE_GUID = EC2557E8-7005-430B-9F6F-9BA109698248
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = RealTimeClockLib|DXE_CORE DXE_DRIVER UEFI_DRIVER DXE_RUNTIME_DRIVER UEFI_APPLICATION
[Sources.common]
XenRealTimeClockLib.c
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
[LibraryClasses]
UefiLib
DebugLib
DxeServicesTableLib
UefiRuntimeLib
[Guids]
gEfiEventVirtualAddressChangeGuid

1266
ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
View File

File diff suppressed because it is too large Load Diff

498
ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h
View File

@@ -1,498 +0,0 @@
/** @file
The Header file of the Pci Host Bridge Driver
Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are
licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _PCI_HOST_BRIDGE_H_
#define _PCI_HOST_BRIDGE_H_
#include <PiDxe.h>
#include <IndustryStandard/Pci.h>
#include <IndustryStandard/Acpi.h>
#include <Protocol/PciHostBridgeResourceAllocation.h>
#include <Protocol/PciRootBridgeIo.h>
#include <Protocol/Metronome.h>
#include <Protocol/DevicePath.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/DxeServicesTableLib.h>
#include <Library/DevicePathLib.h>
#include <Library/IoLib.h>
#include <Library/PciLib.h>
#include <Library/PcdLib.h>
//
// Hard code the host bridge number in the platform.
// In this chipset, there is only one host bridge.
//
#define HOST_BRIDGE_NUMBER 1
#define MAX_PCI_DEVICE_NUMBER 31
#define MAX_PCI_FUNCTION_NUMBER 7
#define MAX_PCI_REG_ADDRESS (SIZE_4KB - 1)
typedef enum {
IoOperation,
MemOperation,
PciOperation
} OPERATION_TYPE;
#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32('e', 'h', 's', 't')
typedef struct {
UINTN Signature;
EFI_HANDLE HostBridgeHandle;
UINTN RootBridgeNumber;
LIST_ENTRY Head;
BOOLEAN ResourceSubmited;
BOOLEAN CanRestarted;
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;
} PCI_HOST_BRIDGE_INSTANCE;
#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
//
// HostBridge Resource Allocation interface
//
/**
These are the notifications from the PCI bus driver that it is about to enter a certain
phase of the PCI enumeration process.
This member function can be used to notify the host bridge driver to perform specific actions,
including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
Eight notification points are defined at this time. See belows:
EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
structures. The PCI enumerator should issue this notification
before starting a fresh enumeration process. Enumeration cannot
be restarted after sending any other notification such as
EfiPciHostBridgeBeginBusAllocation.
EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
required here. This notification can be used to perform any
chipset-specific programming.
EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
specific action is required here. This notification can be used to
perform any chipset-specific programming.
EfiPciHostBridgeBeginResourceAllocation
The resource allocation phase is about to begin. No specific
action is required here. This notification can be used to perform
any chipset-specific programming.
EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
root bridges. These resource settings are returned on the next call to
GetProposedResources(). Before calling NotifyPhase() with a Phase of
EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
for gathering I/O and memory requests for
all the PCI root bridges and submitting these requests using
SubmitResources(). This function pads the resource amount
to suit the root bridge hardware, takes care of dependencies between
the PCI root bridges, and calls the Global Coherency Domain (GCD)
with the allocation request. In the case of padding, the allocated range
could be bigger than what was requested.
EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
resources (proposed resources) for all the PCI root bridges. After the
hardware is programmed, reassigning resources will not be supported.
The bus settings are not affected.
EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
root bridges and resets the I/O and memory apertures to their initial
state. The bus settings are not affected. If the request to allocate
resources fails, the PCI enumerator can use this notification to
deallocate previous resources, adjust the requests, and retry
allocation.
EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
required here. This notification can be used to perform any chipsetspecific
programming.
@param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param[in] Phase The phase during enumeration
@retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
is valid for a Phase of EfiPciHostBridgeAllocateResources if
SubmitResources() has not been called for one or more
PCI root bridges before this call
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
for a Phase of EfiPciHostBridgeSetResources.
@retval EFI_INVALID_PARAMETER Invalid phase parameter
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
previously submitted resource requests cannot be fulfilled or
were only partially fulfilled.
@retval EFI_SUCCESS The notification was accepted without any errors.
**/
EFI_STATUS
EFIAPI
NotifyPhase(
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
);
/**
Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
This function is called multiple times to retrieve the device handles of all the PCI root bridges that
are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
root bridges. On each call, the handle that was returned by the previous call is passed into the
interface, and on output the interface returns the device handle of the next PCI root bridge. The
caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
for that root bridge. When there are no more PCI root bridges to report, the interface returns
EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
are returned by this function.
For D945 implementation, there is only one root bridge in PCI host bridge.
@param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.
@retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
specific Host bridge and return EFI_SUCCESS.
@retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
returned on a previous call to GetNextRootBridge().
**/
EFI_STATUS
EFIAPI
GetNextRootBridge(
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN OUT EFI_HANDLE *RootBridgeHandle
);
/**
Returns the allocation attributes of a PCI root bridge.
The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
from one PCI root bridge to another. These attributes are different from the decode-related
attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
handles of all the root bridges that are associated with this host bridge must be obtained by calling
GetNextRootBridge(). The attributes are static in the sense that they do not change during or
after the enumeration process. The hardware may provide mechanisms to change the attributes on
the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
"Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
prefetchable memory.
Attribute Description
------------------------------------ ----------------------------------------------------------------------
EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate
windows for nonprefetchable and prefetchable memory. A PCI bus
driver needs to include requests for prefetchable memory in the
nonprefetchable memory pool.
EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory
windows. If this bit is not set, the PCI bus driver needs to include
requests for a 64-bit memory address in the corresponding 32-bit
memory pool.
@param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type
EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
@param[out] Attributes The pointer to attribte of root bridge, it is output parameter
@retval EFI_INVALID_PARAMETER Attribute pointer is NULL
@retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
@retval EFI_SUCCESS Success to get attribute of interested root bridge.
**/
EFI_STATUS
EFIAPI
GetAttributes(
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN EFI_HANDLE RootBridgeHandle,
OUT UINT64 *Attributes
);
/**
Sets up the specified PCI root bridge for the bus enumeration process.
This member function sets up the root bridge for bus enumeration and returns the PCI bus range
over which the search should be performed in ACPI 2.0 resource descriptor format.
@param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
@param[in] RootBridgeHandle The PCI Root Bridge to be set up.
@param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.
@retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
@retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
@retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
**/
EFI_STATUS
EFIAPI
StartBusEnumeration(
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN EFI_HANDLE RootBridgeHandle,
OUT VOID **Configuration
);
/**
Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
This member function programs the specified PCI root bridge to decode the bus range that is
specified by the input parameter Configuration.
The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
@param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
@param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
@param[in] Configuration The pointer to the PCI bus resource descriptor
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
@retval EFI_INVALID_PARAMETER Configuration is NULL.
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
@retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.
@retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than
bus descriptors.
@retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.
@retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.
@retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
@retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.
**/
EFI_STATUS
EFIAPI
SetBusNumbers(
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN EFI_HANDLE RootBridgeHandle,
IN VOID *Configuration
);
/**
Submits the I/O and memory resource requirements for the specified PCI root bridge.
This function is used to submit all the I/O and memory resources that are required by the specified
PCI root bridge. The input parameter Configuration is used to specify the following:
- The various types of resources that are required
- The associated lengths in terms of ACPI 2.0 resource descriptor format
@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
@param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.
@param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.
@retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
@retval EFI_INVALID_PARAMETER Configuration is NULL.
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
@retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are
not supported by this PCI root bridge. This error will happen if the caller
did not combine resources according to Attributes that were returned by
GetAllocAttributes().
@retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
@retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.
@retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.
**/
EFI_STATUS
EFIAPI
SubmitResources(
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN EFI_HANDLE RootBridgeHandle,
IN VOID *Configuration
);
/**
Returns the proposed resource settings for the specified PCI root bridge.
This member function returns the proposed resource settings for the specified PCI root bridge. The
proposed resource settings are prepared when NotifyPhase() is called with a Phase of
EfiPciHostBridgeAllocateResources. The output parameter Configuration
specifies the following:
- The various types of resources, excluding bus resources, that are allocated
- The associated lengths in terms of ACPI 2.0 resource descriptor format
@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
@param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
@param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.
@retval EFI_SUCCESS The requested parameters were returned.
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
**/
EFI_STATUS
EFIAPI
GetProposedResources(
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN EFI_HANDLE RootBridgeHandle,
OUT VOID **Configuration
);
/**
Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
PCI controllers before enumeration.
This function is called during the PCI enumeration process. No specific action is expected from this
member function. It allows the host bridge driver to preinitialize individual PCI controllers before
enumeration.
@param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
@param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in
InstallProtocolInterface() in the UEFI 2.0 Specification.
@param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
@param Phase The phase of the PCI device enumeration.
@retval EFI_SUCCESS The requested parameters were returned.
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
@retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
not enumerate this device, including its child devices if it is a PCI-to-PCI
bridge.
**/
EFI_STATUS
EFIAPI
PreprocessController (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
IN EFI_HANDLE RootBridgeHandle,
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
);
//
// Define resource status constant
//
#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
//
// Driver Instance Data Prototypes
//
typedef struct {
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation;
UINTN NumberOfBytes;
UINTN NumberOfPages;
EFI_PHYSICAL_ADDRESS HostAddress;
EFI_PHYSICAL_ADDRESS MappedHostAddress;
} MAP_INFO;
typedef struct {
ACPI_HID_DEVICE_PATH AcpiDevicePath;
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
typedef struct {
UINT64 BusBase;
UINT64 BusLimit;
UINT64 MemBase;
UINT64 MemLimit;
UINT64 IoBase;
UINT64 IoLimit;
UINT64 IoTranslation;
} PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
typedef enum {
TypeIo = 0,
TypeMem32,
TypePMem32,
TypeMem64,
TypePMem64,
TypeBus,
TypeMax
} PCI_RESOURCE_TYPE;
typedef enum {
ResNone = 0,
ResSubmitted,
ResRequested,
ResAllocated,
ResStatusMax
} RES_STATUS;
typedef struct {
PCI_RESOURCE_TYPE Type;
UINT64 Base;
UINT64 Length;
UINT64 Alignment;
RES_STATUS Status;
} PCI_RES_NODE;
#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32('e', '2', 'p', 'b')
typedef struct {
UINT32 Signature;
LIST_ENTRY Link;
EFI_HANDLE Handle;
UINT64 RootBridgeAttrib;
UINT64 Attributes;
UINT64 Supports;
//
// Specific for this memory controller: Bus, I/O, Mem
//
PCI_RES_NODE ResAllocNode[6];
//
// Addressing for Memory and I/O and Bus arrange
//
UINT64 BusBase;
UINT64 MemBase;
UINT64 IoBase;
UINT64 BusLimit;
UINT64 MemLimit;
UINT64 IoLimit;
UINT64 IoTranslation;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;
} PCI_ROOT_BRIDGE_INSTANCE;
//
// Driver Instance Data Macros
//
#define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
#define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
/**
Construct the Pci Root Bridge Io protocol
@param Protocol Point to protocol instance
@param HostBridgeHandle Handle of host bridge
@param Attri Attribute of host bridge
@param ResAperture ResourceAperture for host bridge
@retval EFI_SUCCESS Success to initialize the Pci Root Bridge.
**/
EFI_STATUS
RootBridgeConstructor (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *Protocol,
IN EFI_HANDLE HostBridgeHandle,
IN UINT64 Attri,
IN PCI_ROOT_BRIDGE_RESOURCE_APERTURE *ResAperture
);
#endif

69
ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
View File

@@ -1,69 +0,0 @@
## @file
# The basic interfaces implementation to a single segment PCI Host Bridge driver.
#
# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PciHostBridge
FILE_GUID = 9f609346-37cb-4eb7-801f-f55099373998
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = InitializePciHostBridge
[Packages]
MdePkg/MdePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
UefiBootServicesTableLib
DxeServicesTableLib
UefiLib
MemoryAllocationLib
BaseMemoryLib
BaseLib
DebugLib
DevicePathLib
IoLib
PciLib
PcdLib
[Sources]
PciHostBridge.c
PciRootBridgeIo.c
PciHostBridge.h
[Protocols]
gEfiPciHostBridgeResourceAllocationProtocolGuid ## PRODUCES
gEfiPciRootBridgeIoProtocolGuid ## PRODUCES
gEfiMetronomeArchProtocolGuid ## CONSUMES
gEfiDevicePathProtocolGuid ## PRODUCES
[Pcd]
gArmPlatformTokenSpaceGuid.PcdPciBusMin
gArmPlatformTokenSpaceGuid.PcdPciBusMax
gArmPlatformTokenSpaceGuid.PcdPciIoBase
gArmPlatformTokenSpaceGuid.PcdPciIoSize
gArmPlatformTokenSpaceGuid.PcdPciIoTranslation
gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
[FeaturePcd]
gArmVirtualizationTokenSpaceGuid.PcdKludgeMapPciMmioAsCached
[depex]
gEfiMetronomeArchProtocolGuid AND
gEfiCpuArchProtocolGuid

2144
ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c
View File

File diff suppressed because it is too large Load Diff

33
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/AArch64/ArchPrePi.c
View File

@@ -1,33 +0,0 @@
/** @file
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include "PrePi.h"
#include <Chipset/AArch64.h>
VOID
ArchInitialize (
VOID
)
{
// Enable Floating Point
if (FixedPcdGet32 (PcdVFPEnabled)) {
ArmEnableVFP ();
}
if (ArmReadCurrentEL () == AARCH64_EL2) {
// Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
ArmWriteHcr (ARM_HCR_TGE);
}
}

180
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/AArch64/ModuleEntryPoint.S
View File

@@ -1,180 +0,0 @@
//
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
// Copyright (c) 2015, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//
#include <AsmMacroIoLibV8.h>
#include <Base.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
.text
.align 3
GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_IMPORT(ArmReadMpidr)
GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
GCC_ASM_IMPORT(ArmPlatformStackSet)
GCC_ASM_EXPORT(_ModuleEntryPoint)
StartupAddr: .8byte ASM_PFX(CEntryPoint)
ASM_PFX(_ModuleEntryPoint):
//
// We are built as a ET_DYN PIE executable, so we need to process all
// relative relocations regardless of whether or not we are executing from
// the same offset we were linked at. This is only possible if we are
// running from RAM.
//
adr x8, __reloc_base
adr x9, __reloc_start
adr x10, __reloc_end
.Lreloc_loop:
cmp x9, x10
bhs .Lreloc_done
//
// AArch64 uses the ELF64 RELA format, which means each entry in the
// relocation table consists of
//
// UINT64 offset : the relative offset of the value that needs to
// be relocated
// UINT64 info : relocation type and symbol index (the latter is
// not used for R_AARCH64_RELATIVE relocations)
// UINT64 addend : value to be added to the value being relocated
//
ldp x11, x12, [x9], #24 // read offset into x11 and info into x12
cmp x12, #0x403 // check info == R_AARCH64_RELATIVE?
bne .Lreloc_loop // not a relative relocation? then skip
ldr x12, [x9, #-8] // read addend into x12
add x12, x12, x8 // add reloc base to addend to get relocated value
str x12, [x11, x8] // write relocated value at offset
b .Lreloc_loop
.Lreloc_done:
// Do early platform specific actions
bl ASM_PFX(ArmPlatformPeiBootAction)
// Get ID of this CPU in Multicore system
bl ASM_PFX(ArmReadMpidr)
// Keep a copy of the MpId register value
mov x10, x0
// Check if we can install the stack at the top of the System Memory or if we need
// to install the stacks at the bottom of the Firmware Device (case the FD is located
// at the top of the DRAM)
_SetupStackPosition:
// Compute Top of System Memory
ldr x1, PcdGet64 (PcdSystemMemoryBase)
ldr x2, PcdGet64 (PcdSystemMemorySize)
sub x2, x2, #1
add x1, x1, x2 // x1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize
// Calculate Top of the Firmware Device
ldr x2, PcdGet64 (PcdFdBaseAddress)
ldr w3, PcdGet32 (PcdFdSize)
sub x3, x3, #1
add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
//
// Reserve the memory for the UEFI region (contain stacks on its top)
//
// Calculate how much space there is between the top of the Firmware and the Top of the System Memory
subs x0, x1, x3 // x0 = SystemMemoryTop - FdTop
b.mi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
cmp x0, x4
b.ge _SetupStack
// Case the top of stacks is the FdBaseAddress
mov x1, x2
_SetupStack:
// x1 contains the top of the stack (and the UEFI Memory)
// Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment
// one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the
// top of the memory space)
adds x11, x1, #1
b.cs _SetupOverflowStack
_SetupAlignedStack:
mov x1, x11
b _GetBaseUefiMemory
_SetupOverflowStack:
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
LoadConstantToReg (EFI_PAGE_MASK, x11)
and x11, x11, x1
sub x1, x1, x11
_GetBaseUefiMemory:
// Calculate the Base of the UEFI Memory
sub x11, x1, x4
_GetStackBase:
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
sub x12, x1, x2
// Stack for the secondary core = Number of Cores - 1
LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
sub x0, x0, #1
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
mul x1, x1, x0
sub x12, x12, x1
// x12 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov x0, x12
mov x1, x10
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
bl ASM_PFX(ArmPlatformStackSet)
// Is it the Primary Core ?
mov x0, x10
bl ASM_PFX(ArmPlatformIsPrimaryCore)
cmp x0, #1
bne _PrepareArguments
_ReserveGlobalVariable:
LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), x0)
// InitializePrimaryStack($GlobalVariableSize, $Tmp1, $Tmp2)
InitializePrimaryStack(x0, x1, x2)
_PrepareArguments:
mov x0, x10
mov x1, x11
mov x2, x12
mov x3, sp
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr x4, StartupAddr
// Jump to PrePiCore C code
// x0 = MpId
// x1 = UefiMemoryBase
// x2 = StacksBase
// x3 = GlobalVariableBase
blr x4
_NeverReturn:
b _NeverReturn

109
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
View File

@@ -1,109 +0,0 @@
#/** @file
#
# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ArmVirtPrePiUniCoreRelocatable
FILE_GUID = f7d9fd14-9335-4389-80c5-334d6abfcced
MODULE_TYPE = SEC
VALID_ARCHITECTURES = AARCH64
VERSION_STRING = 1.0
[Sources]
PrePi.c
[Sources.AArch64]
AArch64/ArchPrePi.c
AArch64/ModuleEntryPoint.S
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
[LibraryClasses]
BaseLib
DebugLib
ArmLib
IoLib
TimerLib
SerialPortLib
ExtractGuidedSectionLib
LzmaDecompressLib
PeCoffGetEntryPointLib
PrePiLib
ArmPlatformLib
ArmPlatformStackLib
MemoryAllocationLib
HobLib
PrePiHobListPointerLib
PlatformPeiLib
MemoryInitPeiLib
CacheMaintenanceLib
[Ppis]
gArmMpCoreInfoPpiGuid
[Guids]
gArmGlobalVariableGuid
gArmMpCoreInfoGuid
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
[FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
gArmTokenSpaceGuid.PcdVFPEnabled
gArmTokenSpaceGuid.PcdFdSize
gArmTokenSpaceGuid.PcdFvSize
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize
gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
gArmPlatformTokenSpaceGuid.PcdCoreCount
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
gArmTokenSpaceGuid.PcdFdBaseAddress
gArmTokenSpaceGuid.PcdFvBaseAddress
[BuildOptions]
GCC:*_*_AARCH64_DLINK_FLAGS = -pie -T $(MODULE_DIR)/Scripts/PrePi-PIE.lds

103
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/LzmaDecompress.h
View File

@@ -1,103 +0,0 @@
/** @file
LZMA Decompress Library header file
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __LZMA_DECOMPRESS_H___
#define __LZMA_DECOMPRESS_H___
/**
Examines a GUIDed section and returns the size of the decoded buffer and the
size of an scratch buffer required to actually decode the data in a GUIDed section.
Examines a GUIDed section specified by InputSection.
If GUID for InputSection does not match the GUID that this handler supports,
then RETURN_UNSUPPORTED is returned.
If the required information can not be retrieved from InputSection,
then RETURN_INVALID_PARAMETER is returned.
If the GUID of InputSection does match the GUID that this handler supports,
then the size required to hold the decoded buffer is returned in OututBufferSize,
the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field
from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.
If InputSection is NULL, then ASSERT().
If OutputBufferSize is NULL, then ASSERT().
If ScratchBufferSize is NULL, then ASSERT().
If SectionAttribute is NULL, then ASSERT().
@param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
@param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required
if the buffer specified by InputSection were decoded.
@param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space
if the buffer specified by InputSection were decoded.
@param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes
field of EFI_GUID_DEFINED_SECTION in the PI Specification.
@retval RETURN_SUCCESS The information about InputSection was returned.
@retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
@retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.
**/
RETURN_STATUS
EFIAPI
LzmaGuidedSectionGetInfo (
IN CONST VOID *InputSection,
OUT UINT32 *OutputBufferSize,
OUT UINT32 *ScratchBufferSize,
OUT UINT16 *SectionAttribute
);
/**
Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.
Decodes the GUIDed section specified by InputSection.
If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned.
If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.
If the GUID of InputSection does match the GUID that this handler supports, then InputSection
is decoded into the buffer specified by OutputBuffer and the authentication status of this
decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the
data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,
the decoded data will be placed in caller allocated buffer specified by OutputBuffer.
If InputSection is NULL, then ASSERT().
If OutputBuffer is NULL, then ASSERT().
If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
If AuthenticationStatus is NULL, then ASSERT().
@param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
@param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
@param[out] ScratchBuffer A caller allocated buffer that may be required by this function
as a scratch buffer to perform the decode operation.
@param[out] AuthenticationStatus
A pointer to the authentication status of the decoded output buffer.
See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI
section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must
never be set by this handler.
@retval RETURN_SUCCESS The buffer specified by InputSection was decoded.
@retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
@retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.
**/
RETURN_STATUS
EFIAPI
LzmaGuidedSectionExtraction (
IN CONST VOID *InputSection,
OUT VOID **OutputBuffer,
OUT VOID *ScratchBuffer, OPTIONAL
OUT UINT32 *AuthenticationStatus
);
#endif // __LZMADECOMPRESS_H__

211
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/PrePi.c
View File

@@ -1,211 +0,0 @@
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <PiPei.h>
#include <Library/PrePiLib.h>
#include <Library/PrintLib.h>
#include <Library/PeCoffGetEntryPointLib.h>
#include <Library/PrePiHobListPointerLib.h>
#include <Library/TimerLib.h>
#include <Library/PerformanceLib.h>
#include <Library/CacheMaintenanceLib.h>
#include <Ppi/GuidedSectionExtraction.h>
#include <Ppi/ArmMpCoreInfo.h>
#include <Guid/LzmaDecompress.h>
#include <Guid/ArmGlobalVariableHob.h>
#include "PrePi.h"
#include "LzmaDecompress.h"
// Not used when PrePi in run in XIP mode
UINTN mGlobalVariableBase = 0;
EFI_STATUS
EFIAPI
ExtractGuidedSectionLibConstructor (
VOID
);
EFI_STATUS
EFIAPI
LzmaDecompressLibConstructor (
VOID
);
VOID
EFIAPI
BuildGlobalVariableHob (
IN EFI_PHYSICAL_ADDRESS GlobalVariableBase,
IN UINT32 GlobalVariableSize
)
{
ARM_HOB_GLOBAL_VARIABLE *Hob;
Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, sizeof (ARM_HOB_GLOBAL_VARIABLE));
ASSERT(Hob != NULL);
CopyGuid (&(Hob->Header.Name), &gArmGlobalVariableGuid);
Hob->GlobalVariableBase = GlobalVariableBase;
Hob->GlobalVariableSize = GlobalVariableSize;
}
EFI_STATUS
GetPlatformPpi (
IN EFI_GUID *PpiGuid,
OUT VOID **Ppi
)
{
UINTN PpiListSize;
UINTN PpiListCount;
EFI_PEI_PPI_DESCRIPTOR *PpiList;
UINTN Index;
PpiListSize = 0;
ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);
PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);
for (Index = 0; Index < PpiListCount; Index++, PpiList++) {
if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {
*Ppi = PpiList->Ppi;
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
VOID
PrePiMain (
IN UINTN UefiMemoryBase,
IN UINTN StacksBase,
IN UINTN GlobalVariableBase,
IN UINT64 StartTimeStamp
)
{
EFI_HOB_HANDOFF_INFO_TABLE* HobList;
EFI_STATUS Status;
CHAR8 Buffer[100];
UINTN CharCount;
UINTN StacksSize;
// Initialize the architecture specific bits
ArchInitialize ();
// Declare the PI/UEFI memory region
HobList = HobConstructor (
(VOID*)UefiMemoryBase,
FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
(VOID*)UefiMemoryBase,
(VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks
);
PrePeiSetHobList (HobList);
//
// Ensure that the loaded image is invalidated in the caches, so that any
// modifications we made with the caches and MMU off (such as the applied
// relocations) don't become invisible once we turn them on.
//
InvalidateDataCacheRange((VOID *)(UINTN)PcdGet64 (PcdFdBaseAddress), PcdGet32 (PcdFdSize));
// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
ASSERT_EFI_ERROR (Status);
// Initialize the Serial Port
SerialPortInitialize ();
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",
(CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
SerialPortWrite ((UINT8 *) Buffer, CharCount);
// Create the Stacks HOB (reserve the memory for all stacks)
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
BuildStackHob (StacksBase, StacksSize);
// Declare the Global Variable HOB
BuildGlobalVariableHob (GlobalVariableBase, FixedPcdGet32 (PcdPeiGlobalVariableSize));
//TODO: Call CpuPei as a library
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
// Set the Boot Mode
SetBootMode (ArmPlatformGetBootMode ());
// Initialize Platform HOBs (CpuHob and FvHob)
Status = PlatformPeim ();
ASSERT_EFI_ERROR (Status);
// Now, the HOB List has been initialized, we can register performance information
PERF_START (NULL, "PEI", NULL, StartTimeStamp);
// SEC phase needs to run library constructors by hand.
ExtractGuidedSectionLibConstructor ();
LzmaDecompressLibConstructor ();
// Build HOBs to pass up our version of stuff the DXE Core needs to save space
BuildPeCoffLoaderHob ();
BuildExtractSectionHob (
&gLzmaCustomDecompressGuid,
LzmaGuidedSectionGetInfo,
LzmaGuidedSectionExtraction
);
// Assume the FV that contains the SEC (our code) also contains a compressed FV.
Status = DecompressFirstFv ();
ASSERT_EFI_ERROR (Status);
// Load the DXE Core and transfer control to it
Status = LoadDxeCoreFromFv (NULL, 0);
ASSERT_EFI_ERROR (Status);
}
VOID
CEntryPoint (
IN UINTN MpId,
IN UINTN UefiMemoryBase,
IN UINTN StacksBase,
IN UINTN GlobalVariableBase
)
{
UINT64 StartTimeStamp;
// Initialize the platform specific controllers
ArmPlatformInitialize (MpId);
if (PerformanceMeasurementEnabled ()) {
// Initialize the Timer Library to setup the Timer HW controller
TimerConstructor ();
// We cannot call yet the PerformanceLib because the HOB List has not been initialized
StartTimeStamp = GetPerformanceCounter ();
} else {
StartTimeStamp = 0;
}
// Data Cache enabled on Primary core when MMU is enabled.
ArmDisableDataCache ();
// Invalidate Data cache
ArmInvalidateDataCache ();
// Invalidate instruction cache
ArmInvalidateInstructionCache ();
// Enable Instruction Caches on all cores.
ArmEnableInstructionCache ();
// Define the Global Variable region
mGlobalVariableBase = GlobalVariableBase;
PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
// DXE Core should always load and never return
ASSERT (FALSE);
}

77
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/PrePi.h
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@@ -1,77 +0,0 @@
/** @file
*
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#ifndef _PREPI_H_
#define _PREPI_H_
#include <PiPei.h>
#include <Library/PcdLib.h>
#include <Library/ArmLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/HobLib.h>
#include <Library/SerialPortLib.h>
#include <Library/ArmPlatformLib.h>
#define SerialPrint(txt) SerialPortWrite (txt, AsciiStrLen(txt)+1);
RETURN_STATUS
EFIAPI
TimerConstructor (
VOID
);
VOID
PrePiMain (
IN UINTN UefiMemoryBase,
IN UINTN StacksBase,
IN UINTN GlobalVariableBase,
IN UINT64 StartTimeStamp
);
EFI_STATUS
EFIAPI
MemoryPeim (
IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,
IN UINT64 UefiMemorySize
);
EFI_STATUS
EFIAPI
PlatformPeim (
VOID
);
// Either implemented by PrePiLib or by MemoryInitPei
VOID
BuildMemoryTypeInformationHob (
VOID
);
EFI_STATUS
GetPlatformPpi (
IN EFI_GUID *PpiGuid,
OUT VOID **Ppi
);
// Initialize the Architecture specific controllers
VOID
ArchInitialize (
VOID
);
#endif /* _PREPI_H_ */

42
ArmPlatformPkg/ArmVirtualizationPkg/PrePi/Scripts/PrePi-PIE.lds
View File

@@ -1,42 +0,0 @@
#/** @file
#
# Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
SECTIONS
{
.text 0x0 : {
PROVIDE(__reloc_base = .);
*(.text .text*)
*(.got .got*)
*(.rodata .rodata*)
*(.data .data*)
. = ALIGN(0x20);
PROVIDE(__reloc_start = .);
*(.rela .rela*)
PROVIDE(__reloc_end = .);
}
.bss ALIGN(0x20) : { *(.bss .bss*) }
/DISCARD/ : {
*(.note.GNU-stack)
*(.gnu_debuglink)
*(.interp)
*(.dynamic)
*(.dynsym)
*(.dynstr)
*(.hash)
*(.comment)
}
}

566
ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.c
View File

@@ -1,566 +0,0 @@
/** @file
* Device tree enumeration DXE driver for ARM Virtual Machines
*
* Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
*
* This program and the accompanying materials are
* licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/UefiLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/VirtioMmioDeviceLib.h>
#include <Library/DevicePathLib.h>
#include <Library/PcdLib.h>
#include <Library/DxeServicesLib.h>
#include <Library/HobLib.h>
#include <libfdt.h>
#include <Library/XenIoMmioLib.h>
#include <Guid/Fdt.h>
#include <Guid/VirtioMmioTransport.h>
#include <Guid/FdtHob.h>
#pragma pack (1)
typedef struct {
VENDOR_DEVICE_PATH Vendor;
UINT64 PhysBase;
EFI_DEVICE_PATH_PROTOCOL End;
} VIRTIO_TRANSPORT_DEVICE_PATH;
#pragma pack ()
typedef enum {
PropertyTypeUnknown,
PropertyTypeGic,
PropertyTypeRtc,
PropertyTypeVirtio,
PropertyTypeUart,
PropertyTypeTimer,
PropertyTypePsci,
PropertyTypeFwCfg,
PropertyTypePciHost,
PropertyTypeGicV3,
PropertyTypeXen,
} PROPERTY_TYPE;
typedef struct {
PROPERTY_TYPE Type;
CHAR8 Compatible[32];
} PROPERTY;
STATIC CONST PROPERTY CompatibleProperties[] = {
{ PropertyTypeGic, "arm,cortex-a15-gic" },
{ PropertyTypeRtc, "arm,pl031" },
{ PropertyTypeVirtio, "virtio,mmio" },
{ PropertyTypeUart, "arm,pl011" },
{ PropertyTypeTimer, "arm,armv7-timer" },
{ PropertyTypeTimer, "arm,armv8-timer" },
{ PropertyTypePsci, "arm,psci-0.2" },
{ PropertyTypeFwCfg, "qemu,fw-cfg-mmio" },
{ PropertyTypePciHost, "pci-host-ecam-generic" },
{ PropertyTypeGicV3, "arm,gic-v3" },
{ PropertyTypeXen, "xen,xen" },
{ PropertyTypeUnknown, "" }
};
typedef struct {
UINT32 Type;
UINT32 Number;
UINT32 Flags;
} INTERRUPT_PROPERTY;
STATIC
PROPERTY_TYPE
GetTypeFromNode (
IN CONST CHAR8 *NodeType,
IN UINTN Size
)
{
CONST CHAR8 *Compatible;
CONST PROPERTY *CompatibleProperty;
//
// A 'compatible' node may contain a sequence of NULL terminated
// compatible strings so check each one
//
for (Compatible = NodeType; Compatible < NodeType + Size && *Compatible;
Compatible += 1 + AsciiStrLen (Compatible)) {
for (CompatibleProperty = CompatibleProperties; CompatibleProperty->Compatible[0]; CompatibleProperty++) {
if (AsciiStrCmp (CompatibleProperty->Compatible, Compatible) == 0) {
return CompatibleProperty->Type;
}
}
}
return PropertyTypeUnknown;
}
//
// We expect the "ranges" property of "pci-host-ecam-generic" to consist of
// records like this.
//
#pragma pack (1)
typedef struct {
UINT32 Type;
UINT64 ChildBase;
UINT64 CpuBase;
UINT64 Size;
} DTB_PCI_HOST_RANGE_RECORD;
#pragma pack ()
#define DTB_PCI_HOST_RANGE_RELOCATABLE BIT31
#define DTB_PCI_HOST_RANGE_PREFETCHABLE BIT30
#define DTB_PCI_HOST_RANGE_ALIASED BIT29
#define DTB_PCI_HOST_RANGE_MMIO32 BIT25
#define DTB_PCI_HOST_RANGE_MMIO64 (BIT25 | BIT24)
#define DTB_PCI_HOST_RANGE_IO BIT24
#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
/**
Process the device tree node describing the generic PCI host controller.
param[in] DeviceTreeBase Pointer to the device tree.
param[in] Node Offset of the device tree node whose "compatible"
property is "pci-host-ecam-generic".
param[in] RegProp Pointer to the "reg" property of Node. The caller
is responsible for ensuring that the size of the
property is 4 UINT32 cells.
@retval EFI_SUCCESS Parsing successful, properties parsed from Node
have been stored in dynamic PCDs.
@retval EFI_PROTOCOL_ERROR Parsing failed. PCDs are left unchanged.
**/
STATIC
EFI_STATUS
EFIAPI
ProcessPciHost (
IN CONST VOID *DeviceTreeBase,
IN INT32 Node,
IN CONST VOID *RegProp
)
{
UINT64 ConfigBase, ConfigSize;
CONST VOID *Prop;
INT32 Len;
UINT32 BusMin, BusMax;
UINT32 RecordIdx;
UINT64 IoBase, IoSize, IoTranslation;
UINT64 MmioBase, MmioSize, MmioTranslation;
//
// Fetch the ECAM window.
//
ConfigBase = fdt64_to_cpu (((CONST UINT64 *)RegProp)[0]);
ConfigSize = fdt64_to_cpu (((CONST UINT64 *)RegProp)[1]);
//
// Fetch the bus range (note: inclusive).
//
Prop = fdt_getprop (DeviceTreeBase, Node, "bus-range", &Len);
if (Prop == NULL || Len != 2 * sizeof(UINT32)) {
DEBUG ((EFI_D_ERROR, "%a: 'bus-range' not found or invalid\n",
__FUNCTION__));
return EFI_PROTOCOL_ERROR;
}
BusMin = fdt32_to_cpu (((CONST UINT32 *)Prop)[0]);
BusMax = fdt32_to_cpu (((CONST UINT32 *)Prop)[1]);
//
// Sanity check: the config space must accommodate all 4K register bytes of
// all 8 functions of all 32 devices of all buses.
//
if (BusMax < BusMin || BusMax - BusMin == MAX_UINT32 ||
DivU64x32 (ConfigSize, SIZE_4KB * 8 * 32) < BusMax - BusMin + 1) {
DEBUG ((EFI_D_ERROR, "%a: invalid 'bus-range' and/or 'reg'\n",
__FUNCTION__));
return EFI_PROTOCOL_ERROR;
}
//
// Iterate over "ranges".
//
Prop = fdt_getprop (DeviceTreeBase, Node, "ranges", &Len);
if (Prop == NULL || Len == 0 ||
Len % sizeof (DTB_PCI_HOST_RANGE_RECORD) != 0) {
DEBUG ((EFI_D_ERROR, "%a: 'ranges' not found or invalid\n", __FUNCTION__));
return EFI_PROTOCOL_ERROR;
}
//
// IoBase, IoTranslation, MmioBase and MmioTranslation are initialized only
// in order to suppress '-Werror=maybe-uninitialized' warnings *incorrectly*
// emitted by some gcc versions.
//
IoBase = 0;
IoTranslation = 0;
MmioBase = 0;
MmioTranslation = 0;
//
// IoSize and MmioSize are initialized to zero because the logic below
// requires it.
//
IoSize = 0;
MmioSize = 0;
for (RecordIdx = 0; RecordIdx < Len / sizeof (DTB_PCI_HOST_RANGE_RECORD);
++RecordIdx) {
CONST DTB_PCI_HOST_RANGE_RECORD *Record;
Record = (CONST DTB_PCI_HOST_RANGE_RECORD *)Prop + RecordIdx;
switch (fdt32_to_cpu (Record->Type) & DTB_PCI_HOST_RANGE_TYPEMASK) {
case DTB_PCI_HOST_RANGE_IO:
IoBase = fdt64_to_cpu (Record->ChildBase);
IoSize = fdt64_to_cpu (Record->Size);
IoTranslation = fdt64_to_cpu (Record->CpuBase) - IoBase;
break;
case DTB_PCI_HOST_RANGE_MMIO32:
MmioBase = fdt64_to_cpu (Record->ChildBase);
MmioSize = fdt64_to_cpu (Record->Size);
MmioTranslation = fdt64_to_cpu (Record->CpuBase) - MmioBase;
if (MmioBase > MAX_UINT32 || MmioSize > MAX_UINT32 ||
MmioBase + MmioSize > SIZE_4GB) {
DEBUG ((EFI_D_ERROR, "%a: MMIO32 space invalid\n", __FUNCTION__));
return EFI_PROTOCOL_ERROR;
}
if (MmioTranslation != 0) {
DEBUG ((EFI_D_ERROR, "%a: unsupported nonzero MMIO32 translation "
"0x%Lx\n", __FUNCTION__, MmioTranslation));
return EFI_UNSUPPORTED;
}
break;
}
}
if (IoSize == 0 || MmioSize == 0) {
DEBUG ((EFI_D_ERROR, "%a: %a space empty\n", __FUNCTION__,
(IoSize == 0) ? "IO" : "MMIO32"));
return EFI_PROTOCOL_ERROR;
}
PcdSet64 (PcdPciExpressBaseAddress, ConfigBase);
PcdSet32 (PcdPciBusMin, BusMin);
PcdSet32 (PcdPciBusMax, BusMax);
PcdSet64 (PcdPciIoBase, IoBase);
PcdSet64 (PcdPciIoSize, IoSize);
PcdSet64 (PcdPciIoTranslation, IoTranslation);
PcdSet32 (PcdPciMmio32Base, (UINT32)MmioBase);
PcdSet32 (PcdPciMmio32Size, (UINT32)MmioSize);
PcdSetBool (PcdPciDisableBusEnumeration, FALSE);
DEBUG ((EFI_D_INFO, "%a: Config[0x%Lx+0x%Lx) Bus[0x%x..0x%x] "
"Io[0x%Lx+0x%Lx)@0x%Lx Mem[0x%Lx+0x%Lx)@0x%Lx\n", __FUNCTION__, ConfigBase,
ConfigSize, BusMin, BusMax, IoBase, IoSize, IoTranslation, MmioBase,
MmioSize, MmioTranslation));
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
InitializeVirtFdtDxe (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
VOID *Hob;
VOID *DeviceTreeBase;
INT32 Node, Prev;
INT32 RtcNode;
EFI_STATUS Status;
CONST CHAR8 *Type;
INT32 Len;
PROPERTY_TYPE PropType;
CONST VOID *RegProp;
VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;
EFI_HANDLE Handle;
UINT64 RegBase;
UINT64 DistBase, CpuBase, RedistBase;
CONST INTERRUPT_PROPERTY *InterruptProp;
INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum;
CONST CHAR8 *PsciMethod;
UINT64 FwCfgSelectorAddress;
UINT64 FwCfgSelectorSize;
UINT64 FwCfgDataAddress;
UINT64 FwCfgDataSize;
Hob = GetFirstGuidHob(&gFdtHobGuid);
if (Hob == NULL || GET_GUID_HOB_DATA_SIZE (Hob) != sizeof (UINT64)) {
return EFI_NOT_FOUND;
}
DeviceTreeBase = (VOID *)(UINTN)*(UINT64 *)GET_GUID_HOB_DATA (Hob);
if (fdt_check_header (DeviceTreeBase) != 0) {
DEBUG ((EFI_D_ERROR, "%a: No DTB found @ 0x%p\n", __FUNCTION__, DeviceTreeBase));
return EFI_NOT_FOUND;
}
Status = gBS->InstallConfigurationTable (&gFdtTableGuid, DeviceTreeBase);
ASSERT_EFI_ERROR (Status);
DEBUG ((EFI_D_INFO, "%a: DTB @ 0x%p\n", __FUNCTION__, DeviceTreeBase));
RtcNode = -1;
//
// Now enumerate the nodes and install peripherals that we are interested in,
// i.e., GIC, RTC and virtio MMIO nodes
//
for (Prev = 0;; Prev = Node) {
Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
if (Node < 0) {
break;
}
Type = fdt_getprop (DeviceTreeBase, Node, "compatible", &Len);
if (Type == NULL) {
continue;
}
PropType = GetTypeFromNode (Type, Len);
if (PropType == PropertyTypeUnknown) {
continue;
}
//
// Get the 'reg' property of this node. For now, we will assume
// 8 byte quantities for base and size, respectively.
// TODO use #cells root properties instead
//
RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
ASSERT ((RegProp != NULL) || (PropType == PropertyTypeTimer) ||
(PropType == PropertyTypePsci));
switch (PropType) {
case PropertyTypePciHost:
ASSERT (Len == 2 * sizeof (UINT64));
Status = ProcessPciHost (DeviceTreeBase, Node, RegProp);
ASSERT_EFI_ERROR (Status);
break;
case PropertyTypeFwCfg:
ASSERT (Len == 2 * sizeof (UINT64));
FwCfgDataAddress = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
FwCfgDataSize = 8;
FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
FwCfgSelectorSize = 2;
//
// The following ASSERT()s express
//
// Address + Size - 1 <= MAX_UINTN
//
// for both registers, that is, that the last byte in each MMIO range is
// expressible as a MAX_UINTN. The form below is mathematically
// equivalent, and it also prevents any unsigned overflow before the
// comparison.
//
ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
PcdSet64 (PcdFwCfgSelectorAddress, FwCfgSelectorAddress);
PcdSet64 (PcdFwCfgDataAddress, FwCfgDataAddress);
DEBUG ((EFI_D_INFO, "Found FwCfg @ 0x%Lx/0x%Lx\n", FwCfgSelectorAddress,
FwCfgDataAddress));
break;
case PropertyTypeVirtio:
ASSERT (Len == 16);
//
// Create a unique device path for this transport on the fly
//
RegBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
DevicePath = (VIRTIO_TRANSPORT_DEVICE_PATH *)CreateDeviceNode (
HARDWARE_DEVICE_PATH,
HW_VENDOR_DP,
sizeof (VIRTIO_TRANSPORT_DEVICE_PATH));
if (DevicePath == NULL) {
DEBUG ((EFI_D_ERROR, "%a: Out of memory\n", __FUNCTION__));
break;
}
CopyMem (&DevicePath->Vendor.Guid, &gVirtioMmioTransportGuid,
sizeof (EFI_GUID));
DevicePath->PhysBase = RegBase;
SetDevicePathNodeLength (&DevicePath->Vendor,
sizeof (*DevicePath) - sizeof (DevicePath->End));
SetDevicePathEndNode (&DevicePath->End);
Handle = NULL;
Status = gBS->InstallProtocolInterface (&Handle,
&gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE,
DevicePath);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "%a: Failed to install the EFI_DEVICE_PATH "
"protocol on a new handle (Status == %r)\n",
__FUNCTION__, Status));
FreePool (DevicePath);
break;
}
Status = VirtioMmioInstallDevice (RegBase, Handle);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "%a: Failed to install VirtIO transport @ 0x%Lx "
"on handle %p (Status == %r)\n", __FUNCTION__, RegBase,
Handle, Status));
Status = gBS->UninstallProtocolInterface (Handle,
&gEfiDevicePathProtocolGuid, DevicePath);
ASSERT_EFI_ERROR (Status);
FreePool (DevicePath);
}
break;
case PropertyTypeGic:
ASSERT (Len == 32);
DistBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
CpuBase = fdt64_to_cpu (((UINT64 *)RegProp)[2]);
ASSERT (DistBase < MAX_UINT32);
ASSERT (CpuBase < MAX_UINT32);
PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);
PcdSet32 (PcdGicInterruptInterfaceBase, (UINT32)CpuBase);
DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase));
break;
case PropertyTypeGicV3:
//
// The GIC v3 DT binding describes a series of at least 3 physical (base
// addresses, size) pairs: the distributor interface (GICD), at least one
// redistributor region (GICR) containing dedicated redistributor
// interfaces for all individual CPUs, and the CPU interface (GICC).
// Under virtualization, we assume that the first redistributor region
// listed covers the boot CPU. Also, our GICv3 driver only supports the
// system register CPU interface, so we can safely ignore the MMIO version
// which is listed after the sequence of redistributor interfaces.
// This means we are only interested in the first two memory regions
// supplied, and ignore everything else.
//
ASSERT (Len >= 32);
// RegProp[0..1] == { GICD base, GICD size }
DistBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
ASSERT (DistBase < MAX_UINT32);
// RegProp[2..3] == { GICR base, GICR size }
RedistBase = fdt64_to_cpu (((UINT64 *)RegProp)[2]);
ASSERT (RedistBase < MAX_UINT32);
PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);
PcdSet32 (PcdGicRedistributorsBase, (UINT32)RedistBase);
DEBUG ((EFI_D_INFO, "Found GIC v3 (re)distributor @ 0x%Lx (0x%Lx)\n",
DistBase, RedistBase));
break;
case PropertyTypeRtc:
ASSERT (Len == 16);
RegBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
ASSERT (RegBase < MAX_UINT32);
PcdSet32 (PcdPL031RtcBase, (UINT32)RegBase);
DEBUG ((EFI_D_INFO, "Found PL031 RTC @ 0x%Lx\n", RegBase));
RtcNode = Node;
break;
case PropertyTypeTimer:
//
// - interrupts : Interrupt list for secure, non-secure, virtual and
// hypervisor timers, in that order.
//
InterruptProp = fdt_getprop (DeviceTreeBase, Node, "interrupts", &Len);
ASSERT (Len == 36 || Len == 48);
SecIntrNum = fdt32_to_cpu (InterruptProp[0].Number)
+ (InterruptProp[0].Type ? 16 : 0);
IntrNum = fdt32_to_cpu (InterruptProp[1].Number)
+ (InterruptProp[1].Type ? 16 : 0);
VirtIntrNum = fdt32_to_cpu (InterruptProp[2].Number)
+ (InterruptProp[2].Type ? 16 : 0);
HypIntrNum = Len < 48 ? 0 : fdt32_to_cpu (InterruptProp[3].Number)
+ (InterruptProp[3].Type ? 16 : 0);
DEBUG ((EFI_D_INFO, "Found Timer interrupts %d, %d, %d, %d\n",
SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum));
PcdSet32 (PcdArmArchTimerSecIntrNum, SecIntrNum);
PcdSet32 (PcdArmArchTimerIntrNum, IntrNum);
PcdSet32 (PcdArmArchTimerVirtIntrNum, VirtIntrNum);
PcdSet32 (PcdArmArchTimerHypIntrNum, HypIntrNum);
break;
case PropertyTypePsci:
PsciMethod = fdt_getprop (DeviceTreeBase, Node, "method", &Len);
if (PsciMethod && AsciiStrnCmp (PsciMethod, "hvc", 3) == 0) {
PcdSet32 (PcdArmPsciMethod, 1);
} else if (PsciMethod && AsciiStrnCmp (PsciMethod, "smc", 3) == 0) {
PcdSet32 (PcdArmPsciMethod, 2);
} else {
DEBUG ((EFI_D_ERROR, "%a: Unknown PSCI method \"%a\"\n", __FUNCTION__,
PsciMethod));
}
break;
case PropertyTypeXen:
ASSERT (Len == 16);
//
// Retrieve the reg base from this node and wire it up to the
// MMIO flavor of the XenBus root device I/O protocol
//
RegBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
Handle = NULL;
Status = XenIoMmioInstall (&Handle, RegBase);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "%a: XenIoMmioInstall () failed on a new handle "
"(Status == %r)\n", __FUNCTION__, Status));
break;
}
DEBUG ((EFI_D_INFO, "Found Xen node with Grant table @ 0x%Lx\n", RegBase));
break;
default:
break;
}
}
//
// UEFI takes ownership of the RTC hardware, and exposes its functionality
// through the UEFI Runtime Services GetTime, SetTime, etc. This means we
// need to disable it in the device tree to prevent the OS from attaching its
// device driver as well.
//
if ((RtcNode != -1) &&
fdt_setprop_string (DeviceTreeBase, RtcNode, "status",
"disabled") != 0) {
DEBUG ((EFI_D_WARN, "Failed to set PL031 status to 'disabled'\n"));
}
return EFI_SUCCESS;
}

78
ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf
View File

@@ -1,78 +0,0 @@
## @file
# Device tree enumeration DXE driver for ARM Virtual Machines
#
# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials are
# licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = VirtFdtDxe
FILE_GUID = 9AD7DCB4-E6EC-472E-96BF-81C219A3F77E
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = InitializeVirtFdtDxe
[Sources]
VirtFdtDxe.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
OvmfPkg/OvmfPkg.dec
[LibraryClasses]
BaseLib
PcdLib
UefiDriverEntryPoint
DxeServicesLib
FdtLib
VirtioMmioDeviceLib
HobLib
XenIoMmioLib
[Guids]
gFdtTableGuid
gVirtioMmioTransportGuid
gFdtHobGuid
[Pcd]
gArmVirtualizationTokenSpaceGuid.PcdArmPsciMethod
gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress
gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase
gArmPlatformTokenSpaceGuid.PcdPciBusMin
gArmPlatformTokenSpaceGuid.PcdPciBusMax
gArmPlatformTokenSpaceGuid.PcdPciIoBase
gArmPlatformTokenSpaceGuid.PcdPciIoSize
gArmPlatformTokenSpaceGuid.PcdPciIoTranslation
gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
[Protocols]
gEfiDevicePathProtocolGuid
[Depex]
TRUE