Enhance PciCfg2 driver to handle unaligned Pci access according to PI spec.
Remove the undefined logic to process gEfiStatusCodeSpecificDataGuid status code data. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7078 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -54,22 +54,47 @@ PciCfgRead (
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UINTN PciLibAddress;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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switch (Width) {
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case EfiPeiPciCfgWidthUint8:
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* (UINT8 *) Buffer = PciRead8 (PciLibAddress);
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break;
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case EfiPeiPciCfgWidthUint16:
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* (UINT16 *) Buffer = PciRead16 (PciLibAddress);
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break;
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case EfiPeiPciCfgWidthUint32:
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* (UINT32 *) Buffer = PciRead32 (PciLibAddress);
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break;
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default:
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return EFI_INVALID_PARAMETER;
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if (Width == EfiPeiPciCfgWidthUint8) {
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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WriteUnaligned32 (((UINT32 *) Buffer), PciRead32 (PciLibAddress));
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
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WriteUnaligned16 (((UINT16 *) Buffer + 1), PciRead16 (PciLibAddress + 2));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
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*((UINT8 *) Buffer + 2) = PciRead8 (PciLibAddress + 2);
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*((UINT8 *) Buffer + 3) = PciRead8 (PciLibAddress + 3);
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}
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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@@ -104,22 +129,47 @@ PciCfgWrite (
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UINTN PciLibAddress;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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switch (Width) {
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case EfiPeiPciCfgWidthUint8:
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PciWrite8 (PciLibAddress, *(UINT8 *) Buffer);
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break;
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case EfiPeiPciCfgWidthUint16:
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PciWrite16 (PciLibAddress, *(UINT16 *) Buffer);
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break;
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case EfiPeiPciCfgWidthUint32:
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PciWrite32 (PciLibAddress, *(UINT32 *) Buffer);
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break;
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default:
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return EFI_INVALID_PARAMETER;
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if (Width == EfiPeiPciCfgWidthUint8) {
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *) Buffer));
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
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PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *) Buffer + 1));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
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PciWrite8 (PciLibAddress + 2, *((UINT8 *) Buffer + 2));
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PciWrite8 (PciLibAddress + 3, *((UINT8 *) Buffer + 3));
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}
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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@@ -154,22 +204,46 @@ PciCfgModify (
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UINTN PciLibAddress;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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switch (Width) {
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case EfiPeiPciCfgWidthUint8:
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PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
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break;
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case EfiPeiPciCfgWidthUint16:
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if (Width == EfiPeiPciCfgWidthUint8) {
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PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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PciAndThenOr16 (PciLibAddress, (UINT16)~ClearBits, (UINT16)SetBits);
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break;
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case EfiPeiPciCfgWidthUint32:
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
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PciAndThenOr8 (PciLibAddress + 1, (UINT8)~(ClearBits >> 8), (UINT8)(SetBits >> 8));
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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PciAndThenOr32 (PciLibAddress, (UINT32)~ClearBits, (UINT32)SetBits);
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break;
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default:
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return EFI_INVALID_PARAMETER;
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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PciAndThenOr16 (PciLibAddress, (UINT16)~ClearBits, (UINT16)SetBits);
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PciAndThenOr16 (PciLibAddress + 2, (UINT16)~(ClearBits >> 16), (UINT16)(SetBits >> 16));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
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PciAndThenOr8 (PciLibAddress + 1, (UINT8)~(ClearBits >> 8), (UINT8)(SetBits >> 8));
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PciAndThenOr8 (PciLibAddress + 2, (UINT8)~(ClearBits >> 16), (UINT8)(SetBits >> 16));
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PciAndThenOr8 (PciLibAddress + 3, (UINT8)~(ClearBits >> 24), (UINT8)(SetBits >> 24));
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}
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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