sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Enhance PciCfg2 driver to handle unaligned Pci access according to PI spec.

Browse Source 
Remove the undefined logic to process gEfiStatusCodeSpecificDataGuid status code data.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7078 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
lgao4
2008-12-18 07:41:58 +00:00
parent 8501ba4c6d
commit 8191cd5efd
9 changed files with 227 additions and 87 deletions
Download Patch File Download Diff File Expand all files Collapse all files

156
IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c
View File

@@ -54,22 +54,47 @@ PciCfgRead (
UINTN PciLibAddress;
PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
switch (Width) {
case EfiPeiPciCfgWidthUint8:
* (UINT8 *) Buffer = PciRead8 (PciLibAddress);
break;
case EfiPeiPciCfgWidthUint16:
* (UINT16 *) Buffer = PciRead16 (PciLibAddress);
break;
case EfiPeiPciCfgWidthUint32:
* (UINT32 *) Buffer = PciRead32 (PciLibAddress);
break;
default:
return EFI_INVALID_PARAMETER;
if (Width == EfiPeiPciCfgWidthUint8) {
*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
} else if (Width == EfiPeiPciCfgWidthUint16) {
if ((PciLibAddress & 0x01) == 0) {
//
// Aligned Pci address access
//
WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
} else {
//
// Unaligned Pci address access, break up the request into byte by byte.
//
*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
}
} else if (Width == EfiPeiPciCfgWidthUint32) {
if ((PciLibAddress & 0x03) == 0) {
//
// Aligned Pci address access
//
WriteUnaligned32 (((UINT32 *) Buffer), PciRead32 (PciLibAddress));
} else if ((PciLibAddress & 0x01) == 0) {
//
// Unaligned Pci address access, break up the request into word by word.
//
WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
WriteUnaligned16 (((UINT16 *) Buffer + 1), PciRead16 (PciLibAddress + 2));
} else {
//
// Unaligned Pci address access, break up the request into byte by byte.
//
*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
*((UINT8 *) Buffer + 2) = PciRead8 (PciLibAddress + 2);
*((UINT8 *) Buffer + 3) = PciRead8 (PciLibAddress + 3);
}
} else {
return EFI_INVALID_PARAMETER;
}
return EFI_SUCCESS;
}
@@ -104,22 +129,47 @@ PciCfgWrite (
UINTN PciLibAddress;
PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
switch (Width) {
case EfiPeiPciCfgWidthUint8:
PciWrite8 (PciLibAddress, *(UINT8 *) Buffer);
break;
case EfiPeiPciCfgWidthUint16:
PciWrite16 (PciLibAddress, *(UINT16 *) Buffer);
break;
case EfiPeiPciCfgWidthUint32:
PciWrite32 (PciLibAddress, *(UINT32 *) Buffer);
break;
default:
return EFI_INVALID_PARAMETER;
if (Width == EfiPeiPciCfgWidthUint8) {
PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
} else if (Width == EfiPeiPciCfgWidthUint16) {
if ((PciLibAddress & 0x01) == 0) {
//
// Aligned Pci address access
//
PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
} else {
//
// Unaligned Pci address access, break up the request into byte by byte.
//
PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
}
} else if (Width == EfiPeiPciCfgWidthUint32) {
if ((PciLibAddress & 0x03) == 0) {
//
// Aligned Pci address access
//
PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *) Buffer));
} else if ((PciLibAddress & 0x01) == 0) {
//
// Unaligned Pci address access, break up the request into word by word.
//
PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *) Buffer + 1));
} else {
//
// Unaligned Pci address access, break up the request into byte by byte.
//
PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
PciWrite8 (PciLibAddress + 2, *((UINT8 *) Buffer + 2));
PciWrite8 (PciLibAddress + 3, *((UINT8 *) Buffer + 3));
}
} else {
return EFI_INVALID_PARAMETER;
}
return EFI_SUCCESS;
}
@@ -154,22 +204,46 @@ PciCfgModify (
UINTN PciLibAddress;
PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
switch (Width) {
case EfiPeiPciCfgWidthUint8:
PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
break;
case EfiPeiPciCfgWidthUint16:
if (Width == EfiPeiPciCfgWidthUint8) {
PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
} else if (Width == EfiPeiPciCfgWidthUint16) {
if ((PciLibAddress & 0x01) == 0) {
//
// Aligned Pci address access
//
PciAndThenOr16 (PciLibAddress, (UINT16)~ClearBits, (UINT16)SetBits);
break;
case EfiPeiPciCfgWidthUint32:
} else {
//
// Unaligned Pci address access, break up the request into byte by byte.
//
PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
PciAndThenOr8 (PciLibAddress + 1, (UINT8)~(ClearBits >> 8), (UINT8)(SetBits >> 8));
}
} else if (Width == EfiPeiPciCfgWidthUint32) {
if ((PciLibAddress & 0x03) == 0) {
//
// Aligned Pci address access
//
PciAndThenOr32 (PciLibAddress, (UINT32)~ClearBits, (UINT32)SetBits);
break;
default:
return EFI_INVALID_PARAMETER;
} else if ((PciLibAddress & 0x01) == 0) {
//
// Unaligned Pci address access, break up the request into word by word.
//
PciAndThenOr16 (PciLibAddress, (UINT16)~ClearBits, (UINT16)SetBits);
PciAndThenOr16 (PciLibAddress + 2, (UINT16)~(ClearBits >> 16), (UINT16)(SetBits >> 16));
} else {
//
// Unaligned Pci address access, break up the request into byte by byte.
//
PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);
PciAndThenOr8 (PciLibAddress + 1, (UINT8)~(ClearBits >> 8), (UINT8)(SetBits >> 8));
PciAndThenOr8 (PciLibAddress + 2, (UINT8)~(ClearBits >> 16), (UINT8)(SetBits >> 16));
PciAndThenOr8 (PciLibAddress + 3, (UINT8)~(ClearBits >> 24), (UINT8)(SetBits >> 24));
}
} else {
return EFI_INVALID_PARAMETER;
}
return EFI_SUCCESS;
}