CorebootModulePkg: Remove DuetPkg references
Remove the references to DuetPkg. Copy the files from revision
ffea0a2ce2 of DuetPkg into
CorebootModulePkg. The components include:
* PciBusNoEnumerationDxe
* PciRootBridgeNoEnumerationDxe
* SataControllerDxe
TEST=Build and run on Galileo Gen2
Change-Id: Id07185f7e226749e5f7c6b6cb427bcef7eac8496
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
This commit is contained in:
Leahy, Leroy P
committed by
Prince Agyeman
Prince Agyeman
parent
13986b690c
commit
81a23a0fee
557
CorebootModulePkg/PciBusNoEnumerationDxe/PciOptionRomSupport.c
Normal file
557
CorebootModulePkg/PciBusNoEnumerationDxe/PciOptionRomSupport.c
Normal file
@ -0,0 +1,557 @@
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/*++
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Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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PciOptionRomSupport.c
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Abstract:
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PCI Bus Driver
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Revision History
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--*/
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#include "PciBus.h"
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EFI_STATUS
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RomDecode (
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IN PCI_IO_DEVICE *PciDevice,
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IN UINT8 RomBarIndex,
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IN UINT32 RomBar,
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IN BOOLEAN Enable
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);
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EFI_STATUS
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GetOpRomInfo (
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IN PCI_IO_DEVICE *PciIoDevice
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)
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/*++
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Routine Description:
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Arguments:
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Returns:
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--*/
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{
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UINT8 RomBarIndex;
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UINT32 AllOnes;
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UINT64 Address;
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EFI_STATUS Status;
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UINT8 Bus;
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UINT8 Device;
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UINT8 Function;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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Bus = PciIoDevice->BusNumber;
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Device = PciIoDevice->DeviceNumber;
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Function = PciIoDevice->FunctionNumber;
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PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;
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//
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// offset is 0x30 if is not ppb
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//
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//
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// 0x30
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//
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RomBarIndex = PCI_EXPANSION_ROM_BASE;
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if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
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//
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// if is ppb
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//
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//
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// 0x38
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//
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RomBarIndex = PCI_BRIDGE_ROMBAR;
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}
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//
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// the bit0 is 0 to prevent the enabling of the Rom address decoder
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//
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AllOnes = 0xfffffffe;
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Address = EFI_PCI_ADDRESS (Bus, Device, Function, RomBarIndex);
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Status = PciRootBridgeIo->Pci.Write (
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PciRootBridgeIo,
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EfiPciWidthUint32,
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Address,
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1,
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&AllOnes
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// read back
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//
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Status = PciRootBridgeIo->Pci.Read (
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PciRootBridgeIo,
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EfiPciWidthUint32,
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Address,
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1,
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&AllOnes
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Bits [1, 10] are reserved
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//
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AllOnes &= 0xFFFFF800;
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if ((AllOnes == 0) || (AllOnes == 0xFFFFF800)) {
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return EFI_NOT_FOUND;
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}
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DEBUG ((EFI_D_ERROR, "PCIBUS: GetOpRomInfo: OPROM detected!\n"));
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DEBUG ((EFI_D_ERROR, "PCIBUS: GetOpRomInfo: B-%x, D-%x, F-%x\n", (UINTN)Bus, (UINTN)Device, (UINTN)Function));
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PciIoDevice->RomSize = (UINT64) ((~AllOnes) + 1);
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return EFI_SUCCESS;
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}
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EFI_STATUS
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LoadOpRomImage (
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IN PCI_IO_DEVICE *PciDevice,
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IN UINT64 ReservedMemoryBase
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)
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/*++
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Routine Description:
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Load option rom image for specified PCI device
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Arguments:
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Returns:
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--*/
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{
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UINT8 RomBarIndex;
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UINT8 Indicator;
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UINT16 OffsetPcir;
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UINT32 RomBarOffset;
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UINT32 RomBar;
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EFI_STATUS retStatus;
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BOOLEAN FirstCheck;
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UINT8 *Image;
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PCI_EXPANSION_ROM_HEADER *RomHeader;
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PCI_DATA_STRUCTURE *RomPcir;
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UINT64 RomSize;
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UINT64 RomImageSize;
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UINT32 LegacyImageLength;
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UINT8 *RomInMemory;
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UINT8 CodeType;
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RomSize = PciDevice->RomSize;
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Indicator = 0;
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RomImageSize = 0;
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RomInMemory = NULL;
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CodeType = 0xFF;
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//
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// Get the RomBarIndex
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//
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//
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// 0x30
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//
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RomBarIndex = PCI_EXPANSION_ROM_BASE;
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if (IS_PCI_BRIDGE (&(PciDevice->Pci))) {
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//
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// if is ppb
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//
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//
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// 0x38
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//
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RomBarIndex = PCI_BRIDGE_ROMBAR;
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}
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//
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// Allocate memory for Rom header and PCIR
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//
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RomHeader = AllocatePool (sizeof (PCI_EXPANSION_ROM_HEADER));
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if (RomHeader == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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RomPcir = AllocatePool (sizeof (PCI_DATA_STRUCTURE));
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if (RomPcir == NULL) {
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gBS->FreePool (RomHeader);
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return EFI_OUT_OF_RESOURCES;
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}
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RomBar = (UINT32)ReservedMemoryBase;
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//
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// Enable RomBar
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//
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RomDecode (PciDevice, RomBarIndex, RomBar, TRUE);
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RomBarOffset = RomBar;
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retStatus = EFI_NOT_FOUND;
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FirstCheck = TRUE;
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LegacyImageLength = 0;
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do {
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PciDevice->PciRootBridgeIo->Mem.Read (
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PciDevice->PciRootBridgeIo,
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EfiPciWidthUint8,
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RomBarOffset,
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sizeof (PCI_EXPANSION_ROM_HEADER),
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(UINT8 *) RomHeader
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);
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if (RomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
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RomBarOffset = RomBarOffset + 512;
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if (FirstCheck) {
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break;
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} else {
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RomImageSize = RomImageSize + 512;
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continue;
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}
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}
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FirstCheck = FALSE;
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OffsetPcir = RomHeader->PcirOffset;
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//
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// If the pointer to the PCI Data Structure is invalid, no further images can be located.
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// The PCI Data Structure must be DWORD aligned.
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//
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if (OffsetPcir == 0 ||
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(OffsetPcir & 3) != 0 ||
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RomImageSize + OffsetPcir + sizeof (PCI_DATA_STRUCTURE) > RomSize) {
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break;
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}
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PciDevice->PciRootBridgeIo->Mem.Read (
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PciDevice->PciRootBridgeIo,
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EfiPciWidthUint8,
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RomBarOffset + OffsetPcir,
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sizeof (PCI_DATA_STRUCTURE),
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(UINT8 *) RomPcir
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);
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//
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// If a valid signature is not present in the PCI Data Structure, no further images can be located.
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//
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if (RomPcir->Signature != PCI_DATA_STRUCTURE_SIGNATURE) {
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break;
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}
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if (RomImageSize + RomPcir->ImageLength * 512 > RomSize) {
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break;
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}
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if (RomPcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
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CodeType = PCI_CODE_TYPE_PCAT_IMAGE;
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LegacyImageLength = ((UINT32)((EFI_LEGACY_EXPANSION_ROM_HEADER *)RomHeader)->Size512) * 512;
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}
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Indicator = RomPcir->Indicator;
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RomImageSize = RomImageSize + RomPcir->ImageLength * 512;
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RomBarOffset = RomBarOffset + RomPcir->ImageLength * 512;
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} while (((Indicator & 0x80) == 0x00) && ((RomBarOffset - RomBar) < RomSize));
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//
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// Some Legacy Cards do not report the correct ImageLength so used the maximum
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// of the legacy length and the PCIR Image Length
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//
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if (CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
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RomImageSize = MAX (RomImageSize, LegacyImageLength);
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}
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if (RomImageSize > 0) {
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retStatus = EFI_SUCCESS;
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Image = AllocatePool ((UINT32) RomImageSize);
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if (Image == NULL) {
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RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
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gBS->FreePool (RomHeader);
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gBS->FreePool (RomPcir);
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return EFI_OUT_OF_RESOURCES;
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}
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//
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// Copy Rom image into memory
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//
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PciDevice->PciRootBridgeIo->Mem.Read (
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PciDevice->PciRootBridgeIo,
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EfiPciWidthUint8,
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RomBar,
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(UINT32) RomImageSize,
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Image
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);
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RomInMemory = Image;
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}
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RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
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PciDevice->PciIo.RomSize = RomImageSize;
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PciDevice->PciIo.RomImage = RomInMemory;
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//
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// Free allocated memory
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//
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gBS->FreePool (RomHeader);
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gBS->FreePool (RomPcir);
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return retStatus;
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}
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EFI_STATUS
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RomDecode (
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IN PCI_IO_DEVICE *PciDevice,
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IN UINT8 RomBarIndex,
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IN UINT32 RomBar,
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IN BOOLEAN Enable
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)
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/*++
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Routine Description:
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Arguments:
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Returns:
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--*/
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{
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UINT16 CommandValue;
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UINT32 Value32;
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UINT64 Address;
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//EFI_STATUS Status;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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PciRootBridgeIo = PciDevice->PciRootBridgeIo;
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if (Enable) {
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Address = EFI_PCI_ADDRESS (PciDevice->BusNumber, PciDevice->DeviceNumber, PciDevice->FunctionNumber, RomBarIndex);
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//
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// set the Rom base address: now is hardcode
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//
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PciRootBridgeIo->Pci.Write(
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PciRootBridgeIo,
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EfiPciWidthUint32,
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Address,
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1,
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&RomBar);
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//
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// enable its decoder
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//
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Value32 = RomBar | 0x1;
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PciRootBridgeIo->Pci.Write(
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PciRootBridgeIo,
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EfiPciWidthUint32,
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Address,
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1,
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&Value32);
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//
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//setting the memory space bit in the function's command register
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//
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Address = EFI_PCI_ADDRESS (PciDevice->BusNumber, PciDevice->DeviceNumber, PciDevice->FunctionNumber, 0x04);
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PciRootBridgeIo->Pci.Read(
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PciRootBridgeIo,
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EfiPciWidthUint16,
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Address,
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1,
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&CommandValue);
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CommandValue = (UINT16)(CommandValue | 0x0002); //0x0003
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PciRootBridgeIo->Pci.Write(
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PciRootBridgeIo,
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EfiPciWidthUint16,
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Address,
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1,
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&CommandValue);
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} else {
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//
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// disable rom decode
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//
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Address = EFI_PCI_ADDRESS (PciDevice->BusNumber, PciDevice->DeviceNumber, PciDevice->FunctionNumber, RomBarIndex);
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Value32 = 0xfffffffe;
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PciRootBridgeIo->Pci.Write(
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PciRootBridgeIo,
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EfiPciWidthUint32,
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Address,
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1,
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&Value32);
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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ProcessOpRomImage (
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PCI_IO_DEVICE *PciDevice
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)
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/*++
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Routine Description:
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Process the oprom image.
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Arguments:
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PciDevice A pointer to a pci device.
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Returns:
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EFI Status.
|
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|
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--*/
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{
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UINT8 Indicator;
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UINT32 ImageSize;
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UINT16 ImageOffset;
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VOID *RomBar;
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UINT8 *RomBarOffset;
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EFI_HANDLE ImageHandle;
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EFI_STATUS Status;
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EFI_STATUS retStatus;
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BOOLEAN SkipImage;
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UINT32 DestinationSize;
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UINT32 ScratchSize;
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UINT8 *Scratch;
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VOID *ImageBuffer;
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VOID *DecompressedImageBuffer;
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UINT32 ImageLength;
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EFI_DECOMPRESS_PROTOCOL *Decompress;
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EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
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PCI_DATA_STRUCTURE *Pcir;
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UINT32 InitializationSize;
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Indicator = 0;
|
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|
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//
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// Get the Address of the Rom image
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//
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RomBar = PciDevice->PciIo.RomImage;
|
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RomBarOffset = (UINT8 *) RomBar;
|
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retStatus = EFI_NOT_FOUND;
|
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|
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if (RomBarOffset == NULL) {
|
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return retStatus;
|
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}
|
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ASSERT (((EFI_PCI_EXPANSION_ROM_HEADER *) RomBarOffset)->Signature == PCI_EXPANSION_ROM_HEADER_SIGNATURE);
|
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|
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do {
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EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *) RomBarOffset;
|
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if (EfiRomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
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RomBarOffset = RomBarOffset + 512;
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continue;
|
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}
|
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|
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Pcir = (PCI_DATA_STRUCTURE *) (RomBarOffset + EfiRomHeader->PcirOffset);
|
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ASSERT (Pcir->Signature == PCI_DATA_STRUCTURE_SIGNATURE);
|
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ImageSize = (UINT32) (Pcir->ImageLength * 512);
|
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Indicator = Pcir->Indicator;
|
||||
|
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if ((Pcir->CodeType == PCI_CODE_TYPE_EFI_IMAGE) &&
|
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(EfiRomHeader->EfiSignature == EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE) &&
|
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((EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER) ||
|
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(EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER))) {
|
||||
|
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ImageOffset = EfiRomHeader->EfiImageHeaderOffset;
|
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InitializationSize = EfiRomHeader->InitializationSize * 512;
|
||||
|
||||
if (InitializationSize <= ImageSize && ImageOffset < InitializationSize) {
|
||||
|
||||
ImageBuffer = (VOID *) (RomBarOffset + ImageOffset);
|
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ImageLength = InitializationSize - (UINT32)ImageOffset;
|
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DecompressedImageBuffer = NULL;
|
||||
|
||||
//
|
||||
// decompress here if needed
|
||||
//
|
||||
SkipImage = FALSE;
|
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if (EfiRomHeader->CompressionType > EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED) {
|
||||
SkipImage = TRUE;
|
||||
}
|
||||
|
||||
if (EfiRomHeader->CompressionType == EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED) {
|
||||
Status = gBS->LocateProtocol (&gEfiDecompressProtocolGuid, NULL, (VOID **) &Decompress);
|
||||
if (EFI_ERROR (Status)) {
|
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SkipImage = TRUE;
|
||||
} else {
|
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SkipImage = TRUE;
|
||||
Status = Decompress->GetInfo (
|
||||
Decompress,
|
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ImageBuffer,
|
||||
ImageLength,
|
||||
&DestinationSize,
|
||||
&ScratchSize
|
||||
);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
DecompressedImageBuffer = NULL;
|
||||
DecompressedImageBuffer = AllocatePool (DestinationSize);
|
||||
if (DecompressedImageBuffer != NULL) {
|
||||
Scratch = AllocatePool (ScratchSize);
|
||||
if (Scratch != NULL) {
|
||||
Status = Decompress->Decompress (
|
||||
Decompress,
|
||||
ImageBuffer,
|
||||
ImageLength,
|
||||
DecompressedImageBuffer,
|
||||
DestinationSize,
|
||||
Scratch,
|
||||
ScratchSize
|
||||
);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
ImageBuffer = DecompressedImageBuffer;
|
||||
ImageLength = DestinationSize;
|
||||
SkipImage = FALSE;
|
||||
}
|
||||
|
||||
gBS->FreePool (Scratch);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (!SkipImage) {
|
||||
//
|
||||
// load image and start image
|
||||
//
|
||||
Status = gBS->LoadImage (
|
||||
FALSE,
|
||||
gPciBusDriverBinding.DriverBindingHandle,
|
||||
NULL,
|
||||
ImageBuffer,
|
||||
ImageLength,
|
||||
&ImageHandle
|
||||
);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
Status = gBS->StartImage (ImageHandle, NULL, NULL);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
AddDriver (PciDevice, ImageHandle);
|
||||
retStatus = EFI_SUCCESS;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
RomBarOffset = RomBarOffset + ImageSize;
|
||||
} else {
|
||||
RomBarOffset = RomBarOffset + ImageSize;
|
||||
}
|
||||
} else {
|
||||
RomBarOffset = RomBarOffset + ImageSize;
|
||||
}
|
||||
|
||||
} while (((Indicator & 0x80) == 0x00) && ((UINTN) (RomBarOffset - (UINT8 *) RomBar) < PciDevice->RomSize));
|
||||
|
||||
return retStatus;
|
||||
|
||||
}
|
||||
Reference in New Issue
Block a user