Add code to identify D0 stepping ValleyView SoC.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shifei Lu <shifeix.a.lu@intel.com> Reviewed-by: David Wei <david.wei@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17034 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -83,7 +83,12 @@ PchStepping (
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return PchB2;
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break;
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case V_PCH_LPC_RID_A:
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case V_PCH_LPC_RID_A:
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case V_PCH_LPC_RID_B:
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return PchB3;
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break;
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case V_PCH_LPC_RID_C:
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case V_PCH_LPC_RID_D:
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return PchC0;
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break;
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