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Add missing PCI class code definition.

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PCI22/PCI23/PCI30 spec were reviewed and the missing definitions were added to accordingly Pci22.h/Pci23.h/Pci30.h.
All other class code definitions that are not defined in PCI Local Bus specification but in PCI Code and ID Assignment specification are defined in PciCodeId.h.

Signed-off-by: Ruiyu Ni<ruiyu.ni@intel.com>
Reviewed-by: Liming Gao<liming.gao@intel.com>
Reviewed-by: Hot Tian<hot.tian@intel.com>
Reviewed-by: Elvin Li<elvin.li@intel.com>
Reviewed-by: Feng Tian<feng.tian@intel.com>
Reviewed-by: Jiewen Yao<jiewen.yao@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13919 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
niruiyu
2012-11-02 06:13:14 +00:00
parent 44c56530b3
commit 826a66d4c0
5 changed files with 172 additions and 10 deletions
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16
MdePkg/Include/IndustryStandard/Pci30.h
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@@ -1,7 +1,7 @@
/** @file
Support for PCI 3.0 standard.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -19,13 +19,23 @@
#include <IndustryStandard/Pci23.h>
///
/// Definitions of PCI class bytes and manipulation macros.
/// PCI_CLASS_MASS_STORAGE, Base Class 01h.
///
///@{
#define PCI_CLASS_MASS_STORAGE_SATADPA 0x06
#define PCI_IF_MASS_STORAGE_SATA 0x00
#define PCI_IF_MASS_STORAGE_AHCI 0x01
///@}
/**
///
/// PCI_CLASS_WIRELESS, Base Class 0Dh.
///
///@{
#define PCI_SUBCLASS_ETHERNET_80211A 0x20
#define PCI_SUBCLASS_ETHERNET_80211B 0x21
///@}
/**
Macro that checks whether device is a SATA controller.
@param _p Specified device.