MdeModulePkg DxeCore/PiSmmCore: Add UEFI memory and SMRAM profile support.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16335 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -2,7 +2,7 @@
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The internal header file that declared a data structure that is shared
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between the SMM IPL and the SMM Core.
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Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available
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under the terms and conditions of the BSD License which accompanies this
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distribution. The full text of the license may be found at
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@@ -116,6 +116,57 @@ typedef struct {
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/// a software SMI handler back to the caller of the SMM Communication Protocol.
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///
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EFI_STATUS ReturnStatus;
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EFI_PHYSICAL_ADDRESS PiSmmCoreImageBase;
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UINT64 PiSmmCoreImageSize;
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EFI_PHYSICAL_ADDRESS PiSmmCoreEntryPoint;
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UINTN FullSmramRangeCount;
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EFI_SMRAM_DESCRIPTOR *FullSmramRanges;
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} SMM_CORE_PRIVATE_DATA;
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//
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// Page management
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//
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typedef struct {
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LIST_ENTRY Link;
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UINTN NumberOfPages;
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} FREE_PAGE_LIST;
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extern LIST_ENTRY mSmmMemoryMap;
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//
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// Pool management
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//
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//
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// MIN_POOL_SHIFT must not be less than 5
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//
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#define MIN_POOL_SHIFT 6
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#define MIN_POOL_SIZE (1 << MIN_POOL_SHIFT)
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//
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// MAX_POOL_SHIFT must not be less than EFI_PAGE_SHIFT - 1
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//
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#define MAX_POOL_SHIFT (EFI_PAGE_SHIFT - 1)
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#define MAX_POOL_SIZE (1 << MAX_POOL_SHIFT)
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//
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// MAX_POOL_INDEX are calculated by maximum and minimum pool sizes
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//
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#define MAX_POOL_INDEX (MAX_POOL_SHIFT - MIN_POOL_SHIFT + 1)
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typedef struct {
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UINTN Size;
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BOOLEAN Available;
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} POOL_HEADER;
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typedef struct {
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POOL_HEADER Header;
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LIST_ENTRY Link;
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} FREE_POOL_HEADER;
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extern LIST_ENTRY mSmmPoolLists[MAX_POOL_INDEX];
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#endif
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