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MdeModulePkg: Change use of EFI_D_* to DEBUG_*

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Michael D Kinney
2021-11-16 19:21:29 -08:00
committed by mergify[bot]
parent 917e98f3e5
commit 87000d7708
146 changed files with 1560 additions and 1619 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
View File

@@ -1003,7 +1003,7 @@ PciHostBridgeAdjustAllocation (
Status = RejectPciDevice (PciResNode->PciDev);
if (Status == EFI_SUCCESS) {
DEBUG ((
EFI_D_ERROR,
DEBUG_ERROR,
"PciBus: [%02x|%02x|%02x] was rejected due to resource confliction.\n",
PciResNode->PciDev->BusNumber, PciResNode->PciDev->DeviceNumber, PciResNode->PciDev->FunctionNumber
));
@@ -2207,4 +2207,3 @@ AddHostBridgeEnumerator (
return EFI_SUCCESS;
}

23
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
View File

@@ -231,7 +231,7 @@ PciSearchDevice (
PciIoDevice = NULL;
DEBUG ((
EFI_D_INFO,
DEBUG_INFO,
"PciBus: Discovered %s @ [%02x|%02x|%02x]\n",
IS_PCI_BRIDGE (Pci) ? L"PPB" :
IS_CARDBUS_BRIDGE (Pci) ? L"P2C" :
@@ -398,7 +398,7 @@ DumpPpbPaddingResource (
if ((Type != PciBarTypeUnknown) && ((ResourceType == PciBarTypeUnknown) || (ResourceType == Type))) {
DEBUG ((
EFI_D_INFO,
DEBUG_INFO,
" Padding: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx\n",
mBarTypeStr[Type], Descriptor->AddrRangeMax, Descriptor->AddrLen
));
@@ -425,7 +425,7 @@ DumpPciBars (
}
DEBUG ((
EFI_D_INFO,
DEBUG_INFO,
" BAR[%d]: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx;\tOffset = 0x%02x\n",
Index, mBarTypeStr[MIN (PciIoDevice->PciBar[Index].BarType, PciBarTypeMaxType)],
PciIoDevice->PciBar[Index].Alignment, PciIoDevice->PciBar[Index].Length, PciIoDevice->PciBar[Index].Offset
@@ -438,13 +438,13 @@ DumpPciBars (
}
DEBUG ((
EFI_D_INFO,
DEBUG_INFO,
" VFBAR[%d]: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx;\tOffset = 0x%02x\n",
Index, mBarTypeStr[MIN (PciIoDevice->VfPciBar[Index].BarType, PciBarTypeMaxType)],
PciIoDevice->VfPciBar[Index].Alignment, PciIoDevice->VfPciBar[Index].Length, PciIoDevice->VfPciBar[Index].Offset
));
}
DEBUG ((EFI_D_INFO, "\n"));
DEBUG ((DEBUG_INFO, "\n"));
}
/**
@@ -1903,7 +1903,7 @@ PciParseBar (
// Fix the length to support some special 64 bit BAR
//
if (Value == 0) {
DEBUG ((EFI_D_INFO, "[PciBus]BAR probing for upper 32bit of MEM64 BAR returns 0, change to 0xFFFFFFFF.\n"));
DEBUG ((DEBUG_INFO, "[PciBus]BAR probing for upper 32bit of MEM64 BAR returns 0, change to 0xFFFFFFFF.\n"));
Value = (UINT32) -1;
} else {
Value |= ((UINT32)(-1) << HighBitSet32 (Value));
@@ -2282,7 +2282,7 @@ CreatePciIoDevice (
&Data32
);
DEBUG ((
EFI_D_INFO,
DEBUG_INFO,
" ARI: forwarding enabled for PPB[%02x:%02x:%02x]\n",
Bridge->BusNumber,
Bridge->DeviceNumber,
@@ -2291,7 +2291,7 @@ CreatePciIoDevice (
}
}
DEBUG ((EFI_D_INFO, " ARI: CapOffset = 0x%x\n", PciIoDevice->AriCapabilityOffset));
DEBUG ((DEBUG_INFO, " ARI: CapOffset = 0x%x\n", PciIoDevice->AriCapabilityOffset));
}
}
@@ -2401,12 +2401,12 @@ CreatePciIoDevice (
PciIoDevice->ReservedBusNum = (UINT16)(EFI_PCI_BUS_OF_RID (LastVF) - Bus + 1);
DEBUG ((
EFI_D_INFO,
DEBUG_INFO,
" SR-IOV: SupportedPageSize = 0x%x; SystemPageSize = 0x%x; FirstVFOffset = 0x%x;\n",
SupportedPageSize, PciIoDevice->SystemPageSize >> 12, FirstVFOffset
));
DEBUG ((
EFI_D_INFO,
DEBUG_INFO,
" InitialVFs = 0x%x; ReservedBusNum = 0x%x; CapOffset = 0x%x\n",
PciIoDevice->InitialVFs, PciIoDevice->ReservedBusNum, PciIoDevice->SrIovCapabilityOffset
));
@@ -2421,7 +2421,7 @@ CreatePciIoDevice (
NULL
);
if (!EFI_ERROR (Status)) {
DEBUG ((EFI_D_INFO, " MR-IOV: CapOffset = 0x%x\n", PciIoDevice->MrIovCapabilityOffset));
DEBUG ((DEBUG_INFO, " MR-IOV: CapOffset = 0x%x\n", PciIoDevice->MrIovCapabilityOffset));
}
}
@@ -2869,4 +2869,3 @@ ResetAllPpbBusNumber (
}
}
}

36
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
View File

@@ -215,7 +215,7 @@ DumpBridgeResource (
if ((BridgeResource != NULL) && (BridgeResource->Length != 0)) {
DEBUG ((
EFI_D_INFO, "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n",
DEBUG_INFO, "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n",
mBarTypeStr[MIN (BridgeResource->ResType, PciBarTypeMaxType)],
BridgeResource->PciDev->PciBar[BridgeResource->Bar].BaseAddress,
BridgeResource->Length, BridgeResource->Alignment
@@ -228,7 +228,7 @@ DumpBridgeResource (
if (Resource->ResourceUsage == PciResUsageTypical) {
Bar = Resource->Virtual ? Resource->PciDev->VfPciBar : Resource->PciDev->PciBar;
DEBUG ((
EFI_D_INFO, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s [%02x|%02x|%02x:",
DEBUG_INFO, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s [%02x|%02x|%02x:",
Bar[Resource->Bar].BaseAddress, Resource->Length, Resource->Alignment,
IS_PCI_BRIDGE (&Resource->PciDev->Pci) ? L"PPB" :
IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci) ? L"P2C" :
@@ -244,20 +244,20 @@ DumpBridgeResource (
//
// The resource requirement comes from the device itself.
//
DEBUG ((EFI_D_INFO, "%02x]", Bar[Resource->Bar].Offset));
DEBUG ((DEBUG_INFO, "%02x]", Bar[Resource->Bar].Offset));
} else {
//
// The resource requirement comes from the subordinate devices.
//
DEBUG ((EFI_D_INFO, "**]"));
DEBUG ((DEBUG_INFO, "**]"));
}
} else {
DEBUG ((EFI_D_INFO, " Base = Padding;\tLength = 0x%lx;\tAlignment = 0x%lx", Resource->Length, Resource->Alignment));
DEBUG ((DEBUG_INFO, " Base = Padding;\tLength = 0x%lx;\tAlignment = 0x%lx", Resource->Length, Resource->Alignment));
}
if (BridgeResource->ResType != Resource->ResType) {
DEBUG ((EFI_D_INFO, "; Type = %s", mBarTypeStr[MIN (Resource->ResType, PciBarTypeMaxType)]));
DEBUG ((DEBUG_INFO, "; Type = %s", mBarTypeStr[MIN (Resource->ResType, PciBarTypeMaxType)]));
}
DEBUG ((EFI_D_INFO, "\n"));
DEBUG ((DEBUG_INFO, "\n"));
}
}
}
@@ -321,7 +321,7 @@ DumpResourceMap (
PCI_RESOURCE_NODE **ChildResources;
UINTN ChildResourceCount;
DEBUG ((EFI_D_INFO, "PciBus: Resource Map for "));
DEBUG ((DEBUG_INFO, "PciBus: Resource Map for "));
Status = gBS->OpenProtocol (
Bridge->Handle,
@@ -333,7 +333,7 @@ DumpResourceMap (
);
if (EFI_ERROR (Status)) {
DEBUG ((
EFI_D_INFO, "Bridge [%02x|%02x|%02x]\n",
DEBUG_INFO, "Bridge [%02x|%02x|%02x]\n",
Bridge->BusNumber, Bridge->DeviceNumber, Bridge->FunctionNumber
));
} else {
@@ -342,7 +342,7 @@ DumpResourceMap (
FALSE,
FALSE
);
DEBUG ((EFI_D_INFO, "Root Bridge %s\n", Str != NULL ? Str : L""));
DEBUG ((DEBUG_INFO, "Root Bridge %s\n", Str != NULL ? Str : L""));
if (Str != NULL) {
FreePool (Str);
}
@@ -351,7 +351,7 @@ DumpResourceMap (
for (Index = 0; Index < ResourceCount; Index++) {
DumpBridgeResource (Resources[Index]);
}
DEBUG ((EFI_D_INFO, "\n"));
DEBUG ((DEBUG_INFO, "\n"));
for ( Link = Bridge->ChildList.ForwardLink
; Link != &Bridge->ChildList
@@ -622,7 +622,7 @@ PciHostBridgeResourceAllocator (
// If SubmitResources returns error, PciBus isn't able to start.
// It's a fatal error so assertion is added.
//
DEBUG ((EFI_D_INFO, "PciBus: HostBridge->SubmitResources() - %r\n", Status));
DEBUG ((DEBUG_INFO, "PciBus: HostBridge->SubmitResources() - %r\n", Status));
ASSERT_EFI_ERROR (Status);
}
@@ -654,7 +654,7 @@ PciHostBridgeResourceAllocator (
// Notify platform to start to program the resource
//
Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeAllocateResources);
DEBUG ((EFI_D_INFO, "PciBus: HostBridge->NotifyPhase(AllocateResources) - %r\n", Status));
DEBUG ((DEBUG_INFO, "PciBus: HostBridge->NotifyPhase(AllocateResources) - %r\n", Status));
if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
//
// If Hot Plug is not supported
@@ -1340,9 +1340,9 @@ PciScanBus (
TempReservedBusNum = PciDevice->ReservedBusNum;
if (Func == 0) {
DEBUG ((EFI_D_INFO, "PCI-IOV ScanBus - SubBusNumber - 0x%x\n", *SubBusNumber));
DEBUG ((DEBUG_INFO, "PCI-IOV ScanBus - SubBusNumber - 0x%x\n", *SubBusNumber));
} else {
DEBUG ((EFI_D_INFO, "PCI-IOV ScanBus - SubBusNumber - 0x%x (Update)\n", *SubBusNumber));
DEBUG ((DEBUG_INFO, "PCI-IOV ScanBus - SubBusNumber - 0x%x (Update)\n", *SubBusNumber));
}
}
}
@@ -1522,7 +1522,7 @@ PciHostBridgeEnumerator (
return Status;
}
DEBUG((EFI_D_INFO, "PCI Bus First Scanning\n"));
DEBUG((DEBUG_INFO, "PCI Bus First Scanning\n"));
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
@@ -1601,7 +1601,7 @@ PciHostBridgeEnumerator (
Status = AllRootHPCInitialized (STALL_1_SECOND * 15);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "Some root HPC failed to initialize\n"));
DEBUG ((DEBUG_ERROR, "Some root HPC failed to initialize\n"));
return Status;
}
@@ -1614,7 +1614,7 @@ PciHostBridgeEnumerator (
return Status;
}
DEBUG((EFI_D_INFO, "PCI Bus Second Scanning\n"));
DEBUG((DEBUG_INFO, "PCI Bus Second Scanning\n"));
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {