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MdeModulePkg: Change use of EFI_D_* to DEBUG_*

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Michael D Kinney
2021-11-16 19:21:29 -08:00
committed by mergify[bot]
parent 917e98f3e5
commit 87000d7708
146 changed files with 1560 additions and 1619 deletions
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10
MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c
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@@ -38,7 +38,7 @@ UhciReadReg (
);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "UhciReadReg: PciIo Io.Read error: %r at offset %d\n", Status, Offset));
DEBUG ((DEBUG_ERROR, "UhciReadReg: PciIo Io.Read error: %r at offset %d\n", Status, Offset));
Data = 0xFFFF;
}
@@ -74,7 +74,7 @@ UhciWriteReg (
);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "UhciWriteReg: PciIo Io.Write error: %r at offset %d\n", Status, Offset));
DEBUG ((DEBUG_ERROR, "UhciWriteReg: PciIo Io.Write error: %r at offset %d\n", Status, Offset));
}
}
@@ -144,7 +144,7 @@ UhciAckAllInterrupt (
// is a temporary error status.
//
if (!UhciIsHcWorking (Uhc->PciIo)) {
DEBUG ((EFI_D_ERROR, "UhciAckAllInterrupt: re-enable the UHCI from system error\n"));
DEBUG ((DEBUG_ERROR, "UhciAckAllInterrupt: re-enable the UHCI from system error\n"));
Uhc->Usb2Hc.SetState (&Uhc->Usb2Hc, EfiUsbHcStateOperational);
}
}
@@ -208,7 +208,7 @@ UhciIsHcWorking (
UsbSts = UhciReadReg (PciIo, USBSTS_OFFSET);
if ((UsbSts & (USBSTS_HCPE | USBSTS_HSE | USBSTS_HCH)) != 0) {
DEBUG ((EFI_D_ERROR, "UhciIsHcWorking: current USB state is %x\n", UsbSts));
DEBUG ((DEBUG_ERROR, "UhciIsHcWorking: current USB state is %x\n", UsbSts));
return FALSE;
}
@@ -245,7 +245,7 @@ UhciSetFrameListBaseAddr (
);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "UhciSetFrameListBaseAddr: PciIo Io.Write error: %r\n", Status));
DEBUG ((DEBUG_ERROR, "UhciSetFrameListBaseAddr: PciIo Io.Write error: %r\n", Status));
}
}