MdePkg/BaseLib: Support IA32 processors without CLFLUSH
Use CPUID Leaf 01 to detect support for CLFLUSH instruction. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17212 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -1,7 +1,7 @@
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/** @file
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AsmFlushCacheLine function
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@@ -36,9 +36,23 @@ AsmFlushCacheLine (
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IN VOID *LinearAddress
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)
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{
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//
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// If the CPU does not support CLFLUSH instruction,
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// then promote flush range to flush entire cache.
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//
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_asm {
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mov eax, LinearAddress
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mov eax, 1
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cpuid
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test edx, BIT19
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jz NoClflush
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mov eax, [esp + 4]
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clflush [eax]
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jmp Done
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NoClflush:
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wbinvd
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Done:
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}
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return LinearAddress;
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}
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