MdeModulePkg/Bus/Ata: Fix various typos

Fix various typos in documentation, comments and debug strings.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Acked-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-12-philmd@redhat.com>
[lersek@redhat.com: replace EFI_D_xxx w/ DEBUG_xxx to shut up PatchCheck]
This commit is contained in:
Antoine Coeur
2020-02-07 02:07:24 +01:00
committed by mergify[bot]
parent 02d7b79771
commit 8c39253dff
13 changed files with 45 additions and 45 deletions

View File

@@ -219,7 +219,7 @@ AhciWaitMemSet (
do {
//
// Access sytem memory to see if the value is the tested one.
// Access system memory to see if the value is the tested one.
//
// The system memory pointed by Address will be updated by the
// SATA Host Controller, "volatile" is introduced to prevent
@@ -581,7 +581,7 @@ AhciBuildCommand (
}
/**
Buid a command FIS.
Build a command FIS.
@param CmdFis A pointer to the EFI_AHCI_COMMAND_FIS data structure.
@param AtaCommandBlock A pointer to the AhciBuildCommandFis data structure.
@@ -997,7 +997,7 @@ AhciDmaTransfer (
}
//
// Wait for command compelte
// Wait for command complete
//
FisBaseAddr = (UINTN)AhciRegisters->AhciRFis + Port * sizeof (EFI_AHCI_RECEIVED_FIS);
Offset = FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET;
@@ -1903,7 +1903,7 @@ AhciCreateTransferDescriptor (
PortImplementBitMap = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET);
//
// Get the highest bit of implemented ports which decides how many bytes are allocated for recived FIS.
// Get the highest bit of implemented ports which decides how many bytes are allocated for received FIS.
//
MaxPortNumber = (UINT8)(UINTN)(HighBitSet32(PortImplementBitMap) + 1);
if (MaxPortNumber == 0) {
@@ -1958,7 +1958,7 @@ AhciCreateTransferDescriptor (
//
// Allocate memory for command list
// Note that the implemenation is a single task model which only use a command list for all ports.
// Note that the implementation is a single task model which only use a command list for all ports.
//
Buffer = NULL;
MaxCommandListSize = MaxCommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST);
@@ -2713,7 +2713,7 @@ AhciModeInitialization (
} else {
continue;
}
DEBUG ((EFI_D_INFO, "port [%d] port mulitplier [%d] has a [%a]\n",
DEBUG ((DEBUG_INFO, "port [%d] port multitplier [%d] has a [%a]\n",
Port, 0, DeviceType == EfiIdeCdrom ? "cdrom" : "harddisk"));
//
@@ -2761,7 +2761,7 @@ AhciModeInitialization (
TransferMode.ModeNumber = (UINT8) (SupportedModes->PioMode.Mode);
//
// Set supported DMA mode on this IDE device. Note that UDMA & MDMA cann't
// Set supported DMA mode on this IDE device. Note that UDMA & MDMA can't
// be set together. Only one DMA mode can be set to a device. If setting
// DMA mode operation fails, we can continue moving on because we only use
// PIO mode at boot time. DMA modes are used by certain kind of OS booting

View File

@@ -263,7 +263,7 @@ typedef struct {
} EFI_AHCI_COMMAND_PRDT;
//
// Command table data strucute which is pointed to by the entry in the command list
// Command table data structure which is pointed to by the entry in the command list
//
typedef struct {
EFI_AHCI_COMMAND_FIS CommandFis; // A software constructed FIS.
@@ -283,7 +283,7 @@ typedef struct {
UINT8 AhciD2HRegisterFis[0x14]; // D2H Register Fis: offset 0x40
UINT8 AhciD2HRegisterFisRsvd[0x04];
UINT64 AhciSetDeviceBitsFis; // Set Device Bits Fix: offset 0x58
UINT8 AhciUnknownFis[0x40]; // Unkonwn Fis: offset 0x60
UINT8 AhciUnknownFis[0x40]; // Unknown Fis: offset 0x60
UINT8 AhciUnknownFisRsvd[0x60];
} EFI_AHCI_RECEIVED_FIS;

View File

@@ -1,5 +1,5 @@
/** @file
This file implements ATA_PASSTHRU_PROCTOCOL and EXT_SCSI_PASSTHRU_PROTOCOL interfaces
This file implements ATA_PASSTHRU_PROTOCOL and EXT_SCSI_PASSTHRU_PROTOCOL interfaces
for managed ATA controllers.
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
@@ -404,7 +404,7 @@ AsyncNonBlockingTransferRoutine (
Instance = (ATA_ATAPI_PASS_THRU_INSTANCE *) Context;
EntryHeader = &Instance->NonBlockingTaskList;
//
// Get the Taks from the Taks List and execute it, until there is
// Get the Tasks from the Tasks List and execute it, until there is
// no task in the list or the device is busy with task (EFI_NOT_READY).
//
while (TRUE) {
@@ -538,7 +538,7 @@ AtaAtapiPassThruSupported (
EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit;
//
// SATA Controller is a device driver, and should ingore the
// SATA Controller is a device driver, and should ignore the
// "RemainingDevicePath" according to UEFI spec
//
Status = gBS->OpenProtocol (
@@ -659,7 +659,7 @@ AtaAtapiPassThruSupported (
@retval EFI_SUCCESS The device was started.
@retval EFI_DEVICE_ERROR The device could not be started due to a device error.Currently not implemented.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval Others The driver failded to start the device.
@retval Others The driver failed to start the device.
**/
EFI_STATUS

View File

@@ -384,7 +384,7 @@ AtaAtapiPassThruSupported (
@retval EFI_SUCCESS The device was started.
@retval EFI_DEVICE_ERROR The device could not be started due to a device error.Currently not implemented.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval Others The driver failded to start the device.
@retval Others The driver failed to start the device.
**/
EFI_STATUS
@@ -521,7 +521,7 @@ EnumerateAttachedDevice (
);
/**
Call back funtion when the timer event is signaled.
Call back function when the timer event is signaled.
@param[in] Event The Event this notify function registered to.
@param[in] Context Pointer to the context data registered to the

View File

@@ -46,7 +46,7 @@ IdeReadPortB (
write a 1-byte data to a specific IDE port.
@param PciIo A pointer to EFI_PCI_IO_PROTOCOL data structure
@param Port The IDE port to be writen
@param Port The IDE port to be written
@param Data The data to write to the port
**/
VOID
@@ -76,7 +76,7 @@ IdeWritePortB (
write a 1-word data to a specific IDE port.
@param PciIo A pointer to EFI_PCI_IO_PROTOCOL data structure
@param Port The IDE port to be writen
@param Port The IDE port to be written
@param Data The data to write to the port
**/
VOID
@@ -106,7 +106,7 @@ IdeWritePortW (
write a 2-word data to a specific IDE port.
@param PciIo A pointer to EFI_PCI_IO_PROTOCOL data structure
@param Port The IDE port to be writen
@param Port The IDE port to be written
@param Data The data to write to the port
**/
VOID
@@ -718,12 +718,12 @@ WaitForBSYClear (
Table 2. BARs for Register Mapping
@param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
@param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
@param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
store the IDE i/o port registers' base addresses
@retval EFI_UNSUPPORTED Return this value when the BARs is not IO type
@retval EFI_SUCCESS Get the Base address successfully
@retval Other Read the pci configureation data error
@retval Other Read the pci configuration data error
**/
EFI_STATUS
@@ -983,7 +983,7 @@ AtaPioDataInOut (
Increment = 256;
//
// used to record bytes of currently transfered data
// used to record bytes of currently transferred data
//
WordCount = 0;
@@ -1688,7 +1688,7 @@ AtaPacketReadWrite (
RequiredWordCount = *ByteCount >> 1;
//
// No data transfer is premitted.
// No data transfer is permitted.
//
if (RequiredWordCount == 0) {
return EFI_SUCCESS;
@@ -2509,7 +2509,7 @@ DetectAndConfigIdeDevice (
}
//
// Set supported DMA mode on this IDE device. Note that UDMA & MDMA cann't
// Set supported DMA mode on this IDE device. Note that UDMA & MDMA can't
// be set together. Only one DMA mode can be set to a device. If setting
// DMA mode operation fails, we can continue moving on because we only use
// PIO mode at boot time. DMA modes are used by certain kind of OS booting

View File

@@ -158,7 +158,7 @@ typedef struct {
@retval EFI_UNSUPPORTED Return this value when the BARs is not IO type
@retval EFI_SUCCESS Get the Base address successfully
@retval Other Read the pci configureation data error
@retval Other Read the pci configuration data error
**/
EFI_STATUS