Print resource allocation/bar programming when PciBus driver does PCI BUS enumeration.
Signed-off-by: niruiyu Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12087 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
@ -1,7 +1,7 @@
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/** @file
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Internal library implementation for PCI Bus module.
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Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -14,6 +14,19 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#include "PciBus.h"
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GLOBAL_REMOVE_IF_UNREFERENCED
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CHAR16 *mBarTypeStr[] = {
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L"Unknow",
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L" Io16",
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L" Io32",
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L" Mem32",
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L"PMem32",
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L" Mem64",
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L"PMem64",
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L" Io",
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L" Mem",
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L"Unknow"
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};
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/**
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Retrieve the PCI Card device BAR information via PciIo interface.
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@ -153,6 +166,200 @@ RemoveRejectedPciDevices (
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}
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}
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/**
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Dump the resourc map of the bridge device.
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@param[in] BridgeResource Resource descriptor of the bridge device.
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**/
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VOID
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DumpBridgeResource (
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IN PCI_RESOURCE_NODE *BridgeResource
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)
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{
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LIST_ENTRY *Link;
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PCI_RESOURCE_NODE *Resource;
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PCI_BAR *Bar;
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if ((BridgeResource != NULL) && (BridgeResource->Length != 0)) {
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DEBUG ((
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EFI_D_INFO, "Type = %s; Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x\n",
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mBarTypeStr[MIN (BridgeResource->ResType, PciBarTypeMaxType)],
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BridgeResource->PciDev->PciBar[BridgeResource->Bar].BaseAddress,
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BridgeResource->Length, BridgeResource->Alignment
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));
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for ( Link = BridgeResource->ChildList.ForwardLink
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; Link != &BridgeResource->ChildList
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; Link = Link->ForwardLink
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) {
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Resource = RESOURCE_NODE_FROM_LINK (Link);
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if (Resource->ResourceUsage == PciResUsageTypical) {
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Bar = Resource->Virtual ? Resource->PciDev->VfPciBar : Resource->PciDev->PciBar;
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DEBUG ((
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EFI_D_INFO, " Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x;\tOwner = %s ",
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Bar[Resource->Bar].BaseAddress, Resource->Length, Resource->Alignment,
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IS_PCI_BRIDGE (&Resource->PciDev->Pci) ? L"PPB" :
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IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci) ? L"P2C" :
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L"PCI"
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));
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if ((!IS_PCI_BRIDGE (&Resource->PciDev->Pci) && !IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci)) ||
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(IS_PCI_BRIDGE (&Resource->PciDev->Pci) && (Resource->Bar < PPB_IO_RANGE)) ||
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(IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci) && (Resource->Bar < P2C_MEM_1))
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) {
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//
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// The resource requirement comes from the device itself.
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//
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DEBUG ((
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EFI_D_INFO, " [%02x|%02x|%02x:%02x]\n",
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Resource->PciDev->BusNumber, Resource->PciDev->DeviceNumber,
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Resource->PciDev->FunctionNumber, Bar[Resource->Bar].Offset
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));
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} else {
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//
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// The resource requirement comes from the subordinate devices.
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//
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DEBUG ((
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EFI_D_INFO, " [%02x|%02x|%02x:**]\n",
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Resource->PciDev->BusNumber, Resource->PciDev->DeviceNumber,
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Resource->PciDev->FunctionNumber
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));
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}
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} else {
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DEBUG ((EFI_D_INFO, " Padding:Length = 0x%x;\tAlignment = 0x%x\n", Resource->Length, Resource->Alignment));
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}
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}
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}
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}
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/**
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Find the corresponding resource node for the Device in child list of BridgeResource.
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@param[in] Device Pointer to PCI_IO_DEVICE.
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@param[in] BridgeResource Pointer to PCI_RESOURCE_NODE.
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@return !NULL The corresponding resource node for the Device.
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@return NULL No corresponding resource node for the Device.
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**/
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PCI_RESOURCE_NODE *
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FindResourceNode (
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IN PCI_IO_DEVICE *Device,
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IN PCI_RESOURCE_NODE *BridgeResource
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)
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{
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LIST_ENTRY *Link;
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PCI_RESOURCE_NODE *Resource;
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for ( Link = BridgeResource->ChildList.ForwardLink
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; Link != &BridgeResource->ChildList
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; Link = Link->ForwardLink
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) {
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Resource = RESOURCE_NODE_FROM_LINK (Link);
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if (Resource->PciDev == Device) {
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return Resource;
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}
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}
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return NULL;
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}
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/**
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Dump the resource map of all the devices under Bridge.
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@param[in] Bridge Bridge device instance.
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@param[in] IoNode IO resource descriptor for the bridge device.
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@param[in] Mem32Node Mem32 resource descriptor for the bridge device.
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@param[in] PMem32Node PMem32 resource descriptor for the bridge device.
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@param[in] Mem64Node Mem64 resource descriptor for the bridge device.
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@param[in] PMem64Node PMem64 resource descriptor for the bridge device.
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**/
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VOID
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DumpResourceMap (
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IN PCI_IO_DEVICE *Bridge,
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IN PCI_RESOURCE_NODE *IoNode,
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IN PCI_RESOURCE_NODE *Mem32Node,
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IN PCI_RESOURCE_NODE *PMem32Node,
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IN PCI_RESOURCE_NODE *Mem64Node,
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IN PCI_RESOURCE_NODE *PMem64Node
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)
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{
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EFI_STATUS Status;
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LIST_ENTRY *Link;
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PCI_IO_DEVICE *Device;
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PCI_RESOURCE_NODE *ChildIoNode;
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PCI_RESOURCE_NODE *ChildMem32Node;
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PCI_RESOURCE_NODE *ChildPMem32Node;
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PCI_RESOURCE_NODE *ChildMem64Node;
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PCI_RESOURCE_NODE *ChildPMem64Node;
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EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *ToText;
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CHAR16 *Str;
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DEBUG ((EFI_D_INFO, "PciBus: Resource Map for "));
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Status = gBS->OpenProtocol (
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Bridge->Handle,
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&gEfiPciRootBridgeIoProtocolGuid,
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NULL,
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NULL,
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NULL,
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EFI_OPEN_PROTOCOL_TEST_PROTOCOL
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((
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EFI_D_INFO, "Bridge [%02x|%02x|%02x]\n",
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Bridge->BusNumber, Bridge->DeviceNumber, Bridge->FunctionNumber
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));
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} else {
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Status = gBS->LocateProtocol (
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&gEfiDevicePathToTextProtocolGuid,
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NULL,
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(VOID **) &ToText
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);
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Str = NULL;
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if (!EFI_ERROR (Status)) {
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Str = ToText->ConvertDevicePathToText (
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DevicePathFromHandle (Bridge->Handle),
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FALSE,
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FALSE
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);
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}
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DEBUG ((EFI_D_INFO, "Root Bridge %s\n", Str != NULL ? Str : L""));
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if (Str != NULL) {
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FreePool (Str);
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}
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}
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DumpBridgeResource (IoNode);
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DumpBridgeResource (Mem32Node);
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DumpBridgeResource (PMem32Node);
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DumpBridgeResource (Mem64Node);
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DumpBridgeResource (PMem64Node);
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DEBUG ((EFI_D_INFO, "\n"));
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for ( Link = Bridge->ChildList.ForwardLink
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; Link != &Bridge->ChildList
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; Link = Link->ForwardLink
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) {
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Device = PCI_IO_DEVICE_FROM_LINK (Link);
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if (IS_PCI_BRIDGE (&Device->Pci)) {
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ChildIoNode = (IoNode == NULL ? NULL : FindResourceNode (Device, IoNode));
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ChildMem32Node = (Mem32Node == NULL ? NULL : FindResourceNode (Device, Mem32Node));
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ChildPMem32Node = (PMem32Node == NULL ? NULL : FindResourceNode (Device, PMem32Node));
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ChildMem64Node = (Mem64Node == NULL ? NULL : FindResourceNode (Device, Mem64Node));
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ChildPMem64Node = (PMem64Node == NULL ? NULL : FindResourceNode (Device, PMem64Node));
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DumpResourceMap (
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Device,
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ChildIoNode,
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ChildMem32Node,
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ChildPMem32Node,
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ChildMem64Node,
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ChildPMem64Node
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);
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}
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}
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}
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/**
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Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
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@ -244,7 +451,7 @@ PciHostBridgeResourceAllocator (
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RootBridgeDev,
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0,
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FeaturePcdGet (PcdPciBridgeIoAlignmentProbe) ? 0x1FF: 0xFFF,
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0,
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RB_IO_RANGE,
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PciBarTypeIo16,
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PciResUsageTypical
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);
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@ -253,7 +460,7 @@ PciHostBridgeResourceAllocator (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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RB_MEM32_RANGE,
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PciBarTypeMem32,
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PciResUsageTypical
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);
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@ -262,7 +469,7 @@ PciHostBridgeResourceAllocator (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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RB_PMEM32_RANGE,
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PciBarTypePMem32,
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PciResUsageTypical
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);
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@ -271,7 +478,7 @@ PciHostBridgeResourceAllocator (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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RB_MEM64_RANGE,
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PciBarTypeMem64,
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PciResUsageTypical
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);
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@ -280,7 +487,7 @@ PciHostBridgeResourceAllocator (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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RB_PMEM64_RANGE,
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PciBarTypePMem64,
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PciResUsageTypical
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);
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@ -597,19 +804,11 @@ PciHostBridgeResourceAllocator (
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// Create the entire system resource map from the information collected by
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// enumerator. Several resource tree was created
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//
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GetResourceMap (
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RootBridgeDev,
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&IoBridge,
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&Mem32Bridge,
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&PMem32Bridge,
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&Mem64Bridge,
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&PMem64Bridge,
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&IoPool,
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&Mem32Pool,
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&PMem32Pool,
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&Mem64Pool,
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&PMem64Pool
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);
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IoBridge = FindResourceNode (RootBridgeDev, &IoPool);
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Mem32Bridge = FindResourceNode (RootBridgeDev, &Mem32Pool);
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PMem32Bridge = FindResourceNode (RootBridgeDev, &PMem32Pool);
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Mem64Bridge = FindResourceNode (RootBridgeDev, &Mem64Pool);
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PMem64Bridge = FindResourceNode (RootBridgeDev, &PMem64Pool);
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//
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// Program IO resources
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@ -651,6 +850,26 @@ PciHostBridgeResourceAllocator (
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PMem64Bridge
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);
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IoBridge ->PciDev->PciBar[IoBridge ->Bar].BaseAddress = IoBase;
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Mem32Bridge ->PciDev->PciBar[Mem32Bridge ->Bar].BaseAddress = Mem32Base;
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PMem32Bridge->PciDev->PciBar[PMem32Bridge->Bar].BaseAddress = PMem32Base;
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Mem64Bridge ->PciDev->PciBar[Mem64Bridge ->Bar].BaseAddress = Mem64Base;
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PMem64Bridge->PciDev->PciBar[PMem64Bridge->Bar].BaseAddress = PMem64Base;
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//
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// Dump the resource map for current root bridge
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//
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DEBUG_CODE (
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DumpResourceMap (
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RootBridgeDev,
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IoBridge,
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Mem32Bridge,
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PMem32Bridge,
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Mem64Bridge,
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PMem64Bridge
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);
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);
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FreePool (AcpiConfig);
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}
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@ -741,8 +960,6 @@ PciScanBus (
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continue;
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}
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DEBUG((EFI_D_INFO, "Found DEV(%02d,%02d,%02d)\n", StartBusNumber, Device, Func ));
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//
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// Get the PCI device information
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//
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@ -930,7 +1147,6 @@ PciScanBus (
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EfiPciBeforeChildBusEnumeration
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);
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DEBUG((EFI_D_INFO, "Scan PPB(%02d,%02d,%02d)\n", PciDevice->BusNumber, PciDevice->DeviceNumber,PciDevice->FunctionNumber));
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Status = PciScanBus (
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PciDevice,
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(UINT8) (SecondBus),
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