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Code scrub for PCI Bus module and PciIncompatibleDeviceSupportLib module.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8662 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff
2009-06-25 13:47:45 +00:00
parent 745ed9b412
commit 8e8227d1a3
33 changed files with 3495 additions and 4074 deletions
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3
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
View File

@ -1,6 +1,7 @@
/** @file
EFI Component Name functions implementation for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at

3
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
View File

@ -1,6 +1,7 @@
/** @file
EFI Component Name functions declaration for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at

12
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.c
View File

@ -1,6 +1,13 @@
/** @file
Driver Binding functions for PCI Bus module.
Single PCI bus driver instance will manager all PCI Root Bridges in one EFI based firmware,
since all PCI Root Bridges' resources need to be managed together.
Supported() function will try to get PCI Root Bridge IO Protocol.
Start() function will get PCI Host Bridge Resource Allocation Protocol to manage all
PCI Root Bridges. So it means platform needs install PCI Root Bridge IO protocol for each
PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -51,7 +58,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_PCI_HOTPLUG_REQUEST_PROTOCOL mPciHotPlugReques
@param[in] SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The entry point is executed successfully.
@retval other Some error occurs when executing this entry point.
@retval other Some error occurred when executing this entry point.
**/
EFI_STATUS
@ -159,6 +166,9 @@ PciBusDriverBindingSupported (
Controller
);
//
// Check if Pci Root Bridge IO protocol is installed by platform
//
Status = gBS->OpenProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,

20
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h
View File

@ -99,6 +99,26 @@ struct _PCI_BAR {
UINT8 Offset;
};
//
// defined in PCI Card Specification, 8.0
//
#define PCI_CARD_MEMORY_BASE_0 0x1C
#define PCI_CARD_MEMORY_LIMIT_0 0x20
#define PCI_CARD_MEMORY_BASE_1 0x24
#define PCI_CARD_MEMORY_LIMIT_1 0x28
#define PCI_CARD_IO_BASE_0_LOWER 0x2C
#define PCI_CARD_IO_BASE_0_UPPER 0x2E
#define PCI_CARD_IO_LIMIT_0_LOWER 0x30
#define PCI_CARD_IO_LIMIT_0_UPPER 0x32
#define PCI_CARD_IO_BASE_1_LOWER 0x34
#define PCI_CARD_IO_BASE_1_UPPER 0x36
#define PCI_CARD_IO_LIMIT_1_LOWER 0x38
#define PCI_CARD_IO_LIMIT_1_UPPER 0x3A
#define PCI_CARD_BRIDGE_CONTROL 0x3E
#define PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE BIT8
#define PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE BIT9
#define PPB_BAR_0 0
#define PPB_BAR_1 1
#define PPB_IO_RANGE 2

10
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
View File

@ -90,7 +90,7 @@
gEfiPciHotPlugRequestProtocolGuid ## BY_START
gEfiPciIoProtocolGuid ## BY_START
gEfiDevicePathProtocolGuid ## BY_START
gEfiBusSpecificDriverOverrideProtocolGuid ## CONSUMED
gEfiBusSpecificDriverOverrideProtocolGuid ## BY_START
gEfiLoadedImageProtocolGuid ## CONSUMED
gEfiDecompressProtocolGuid ## CONSUMED
gEfiPciHotPlugInitProtocolGuid ## CONSUMED
@ -106,4 +106,10 @@
[Pcd.common]
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciIncompatibleDeviceSupportMask
# [Event]
# ##
# # Notify event set by CreateEventForHpc () for PCI Hot Plug controller.
# #
# EVT_NOTIFY_SIGNAL ## PRODUCES
#
#

42
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
View File

@ -1,8 +1,7 @@
/** @file
This module implement Pci register operation interface for
Pci device.
PCI command register operations supporting functions implementation for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -13,19 +12,19 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
/**
Operate the PCI register via PciIo function interface.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE
@param Command Operator command
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@param Command Operator command.
@param Offset The address within the PCI configuration space for the PCI controller.
@param Operation Type of Operation
@param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER
@param Operation Type of Operation.
@param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.
@return Status of PciIo operation.
@return status of PciIo operation
**/
EFI_STATUS
PciOperateRegister (
@ -76,19 +75,19 @@ PciOperateRegister (
}
/**
check the cpability of this device supports
Check the cpability supporting by given device.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@retval TRUE Cpability supportted.
@retval FALSE Cpability not supportted.
@retval TRUE Support
@retval FALSE Not support.
**/
BOOLEAN
PciCapabilitySupport (
IN PCI_IO_DEVICE *PciIoDevice
)
{
if ((PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) != 0) {
return TRUE;
}
@ -97,16 +96,17 @@ PciCapabilitySupport (
}
/**
Locate cap reg.
Locate capability register block per capability ID.
@param PciIoDevice - A pointer to the PCI_IO_DEVICE.
@param CapId - The cap ID.
@param Offset - A pointer to the offset.
@param NextRegBlock - A pointer to the next block.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param CapId The capability ID.
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
@retval EFI_UNSUPPORTED Pci device does not support
@retval EFI_SUCCESS Successfuly located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
@retval EFI_SUCCESS Success to locate capability register block
**/
EFI_STATUS
LocateCapabilityRegBlock (

36
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
View File

@ -1,4 +1,5 @@
/** @file
PCI command register operations supporting functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -64,13 +65,14 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
/**
Operate the PCI register via PciIo function interface.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE
@param Command Operator command
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@param Command Operator command.
@param Offset The address within the PCI configuration space for the PCI controller.
@param Operation Type of Operation
@param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER
@param Operation Type of Operation.
@param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.
@return Status of PciIo operation.
@return status of PciIo operation
**/
EFI_STATUS
PciOperateRegister (
@ -82,12 +84,13 @@ PciOperateRegister (
);
/**
check the cpability of this device supports
Check the cpability supporting by given device.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@retval TRUE Cpability supportted.
@retval FALSE Cpability not supportted.
@retval TRUE Support
@retval FALSE Not support.
**/
BOOLEAN
PciCapabilitySupport (
@ -95,16 +98,17 @@ PciCapabilitySupport (
);
/**
Locate cap reg.
Locate capability register block per capability ID.
@param PciIoDevice - A pointer to the PCI_IO_DEVICE.
@param CapId - The cap ID.
@param Offset - A pointer to the offset.
@param NextRegBlock - A pointer to the next block.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param CapId The capability ID.
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
@retval EFI_UNSUPPORTED Pci device does not support
@retval EFI_SUCCESS Successfuly located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
@retval EFI_SUCCESS Success to locate capability register block
**/
EFI_STATUS
LocateCapabilityRegBlock (

21
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
View File

@ -198,7 +198,7 @@ DestroyRootBridgeByHandle (
@param Handle A pointer to hold the returned EFI handle for the PCI IO device.
@retval EFI_SUCCESS The PCI device is successfully registered.
@retval Others An error occurred when registering the PCI device.
@retval other An error occurred when registering the PCI device.
**/
EFI_STATUS
@ -437,7 +437,7 @@ RemoveAllPciDeviceOnBridge (
@param Handle PCI device handle.
@retval EFI_SUCCESS The PCI device is successfully de-registered.
@retval Others An error occurred when de-registering the PCI device.
@retval other An error occurred when de-registering the PCI device.
**/
EFI_STATUS
@ -503,7 +503,8 @@ DeRegisterPciDevice (
);
//
// Un-install the device path protocol and pci io protocol
// Un-install the Device Path protocol and PCI I/O protocol
// and Bus Specific Driver Override protocol if needed.
//
if (PciIoDevice->BusOverride) {
Status = gBS->UninstallMultipleProtocolInterfaces (
@ -595,8 +596,8 @@ DeRegisterPciDevice (
@retval EFI_NOT_READY Device is not allocated.
@retval EFI_UNSUPPORTED Device only support PCI-PCI bridge.
@retval EFI_NOT_FOUND Can not find the specific device
@retval EFI_SUCCESS Success to start Pci device on bridge
@retval EFI_NOT_FOUND Can not find the specific device.
@retval EFI_SUCCESS Success to start Pci device on bridge.
**/
EFI_STATUS
@ -757,13 +758,16 @@ StartPciDevicesOnBridge (
@param Controller The root bridge handle.
@retval EFI_NOT_READY Device is not allocated.
@retval EFI_SUCCESS Success to start Pci device on host bridge.
**/
EFI_STATUS
StartPciDevices (
IN EFI_HANDLE Controller
)
{
EFI_STATUS Status;
PCI_IO_DEVICE *RootBridge;
EFI_HANDLE ThisHostBridge;
LIST_ENTRY *CurrentLink;
@ -781,13 +785,16 @@ StartPciDevices (
// Locate the right root bridge to start
//
if (RootBridge->PciRootBridgeIo->ParentHandle == ThisHostBridge) {
StartPciDevicesOnBridge (
Status = StartPciDevicesOnBridge (
RootBridge->Handle,
RootBridge,
NULL,
NULL,
NULL
);
if (EFI_ERROR (Status)) {
return Status;
}
}
CurrentLink = CurrentLink->ForwardLink;

15
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
View File

@ -102,7 +102,7 @@ DestroyRootBridgeByHandle (
@param Handle A pointer to hold the returned EFI handle for the PCI IO device.
@retval EFI_SUCCESS The PCI device is successfully registered.
@retval Others An error occurred when registering the PCI device.
@retval other An error occurred when registering the PCI device.
**/
EFI_STATUS
@ -136,7 +136,7 @@ RemoveAllPciDeviceOnBridge (
@param Handle PCI device handle.
@retval EFI_SUCCESS The PCI device is successfully de-registered.
@retval Others An error occurred when de-registering the PCI device.
@retval other An error occurred when de-registering the PCI device.
**/
EFI_STATUS
@ -148,7 +148,7 @@ DeRegisterPciDevice (
/**
Start to manage the PCI device on specified the root bridge or PCI-PCI Bridge
@param Controller An efi handle.
@param Controller The root bridge handle.
@param RootBridge A pointer to the PCI_IO_DEVICE.
@param RemainingDevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL.
@param NumberOfChildren Children number.
@ -156,8 +156,8 @@ DeRegisterPciDevice (
@retval EFI_NOT_READY Device is not allocated.
@retval EFI_UNSUPPORTED Device only support PCI-PCI bridge.
@retval EFI_NOT_FOUND Can not find the specific device
@retval EFI_SUCCESS Success to start Pci device on bridge
@retval EFI_NOT_FOUND Can not find the specific device.
@retval EFI_SUCCESS Success to start Pci device on bridge.
**/
EFI_STATUS
@ -173,7 +173,10 @@ StartPciDevicesOnBridge (
Start to manage all the PCI devices it found previously under
the entire host bridge.
@param Controller - root bridge handle.
@param Controller The root bridge handle.
@retval EFI_NOT_READY Device is not allocated.
@retval EFI_SUCCESS Success to start Pci device on host bridge.
**/
EFI_STATUS

47
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
View File

@ -1,6 +1,7 @@
/** @file
Functions implementation for Bus Specific Driver Override protoocl.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -11,31 +12,38 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
/**
Initializes a PCI Driver Override Instance.
@param PciIoDevice Device instance.
@param PciIoDevice PCI Device instance.
**/
VOID
InitializePciDriverOverrideInstance (
PCI_IO_DEVICE *PciIoDevice
IN OUT PCI_IO_DEVICE *PciIoDevice
)
{
PciIoDevice->PciDriverOverride.GetDriver = GetDriver;
}
/**
Get a overriding driver image.
@param This Pointer to instance of EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL.
@param DriverImageHandle Override driver image.
@retval EFI_SUCCESS Success to get driver image handle.
@retval EFI_NOT_FOUND can not find override driver image.
@retval EFI_INVALID_PARAMETER Invalid parameter.
/**
Uses a bus specific algorithm to retrieve a driver image handle for a controller.
@param This A pointer to the EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL instance.
@param DriverImageHandle On input, a pointer to the previous driver image handle returned
by GetDriver(). On output, a pointer to the next driver
image handle. Passing in a NULL, will return the first driver
image handle.
@retval EFI_SUCCESS A bus specific override driver is returned in DriverImageHandle.
@retval EFI_NOT_FOUND The end of the list of override drivers was reached.
A bus specific override driver is not returned in DriverImageHandle.
@retval EFI_INVALID_PARAMETER DriverImageHandle is not a handle that was returned on a
previous call to GetDriver().
**/
EFI_STATUS
EFIAPI
@ -84,13 +92,15 @@ GetDriver (
}
/**
Add an overriding driver image
Add an overriding driver image.
@param PciIoDevice Instance of PciIo device.
@param DriverImageHandle new added driver image.
@retval EFI_OUT_OF_RESOURCES no memory resource for new driver instance.
@retval EFI_SUCCESS Success add driver.
@retval EFI_SUCCESS Successfully added driver.
@retval EFI_OUT_OF_RESOURCES No memory resource for new driver instance.
@retval other Some error occurred when locating gEfiLoadedImageProtocolGuid.
**/
EFI_STATUS
AddDriver (
@ -126,14 +136,7 @@ AddDriver (
//
// Get information about the image
//
Status = PeCoffLoaderGetImageInfo (&ImageContext);
if (EFI_ERROR (Status)) {
return EFI_SUCCESS;
}
if (ImageContext.Machine != EFI_IMAGE_MACHINE_EBC) {
return EFI_SUCCESS;
}
PeCoffLoaderGetImageInfo (&ImageContext);
return EFI_SUCCESS;
}

35
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
View File

@ -1,6 +1,7 @@
/** @file
Functions declaration for Bus Specific Driver Override protoocl.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -17,6 +18,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define DRIVER_OVERRIDE_SIGNATURE SIGNATURE_32 ('d', 'r', 'o', 'v')
//
// PCI driver override driver image list
//
typedef struct {
UINT32 Signature;
LIST_ENTRY Link;
@ -30,12 +34,12 @@ typedef struct {
/**
Initializes a PCI Driver Override Instance.
@param PciIoDevice Device instance.
@param PciIoDevice PCI Device instance.
**/
VOID
InitializePciDriverOverrideInstance (
PCI_IO_DEVICE *PciIoDevice
IN OUT PCI_IO_DEVICE *PciIoDevice
);
/**
@ -44,8 +48,10 @@ InitializePciDriverOverrideInstance (
@param PciIoDevice Instance of PciIo device.
@param DriverImageHandle new added driver image.
@retval EFI_OUT_OF_RESOURCES no memory resource for new driver instance.
@retval EFI_SUCCESS Success add driver.
@retval EFI_SUCCESS Successfully added driver.
@retval EFI_OUT_OF_RESOURCES No memory resource for new driver instance.
@retval other Some error occurred when locating gEfiLoadedImageProtocolGuid.
**/
EFI_STATUS
AddDriver (
@ -55,13 +61,20 @@ AddDriver (
/**
Get a overriding driver image.
@param This Pointer to instance of EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL.
@param DriverImageHandle Override driver image.
Uses a bus specific algorithm to retrieve a driver image handle for a controller.
@param This A pointer to the EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL instance.
@param DriverImageHandle On input, a pointer to the previous driver image handle returned
by GetDriver(). On output, a pointer to the next driver
image handle. Passing in a NULL, will return the first driver
image handle.
@retval EFI_SUCCESS A bus specific override driver is returned in DriverImageHandle.
@retval EFI_NOT_FOUND The end of the list of override drivers was reached.
A bus specific override driver is not returned in DriverImageHandle.
@retval EFI_INVALID_PARAMETER DriverImageHandle is not a handle that was returned on a
previous call to GetDriver().
@retval EFI_SUCCESS Success to get driver image handle.
@retval EFI_NOT_FOUND can not find override driver image.
@retval EFI_INVALID_PARAMETER Invalid parameter.
**/
EFI_STATUS
EFIAPI

228
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
View File

@ -1,4 +1,5 @@
/** @file
PCI eunmeration implementation on entire PCI bus system for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -11,10 +12,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
#include "PciEnumerator.h"
#include "PciOptionRomSupport.h"
/**
This routine is used to enumerate entire pci bus system
@ -22,7 +20,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@param Controller Parent controller handle.
@return Status of enumerating.
@retval EFI_SUCCESS PCI enumeration finished successfully.
@retval other Some error occurred when enumerating the pci bus system.
**/
EFI_STATUS
PciEnumerator (
@ -125,13 +125,13 @@ PciEnumerator (
}
/**
Enumerate PCI root bridge
Enumerate PCI root bridge.
@param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@param RootBridgeDev Instance of root bridge device.
@retval EFI_SUCCESS Success to enumerate root bridge.
@retval Others Fail to enumerate root bridge.
@retval EFI_SUCCESS Successfully enumerated root bridge.
@retval other Failed to enumerate root bridge.
**/
EFI_STATUS
@ -233,15 +233,15 @@ PciRootBridgeEnumerator (
}
/**
This routine is used to process option rom on a certain root bridge
This routine is used to process all PCI devices' Option Rom
on a certain root bridge.
@param Bridge Given parent's root bridge
@param RomBase Base address of ROM driver loaded from
@param MaxLength Max rom size
@param Bridge Given parent's root bridge.
@param RomBase Base address of ROM driver loaded from.
@param MaxLength Maximum rom size.
@retval EFI_SUCCESS Success to process option rom image.
**/
EFI_STATUS
VOID
ProcessOptionRom (
IN PCI_IO_DEVICE *Bridge,
IN UINT64 RomBase,
@ -275,8 +275,6 @@ ProcessOptionRom (
CurrentLink = CurrentLink->ForwardLink;
}
return EFI_SUCCESS;
}
/**
@ -284,9 +282,11 @@ ProcessOptionRom (
@param Bridge Parent root bridge instance.
@param StartBusNumber Number of beginning.
@param SubBusNumber the number of sub bus.
@param SubBusNumber The number of sub bus.
@retval EFI_SUCCESS Successfully assigned bus number.
@retval EFI_DEVICE_ERROR Failed to assign bus number.
@retval EFI_SUCCESS Success to assign bus number.
**/
EFI_STATUS
PciAssignBusNumber (
@ -321,7 +321,6 @@ PciAssignBusNumber (
//
// Check to see whether a pci device is present
//
Status = PciDevicePresent (
PciRootBridgeIo,
&Pci,
@ -392,7 +391,6 @@ PciAssignBusNumber (
//
// Set the current maximum bus number under the PPB
//
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
Status = PciRootBridgeIoWrite (
@ -411,7 +409,6 @@ PciAssignBusNumber (
//
// Skip sub functions, this is not a multi function device
//
Func = PCI_MAX_FUNC;
}
}
@ -427,8 +424,9 @@ PciAssignBusNumber (
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param RootBridgeDev Root bridge instance
@retval EFI_SUCCESS Success to get root bridge's attribute
@retval Others Fail to get attribute
@retval EFI_SUCCESS Successfully got root bridge's attribute.
@retval other Failed to get attribute.
**/
EFI_STATUS
DetermineRootBridgeAttributes (
@ -460,7 +458,6 @@ DetermineRootBridgeAttributes (
// Here is the point where PCI bus driver calls HOST bridge allocation protocol
// Currently we hardcoded for ea815
//
if ((Attributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0) {
RootBridgeDev->Decodes |= EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED;
}
@ -477,10 +474,12 @@ DetermineRootBridgeAttributes (
}
/**
Get Max Option Rom size on this bridge
Get Max Option Rom size on specified bridge.
@param Bridge Given bridge device instance.
@return Max size of option rom needed.
@param Bridge Bridge device instance.
@return Max size of option rom.
**/
UINT64
GetMaxOptionRomSize (
@ -541,9 +540,10 @@ GetMaxOptionRomSize (
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_SUCCESS Successfully process attribute.
@retval EFI_NOT_FOUND Can not find the specific root bridge device.
@retval EFI_SUCCESS Success Process attribute.
@retval Others Can not determine the root bridge device's attribute.
@retval other Failed to determine the root bridge device's attribute.
**/
EFI_STATUS
PciHostBridgeDeviceAttribute (
@ -581,18 +581,17 @@ PciHostBridgeDeviceAttribute (
}
/**
Get resource allocation status from the ACPI pointer
Get resource allocation status from the ACPI resource descriptor.
@param AcpiConfig Point to Acpi configuration table
@param IoResStatus Return the status of I/O resource
@param Mem32ResStatus Return the status of 32-bit Memory resource
@param PMem32ResStatus Return the status of 32-bit PMemory resource
@param Mem64ResStatus Return the status of 64-bit Memory resource
@param PMem64ResStatus Return the status of 64-bit PMemory resource
@param AcpiConfig Point to Acpi configuration table.
@param IoResStatus Return the status of I/O resource.
@param Mem32ResStatus Return the status of 32-bit Memory resource.
@param PMem32ResStatus Return the status of 32-bit Prefetchable Memory resource.
@param Mem64ResStatus Return the status of 64-bit Memory resource.
@param PMem64ResStatus Return the status of 64-bit Prefetchable Memory resource.
@retval EFI_SUCCESS Success to get resource allocation status from ACPI configuration table.
**/
EFI_STATUS
VOID
GetResourceAllocationStatus (
VOID *AcpiConfig,
OUT UINT64 *IoResStatus,
@ -602,7 +601,6 @@ GetResourceAllocationStatus (
OUT UINT64 *PMem64ResStatus
)
{
UINT8 *Temp;
UINT64 ResStatus;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ACPIAddressDesc;
@ -659,17 +657,16 @@ GetResourceAllocationStatus (
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
}
return EFI_SUCCESS;
}
/**
Remove a PCI device from device pool and mark its bar
Remove a PCI device from device pool and mark its bar.
@param PciDevice Instance of Pci device.
@retval EFI_SUCCESS Success Operation.
@retval EFI_ABORTED Pci device is a root bridge.
@retval EFI_SUCCESS Successfully remove the PCI device.
@retval EFI_ABORTED Pci device is a root bridge or a PCI-PCI bridge.
**/
EFI_STATUS
RejectPciDevice (
@ -739,7 +736,9 @@ RejectPciDevice (
@param PciResNode Pointer to Pci resource node instance.
@return whethter a PCI device can be rejected.
@retval TRUE The PCI device can be rejected.
@retval TRUE The PCI device cannot be rejected.
**/
BOOLEAN
IsRejectiveDevice (
@ -782,12 +781,13 @@ IsRejectiveDevice (
}
/**
Compare two resource node and get the larger resource consumer
Compare two resource nodes and get the larger resource consumer.
@param PciResNode1 resource node 1 want to be compared
@param PciResNode2 resource node 2 want to be compared
@return Larger resource consumer.
@return Larger resource node.
**/
PCI_RESOURCE_NODE *
GetLargerConsumerDevice (
@ -814,7 +814,6 @@ GetLargerConsumerDevice (
}
return PciResNode2;
}
@ -823,7 +822,8 @@ GetLargerConsumerDevice (
@param ResPool Pointer to resource pool node.
@return the max resource consumer in the host resource pool.
@return The max resource consumer in the host resource pool.
**/
PCI_RESOURCE_NODE *
GetMaxResourceConsumerDevice (
@ -867,14 +867,18 @@ GetMaxResourceConsumerDevice (
@param IoPool Pointer to instance of I/O resource Node.
@param Mem32Pool Pointer to instance of 32-bit memory resource Node.
@param PMem32Pool Pointer to instance of 32-bit Pmemory resource node.
@param PMem32Pool Pointer to instance of 32-bit Prefetchable memory resource node.
@param Mem64Pool Pointer to instance of 64-bit memory resource node.
@param PMem64Pool Pointer to instance of 64-bit Pmemory resource node.
@param PMem64Pool Pointer to instance of 64-bit Prefetchable memory resource node.
@param IoResStatus Status of I/O resource Node.
@param Mem32ResStatus Status of 32-bit memory resource Node.
@param PMem32ResStatus Status of 32-bit Pmemory resource node.
@param PMem32ResStatus Status of 32-bit Prefetchable memory resource node.
@param Mem64ResStatus Status of 64-bit memory resource node.
@param PMem64ResStatus Status of 64-bit Pmemory resource node.
@param PMem64ResStatus Status of 64-bit Prefetchable memory resource node.
@retval EFI_SUCCESS Successfully adjusted resoruce on host bridge.
@retval EFI_ABORTED Host bridge hasn't this resource type or no resource be adjusted.
**/
EFI_STATUS
PciHostBridgeAdjustAllocation (
@ -1006,6 +1010,10 @@ PciHostBridgeAdjustAllocation (
@param Mem64Node Pointer to instance of 64-bit memory resource node
@param PMem64Node Pointer to instance of 64-bit Pmemory resource node
@param Config Output buffer holding new constructed APCI resource requestor
@retval EFI_SUCCESS Successfully constructed ACPI resource.
@retval EFI_OUT_OF_RESOURCES No memory availabe.
**/
EFI_STATUS
ConstructAcpiResourceRequestor (
@ -1236,17 +1244,15 @@ ConstructAcpiResourceRequestor (
/**
Get resource base from an acpi configuration descriptor.
@param Config an acpi configuration descriptor.
@param IoBase output of I/O resource base address.
@param Mem32Base output of 32-bit memory base address.
@param PMem32Base output of 32-bit pmemory base address.
@param Mem64Base output of 64-bit memory base address.
@param PMem64Base output of 64-bit pmemory base address.
@return EFI_SUCCESS Get resource base address successfully.
@param Config An acpi configuration descriptor.
@param IoBase Output of I/O resource base address.
@param Mem32Base Output of 32-bit memory base address.
@param PMem32Base Output of 32-bit prefetchable memory base address.
@param Mem64Base Output of 64-bit memory base address.
@param PMem64Base Output of 64-bit prefetchable memory base address.
**/
EFI_STATUS
VOID
GetResourceBase (
IN VOID *Config,
OUT UINT64 *IoBase,
@ -1325,18 +1331,17 @@ GetResourceBase (
//
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
}
return EFI_SUCCESS;
}
/**
Enumerate pci bridge, allocate resource and determine attribute
for devices on this bridge
for devices on this bridge.
@param BridgeDev Pointer to instance of bridge device.
@retval EFI_SUCCESS Success operation.
@retval Others Fail to enumerate.
@retval EFI_SUCCESS Successfully enumerated PCI bridge.
@retval other Failed to enumerate.
**/
EFI_STATUS
PciBridgeEnumerator (
@ -1390,12 +1395,13 @@ PciBridgeEnumerator (
}
/**
Allocate all kinds of resource for bridge
Allocate all kinds of resource for PCI bridge.
@param Bridge Pointer to bridge instance.
@retval EFI_SUCCESS Success operation.
@retval Others Fail to allocate resource for bridge.
@retval EFI_SUCCESS Successfully allocated resource for PCI bridge.
@retval other Failed to allocate resource for bridge.
**/
EFI_STATUS
PciBridgeResourceAllocator (
@ -1462,7 +1468,7 @@ PciBridgeResourceAllocator (
//
// Create resourcemap by going through all the devices subject to this root bridge
//
Status = CreateResourceMap (
CreateResourceMap (
Bridge,
IoBridge,
Mem32Bridge,
@ -1471,10 +1477,6 @@ PciBridgeResourceAllocator (
PMem64Bridge
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = GetResourceBaseFromBridge (
Bridge,
&IoBase,
@ -1544,16 +1546,18 @@ PciBridgeResourceAllocator (
}
/**
Get resource base address for a pci bridge device
Get resource base address for a pci bridge device.
@param Bridge Given Pci driver instance.
@param IoBase output for base address of I/O type resource.
@param Mem32Base output for base address of 32-bit memory type resource.
@param PMem32Base output for base address of 32-bit Pmemory type resource.
@param Mem64Base output for base address of 64-bit memory type resource.
@param PMem64Base output for base address of 64-bit Pmemory type resource.
@param IoBase Output for base address of I/O type resource.
@param Mem32Base Output for base address of 32-bit memory type resource.
@param PMem32Base Ooutput for base address of 32-bit Pmemory type resource.
@param Mem64Base Output for base address of 64-bit memory type resource.
@param PMem64Base Output for base address of 64-bit Pmemory type resource.
@retval EFI_SUCCESS Successfully got resource base address.
@retval EFI_OUT_OF_RESOURCES PCI bridge is not available.
@retval EFI_SUCCESS Succes to get resource base address.
**/
EFI_STATUS
GetResourceBaseFromBridge (
@ -1637,41 +1641,43 @@ GetResourceBaseFromBridge (
This member function can be used to notify the host bridge driver to perform specific actions,
including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
Eight notification points are defined at this time. See belows:
EfiPciHostBridgeBeginEnumeration - Resets the host bridge PCI apertures and internal data
EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
structures. The PCI enumerator should issue this notification
before starting a fresh enumeration process. Enumeration cannot
be restarted after sending any other notification such as
EfiPciHostBridgeBeginBusAllocation.
EfiPciHostBridgeBeginBusAllocation - The bus allocation phase is about to begin. No specific action is
EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
required here. This notification can be used to perform any
chipset-specific programming.
EfiPciHostBridgeEndBusAllocation - The bus allocation and bus programming phase is complete. No
EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
specific action is required here. This notification can be used to
perform any chipset-specific programming.
EfiPciHostBridgeBeginResourceAllocation - The resource allocation phase is about to begin. No specific
EfiPciHostBridgeBeginResourceAllocation
The resource allocation phase is about to begin. No specific
action is required here. This notification can be used to perform
any chipset-specific programming.
EfiPciHostBridgeAllocateResources - Allocates resources per previously submitted requests for all the PCI
EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
root bridges. These resource settings are returned on the next call to
GetProposedResources(). Before calling NotifyPhase() with a Phase of
EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible for gathering I/O and memory requests for
EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
for gathering I/O and memory requests for
all the PCI root bridges and submitting these requests using
SubmitResources(). This function pads the resource amount
to suit the root bridge hardware, takes care of dependencies between
the PCI root bridges, and calls the Global Coherency Domain (GCD)
with the allocation request. In the case of padding, the allocated range
could be bigger than what was requested.
EfiPciHostBridgeSetResources - Programs the host bridge hardware to decode previously allocated
EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
resources (proposed resources) for all the PCI root bridges. After the
hardware is programmed, reassigning resources will not be supported.
The bus settings are not affected.
EfiPciHostBridgeFreeResources - Deallocates resources that were previously allocated for all the PCI
EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
root bridges and resets the I/O and memory apertures to their initial
state. The bus settings are not affected. If the request to allocate
resources fails, the PCI enumerator can use this notification to
deallocate previous resources, adjust the requests, and retry
allocation.
EfiPciHostBridgeEndResourceAllocation- The resource allocation phase is completed. No specific action is
EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
required here. This notification can be used to perform any chipsetspecific
programming.
@ -1872,17 +1878,27 @@ PreprocessController (
}
/**
Hot plug request notify.
This function allows the PCI bus driver to be notified to act as requested when a hot-plug event has
happened on the hot-plug controller. Currently, the operations include add operation and remove operation..
@param This - A pointer to the hot plug request protocol.
@param Operation - The operation.
@param Controller - A pointer to the controller.
@param RemainingDevicePath - A pointer to the device path.
@param NumberOfChildren - A the number of child handle in the ChildHandleBuffer.
@param ChildHandleBuffer - A pointer to the array contain the child handle.
@param This A pointer to the hot plug request protocol.
@param Operation The operation the PCI bus driver is requested to make.
@param Controller The handle of the hot-plug controller.
@param RemainingDevicePath The remaining device path for the PCI-like hot-plug device.
@param NumberOfChildren The number of child handles.
For a add operation, it is an output parameter.
For a remove operation, it?<3F><>s an input parameter.
@param ChildHandleBuffer The buffer which contains the child handles.
@retval EFI_INVALID_PARAMETER Operation is not a legal value.
Controller is NULL or not a valid handle.
NumberOfChildren is NULL.
ChildHandleBuffer is NULL while Operation is add.
@retval EFI_OUT_OF_RESOURCES There are no enough resources to start the devices.
@retval EFI_NOT_FOUND Can not find bridge according to controller handle.
@retval EFI_SUCCESS Success operating.
@retval EFI_SUCCESS The handles for the specified device have been created or destroyed
as requested, and for an add operation, the new handles are
returned in ChildHandleBuffer.
**/
EFI_STATUS
EFIAPI
@ -1987,10 +2003,11 @@ PciHotPlugRequestNotify (
/**
Search hostbridge according to given handle
@param RootBridgeHandle - Host bridge handle.
@param RootBridgeHandle Host bridge handle.
@retval TRUE Found host bridge handle.
@retval FALSE Not found hot bridge handle.
@return TRUE Found.
@return FALSE Not found.
**/
BOOLEAN
SearchHostBridgeHandle (
@ -2029,9 +2046,14 @@ SearchHostBridgeHandle (
}
/**
Add host bridge handle to global variable for enumating.
Add host bridge handle to global variable for enumerating.
@param HostBridgeHandle Host bridge handle.
@retval EFI_SUCCESS Successfully added host bridge.
@retval EFI_ABORTED Host bridge is NULL, or given host bridge
has been in host bridge list.
@param HostBridgeHandle host bridge handle.
**/
EFI_STATUS
AddHostBridgeEnumerator (

231
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
View File

@ -1,7 +1,7 @@
/** @file
Header file declares all logic function for PCI bus enumeration.
PCI bus enumeration logic function declaration for PCI bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -12,7 +12,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_ENUMERATOR_H_
#define _EFI_PCI_ENUMERATOR_H_
@ -20,11 +19,13 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
/**
This routine is used to enumerate entire pci bus system
in a given platform
in a given platform.
@param Controller Parent controller handle.
@return Status of enumerating.
@retval EFI_SUCCESS PCI enumeration finished successfully.
@retval other Some error occurred when enumerating the pci bus system.
**/
EFI_STATUS
PciEnumerator (
@ -32,13 +33,13 @@ PciEnumerator (
);
/**
Enumerate PCI root bridge
Enumerate PCI root bridge.
@param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@param RootBridgeDev Instance of root bridge device.
@retval EFI_SUCCESS Success to enumerate root bridge.
@retval Others Fail to enumerate root bridge.
@retval EFI_SUCCESS Successfully enumerated root bridge.
@retval other Failed to enumerate root bridge.
**/
EFI_STATUS
@ -48,15 +49,15 @@ PciRootBridgeEnumerator (
);
/**
This routine is used to process option rom on a certain root bridge
This routine is used to process all PCI devices' Option Rom
on a certain root bridge.
@param Bridge Given parent's root bridge.
@param RomBase Base address of ROM driver loaded from.
@param MaxLength Max rom size.
@param MaxLength Maximum rom size.
@retval EFI_SUCCESS Success to process option rom image.
**/
EFI_STATUS
VOID
ProcessOptionRom (
IN PCI_IO_DEVICE *Bridge,
IN UINT64 RomBase,
@ -68,9 +69,11 @@ ProcessOptionRom (
@param Bridge Parent root bridge instance.
@param StartBusNumber Number of beginning.
@param SubBusNumber the number of sub bus.
@param SubBusNumber The number of sub bus.
@retval EFI_SUCCESS Successfully assigned bus number.
@retval EFI_DEVICE_ERROR Failed to assign bus number.
@retval EFI_SUCCESS Success to assign bus number.
**/
EFI_STATUS
PciAssignBusNumber (
@ -83,11 +86,12 @@ PciAssignBusNumber (
This routine is used to determine the root bridge attribute by interfacing
the host bridge resource allocation protocol.
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@param RootBridgeDev Root bridge instance.
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param RootBridgeDev Root bridge instance
@retval EFI_SUCCESS Successfully got root bridge's attribute.
@retval other Failed to get attribute.
@retval EFI_SUCCESS Success to get root bridge's attribute.
@retval Others Fail to get attribute.
**/
EFI_STATUS
DetermineRootBridgeAttributes (
@ -96,10 +100,12 @@ DetermineRootBridgeAttributes (
);
/**
Get Max Option Rom size on this bridge
Get Max Option Rom size on specified bridge.
@param Bridge Given bridge device instance.
@return Max size of option rom needed.
@param Bridge Bridge device instance.
@return Max size of option rom.
**/
UINT64
GetMaxOptionRomSize (
@ -109,11 +115,12 @@ GetMaxOptionRomSize (
/**
Process attributes of devices on this host bridge
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_SUCCESS Successfully process attribute.
@retval EFI_NOT_FOUND Can not find the specific root bridge device.
@retval EFI_SUCCESS Success Process attribute.
@retval Others Can not determine the root bridge device's attribute.
@retval other Failed to determine the root bridge device's attribute.
**/
EFI_STATUS
PciHostBridgeDeviceAttribute (
@ -121,18 +128,17 @@ PciHostBridgeDeviceAttribute (
);
/**
Get resource allocation status from the ACPI pointer
Get resource allocation status from the ACPI resource descriptor.
@param AcpiConfig Point to Acpi configuration table.
@param IoResStatus Return the status of I/O resource.
@param Mem32ResStatus Return the status of 32-bit Memory resource.
@param PMem32ResStatus Return the status of 32-bit PMemory resource.
@param PMem32ResStatus Return the status of 32-bit Prefetchable Memory resource.
@param Mem64ResStatus Return the status of 64-bit Memory resource.
@param PMem64ResStatus Return the status of 64-bit PMemory resource.
@param PMem64ResStatus Return the status of 64-bit Prefetchable Memory resource.
@retval EFI_SUCCESS Success to get resource allocation status from ACPI configuration table.
**/
EFI_STATUS
VOID
GetResourceAllocationStatus (
VOID *AcpiConfig,
OUT UINT64 *IoResStatus,
@ -143,12 +149,13 @@ GetResourceAllocationStatus (
);
/**
Remove a PCI device from device pool and mark its bar
Remove a PCI device from device pool and mark its bar.
@param PciDevice Instance of Pci device.
@retval EFI_SUCCESS Success Operation.
@retval EFI_ABORTED Pci device is a root bridge.
@retval EFI_SUCCESS Successfully remove the PCI device.
@retval EFI_ABORTED Pci device is a root bridge or a PCI-PCI bridge.
**/
EFI_STATUS
RejectPciDevice (
@ -156,11 +163,13 @@ RejectPciDevice (
);
/**
Determine whethter a PCI device can be rejected
Determine whethter a PCI device can be rejected.
@param PciResNode Pointer to Pci resource node instance.
@return whethter a PCI device can be rejected.
@retval TRUE The PCI device can be rejected.
@retval TRUE The PCI device cannot be rejected.
**/
BOOLEAN
IsRejectiveDevice (
@ -168,12 +177,13 @@ IsRejectiveDevice (
);
/**
Compare two resource node and get the larger resource consumer
Compare two resource nodes and get the larger resource consumer.
@param PciResNode1 resource node 1 want to be compared.
@param PciResNode2 resource node 2 want to be compared.
@param PciResNode1 resource node 1 want to be compared
@param PciResNode2 resource node 2 want to be compared
@return Larger resource node.
@return Larger resource consumer.
**/
PCI_RESOURCE_NODE *
GetLargerConsumerDevice (
@ -182,11 +192,12 @@ GetLargerConsumerDevice (
);
/**
Get the max resource consumer in the host resource pool
Get the max resource consumer in the host resource pool.
@param ResPool Pointer to resource pool node.
@return the max resource consumer in the host resource pool.
@return The max resource consumer in the host resource pool.
**/
PCI_RESOURCE_NODE *
GetMaxResourceConsumerDevice (
@ -198,14 +209,18 @@ GetMaxResourceConsumerDevice (
@param IoPool Pointer to instance of I/O resource Node.
@param Mem32Pool Pointer to instance of 32-bit memory resource Node.
@param PMem32Pool Pointer to instance of 32-bit Pmemory resource node.
@param PMem32Pool Pointer to instance of 32-bit Prefetchable memory resource node.
@param Mem64Pool Pointer to instance of 64-bit memory resource node.
@param PMem64Pool Pointer to instance of 64-bit Pmemory resource node.
@param PMem64Pool Pointer to instance of 64-bit Prefetchable memory resource node.
@param IoResStatus Status of I/O resource Node.
@param Mem32ResStatus Status of 32-bit memory resource Node.
@param PMem32ResStatus Status of 32-bit Pmemory resource node.
@param PMem32ResStatus Status of 32-bit Prefetchable memory resource node.
@param Mem64ResStatus Status of 64-bit memory resource node.
@param PMem64ResStatus Status of 64-bit Pmemory resource node.
@param PMem64ResStatus Status of 64-bit Prefetchable memory resource node.
@retval EFI_SUCCESS Successfully adjusted resoruce on host bridge.
@retval EFI_ABORTED Host bridge hasn't this resource type or no resource be adjusted.
**/
EFI_STATUS
PciHostBridgeAdjustAllocation (
@ -225,13 +240,17 @@ PciHostBridgeAdjustAllocation (
Summary requests for all resource type, and contruct ACPI resource
requestor instance.
@param Bridge detecting bridge.
@param IoNode Pointer to instance of I/O resource Node.
@param Mem32Node Pointer to instance of 32-bit memory resource Node.
@param PMem32Node Pointer to instance of 32-bit Pmemory resource node.
@param Mem64Node Pointer to instance of 64-bit memory resource node.
@param PMem64Node Pointer to instance of 64-bit Pmemory resource node.
@param Config Output buffer holding new constructed APCI resource requestor.
@param Bridge detecting bridge
@param IoNode Pointer to instance of I/O resource Node
@param Mem32Node Pointer to instance of 32-bit memory resource Node
@param PMem32Node Pointer to instance of 32-bit Pmemory resource node
@param Mem64Node Pointer to instance of 64-bit memory resource node
@param PMem64Node Pointer to instance of 64-bit Pmemory resource node
@param Config Output buffer holding new constructed APCI resource requestor
@retval EFI_SUCCESS Successfully constructed ACPI resource.
@retval EFI_OUT_OF_RESOURCES No memory availabe.
**/
EFI_STATUS
ConstructAcpiResourceRequestor (
@ -247,17 +266,15 @@ ConstructAcpiResourceRequestor (
/**
Get resource base from an acpi configuration descriptor.
@param Config an acpi configuration descriptor.
@param IoBase output of I/O resource base address.
@param Mem32Base output of 32-bit memory base address.
@param PMem32Base output of 32-bit pmemory base address.
@param Mem64Base output of 64-bit memory base address.
@param PMem64Base output of 64-bit pmemory base address.
@return EFI_SUCCESS Get resource base address successfully.
@param Config An acpi configuration descriptor.
@param IoBase Output of I/O resource base address.
@param Mem32Base Output of 32-bit memory base address.
@param PMem32Base Output of 32-bit prefetchable memory base address.
@param Mem64Base Output of 64-bit memory base address.
@param PMem64Base Output of 64-bit prefetchable memory base address.
**/
EFI_STATUS
VOID
GetResourceBase (
IN VOID *Config,
OUT UINT64 *IoBase,
@ -269,12 +286,13 @@ GetResourceBase (
/**
Enumerate pci bridge, allocate resource and determine attribute
for devices on this bridge
for devices on this bridge.
@param BridgeDev Pointer to instance of bridge device.
@retval EFI_SUCCESS Success operation.
@retval Others Fail to enumerate.
@retval EFI_SUCCESS Successfully enumerated PCI bridge.
@retval other Failed to enumerate.
**/
EFI_STATUS
PciBridgeEnumerator (
@ -282,12 +300,13 @@ PciBridgeEnumerator (
);
/**
Allocate all kinds of resource for bridge
Allocate all kinds of resource for PCI bridge.
@param Bridge Pointer to bridge instance.
@retval EFI_SUCCESS Success operation.
@retval Others Fail to allocate resource for bridge.
@retval EFI_SUCCESS Successfully allocated resource for PCI bridge.
@retval other Failed to allocate resource for bridge.
**/
EFI_STATUS
PciBridgeResourceAllocator (
@ -295,16 +314,18 @@ PciBridgeResourceAllocator (
);
/**
Get resource base address for a pci bridge device
Get resource base address for a pci bridge device.
@param Bridge Given Pci driver instance.
@param IoBase output for base address of I/O type resource.
@param Mem32Base output for base address of 32-bit memory type resource.
@param PMem32Base output for base address of 32-bit Pmemory type resource.
@param Mem64Base output for base address of 64-bit memory type resource.
@param PMem64Base output for base address of 64-bit Pmemory type resource.
@param IoBase Output for base address of I/O type resource.
@param Mem32Base Output for base address of 32-bit memory type resource.
@param PMem32Base Ooutput for base address of 32-bit Pmemory type resource.
@param Mem64Base Output for base address of 64-bit memory type resource.
@param PMem64Base Output for base address of 64-bit Pmemory type resource.
@retval EFI_SUCCESS Successfully got resource base address.
@retval EFI_OUT_OF_RESOURCES PCI bridge is not available.
@retval EFI_SUCCESS Succes to get resource base address.
**/
EFI_STATUS
GetResourceBaseFromBridge (
@ -336,41 +357,43 @@ PciHostBridgeP2CProcess (
This member function can be used to notify the host bridge driver to perform specific actions,
including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
Eight notification points are defined at this time. See belows:
EfiPciHostBridgeBeginEnumeration - Resets the host bridge PCI apertures and internal data
EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
structures. The PCI enumerator should issue this notification
before starting a fresh enumeration process. Enumeration cannot
be restarted after sending any other notification such as
EfiPciHostBridgeBeginBusAllocation.
EfiPciHostBridgeBeginBusAllocation - The bus allocation phase is about to begin. No specific action is
EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
required here. This notification can be used to perform any
chipset-specific programming.
EfiPciHostBridgeEndBusAllocation - The bus allocation and bus programming phase is complete. No
EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
specific action is required here. This notification can be used to
perform any chipset-specific programming.
EfiPciHostBridgeBeginResourceAllocation - The resource allocation phase is about to begin. No specific
EfiPciHostBridgeBeginResourceAllocation
The resource allocation phase is about to begin. No specific
action is required here. This notification can be used to perform
any chipset-specific programming.
EfiPciHostBridgeAllocateResources - Allocates resources per previously submitted requests for all the PCI
EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
root bridges. These resource settings are returned on the next call to
GetProposedResources(). Before calling NotifyPhase() with a Phase of
EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible for gathering I/O and memory requests for
EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
for gathering I/O and memory requests for
all the PCI root bridges and submitting these requests using
SubmitResources(). This function pads the resource amount
to suit the root bridge hardware, takes care of dependencies between
the PCI root bridges, and calls the Global Coherency Domain (GCD)
with the allocation request. In the case of padding, the allocated range
could be bigger than what was requested.
EfiPciHostBridgeSetResources - Programs the host bridge hardware to decode previously allocated
EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
resources (proposed resources) for all the PCI root bridges. After the
hardware is programmed, reassigning resources will not be supported.
The bus settings are not affected.
EfiPciHostBridgeFreeResources - Deallocates resources that were previously allocated for all the PCI
EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
root bridges and resets the I/O and memory apertures to their initial
state. The bus settings are not affected. If the request to allocate
resources fails, the PCI enumerator can use this notification to
deallocate previous resources, adjust the requests, and retry
allocation.
EfiPciHostBridgeEndResourceAllocation- The resource allocation phase is completed. No specific action is
EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
required here. This notification can be used to perform any chipsetspecific
programming.
@ -431,17 +454,27 @@ PreprocessController (
);
/**
Hot plug request notify.
This function allows the PCI bus driver to be notified to act as requested when a hot-plug event has
happened on the hot-plug controller. Currently, the operations include add operation and remove operation..
@param This - A pointer to the hot plug request protocol.
@param Operation - The operation.
@param Controller - A pointer to the controller.
@param RemainingDevicePath - A pointer to the device path.
@param NumberOfChildren - A the number of child handle in the ChildHandleBuffer.
@param ChildHandleBuffer - A pointer to the array contain the child handle.
@param This A pointer to the hot plug request protocol.
@param Operation The operation the PCI bus driver is requested to make.
@param Controller The handle of the hot-plug controller.
@param RemainingDevicePath The remaining device path for the PCI-like hot-plug device.
@param NumberOfChildren The number of child handles.
For a add operation, it is an output parameter.
For a remove operation, it?<3F><>s an input parameter.
@param ChildHandleBuffer The buffer which contains the child handles.
@retval EFI_INVALID_PARAMETER Operation is not a legal value.
Controller is NULL or not a valid handle.
NumberOfChildren is NULL.
ChildHandleBuffer is NULL while Operation is add.
@retval EFI_OUT_OF_RESOURCES There are no enough resources to start the devices.
@retval EFI_NOT_FOUND Can not find bridge according to controller handle.
@retval EFI_SUCCESS Success operating.
@retval EFI_SUCCESS The handles for the specified device have been created or destroyed
as requested, and for an add operation, the new handles are
returned in ChildHandleBuffer.
**/
EFI_STATUS
EFIAPI
@ -457,10 +490,11 @@ PciHotPlugRequestNotify (
/**
Search hostbridge according to given handle
@param RootBridgeHandle - Host bridge handle.
@param RootBridgeHandle Host bridge handle.
@retval TRUE Found host bridge handle.
@retval FALSE Not found hot bridge handle.
@return TRUE Found.
@return FALSE Not found.
**/
BOOLEAN
SearchHostBridgeHandle (
@ -468,9 +502,14 @@ SearchHostBridgeHandle (
);
/**
Add host bridge handle to global variable for enumating.
Add host bridge handle to global variable for enumerating.
@param HostBridgeHandle Host bridge handle.
@retval EFI_SUCCESS Successfully added host bridge.
@retval EFI_ABORTED Host bridge is NULL, or given host bridge
has been in host bridge list.
@param HostBridgeHandle host bridge handle.
**/
EFI_STATUS
AddHostBridgeEnumerator (

321
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
View File

@ -1,4 +1,5 @@
/** @file
PCI emumeration support functions implementation for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -11,31 +12,28 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
#include "PciEnumeratorSupport.h"
#include "PciCommand.h"
#include "PciIo.h"
/**
This routine is used to check whether the pci device is present.
@param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Pci Output buffer for PCI device structure.
@param Pci Output buffer for PCI device configuration space.
@param Bus PCI bus NO.
@param Device PCI device NO.
@param Func PCI Func NO.
@retval EFI_NOT_FOUND device not present.
@retval EFI_SUCCESS device is found.
@retval EFI_NOT_FOUND PCI device not present.
@retval EFI_SUCCESS PCI device is found.
**/
EFI_STATUS
PciDevicePresent (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
OUT PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
)
{
UINT64 Address;
@ -47,7 +45,7 @@ PciDevicePresent (
Address = EFI_PCI_ADDRESS (Bus, Device, Func, 0);
//
// Read the Vendor Id register
// Read the Vendor ID register
//
Status = PciRootBridgeIoRead (
PciRootBridgeIo,
@ -59,11 +57,9 @@ PciDevicePresent (
);
if (!EFI_ERROR (Status) && (Pci->Hdr).VendorId != 0xffff) {
//
// Read the entire config header for the device
//
Status = PciRootBridgeIoRead (
PciRootBridgeIo,
NULL,
@ -80,17 +76,22 @@ PciDevicePresent (
}
/**
Collect all the resource information under this root bridge
Collect all the resource information under this root bridge.
A database that records all the information about pci device subject to this
root bridge will then be created.
@param Bridge Parent bridge instance.
@param StartBusNumber Bus number of begining.
@retval EFI_SUCCESS PCI device is found.
@retval other Some error occurred when reading PCI bridge information.
**/
EFI_STATUS
PciPciDeviceInfoCollector (
IN PCI_IO_DEVICE *Bridge,
UINT8 StartBusNumber
IN UINT8 StartBusNumber
)
{
EFI_STATUS Status;
@ -111,7 +112,6 @@ PciPciDeviceInfoCollector (
//
// Check to see whether PCI device is present
//
Status = PciDevicePresent (
Bridge->PciRootBridgeIo,
&Pci,
@ -119,7 +119,6 @@ PciPciDeviceInfoCollector (
(UINT8) Device,
(UINT8) Func
);
if (!EFI_ERROR (Status)) {
//
@ -143,7 +142,6 @@ PciPciDeviceInfoCollector (
// Recursively scan PCI busses on the other side of PCI-PCI bridges
//
//
if (!EFI_ERROR (Status) && (IS_PCI_BRIDGE (&Pci) || IS_CARDBUS_BRIDGE (&Pci))) {
//
@ -151,7 +149,7 @@ PciPciDeviceInfoCollector (
//
PciIo = &(PciIoDevice->PciIo);
Status = PciIoRead (PciIo, EfiPciIoWidthUint8, 0x19, 1, &SecBus);
Status = PciIoRead (PciIo, EfiPciIoWidthUint8, PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET, 1, &SecBus);
if (EFI_ERROR (Status)) {
return Status;
@ -188,14 +186,18 @@ PciPciDeviceInfoCollector (
}
/**
Seach required device and get PCI device info block
Seach required device and create PCI device instance.
@param Bridge Parent bridge instance.
@param Pci Output of PCI device info block.
@param Pci Input PCI device information block.
@param Bus PCI bus NO.
@param Device PCI device NO.
@param Func PCI func NO.
@param PciDevice output of searched PCI device instance.
@param PciDevice Output of searched PCI device instance.
@retval EFI_SUCCESS Successfully created PCI device instance.
@retval EFI_OUT_OF_RESOURCES Cannot get PCI device information.
**/
EFI_STATUS
PciSearchDevice (
@ -305,23 +307,24 @@ PciSearchDevice (
}
/**
Create PCI private data for PCI device
Create PCI device instance for PCI device.
@param Bridge Parent bridge instance.
@param Pci PCI bar block
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return new PCI device's private date structure.
@return Created PCI device instance.
**/
PCI_IO_DEVICE *
GatherDeviceInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
)
{
UINTN Offset;
@ -370,23 +373,24 @@ GatherDeviceInfo (
}
/**
Create private data for bridge device's PPB.
Create PCI device instance for PCI-PCI bridge.
@param Bridge Parent bridge
@param Pci Pci device block
@param Bus Bridge device's bus NO.
@param Device Bridge device's device NO.
@param Func Bridge device's func NO.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return Created PCI device instance.
@return bridge device instance.
**/
PCI_IO_DEVICE *
GatherPpbInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
)
{
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
@ -463,7 +467,7 @@ GatherPpbInfo (
);
//
// test if it supports 64 memory or not
// Test if it supports 64 memory or not
//
if (!EFI_ERROR (Status)) {
@ -492,24 +496,26 @@ GatherPpbInfo (
return PciIoDevice;
}
/**
Create private data for hotplug bridge device
Create PCI device instance for PCI Card bridge device.
@param Bridge Parent bridge instance
@param Pci PCI bar block
@param Bus hotplug bridge device's bus NO.
@param Device hotplug bridge device's device NO.
@param Func hotplug bridge device's Func NO.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return Created PCI device instance.
@return hotplug bridge device instance.
**/
PCI_IO_DEVICE *
GatherP2CInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
)
{
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
@ -543,8 +549,8 @@ GatherP2CInfo (
// Initalize the bridge control register
//
PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED);
}
//
// P2C only has one bar that is in 0x10
//
@ -562,12 +568,13 @@ GatherP2CInfo (
}
/**
Create device path for pci deivce
Create device path for pci deivce.
@param ParentDevicePath Parent bridge's path.
@param PciIoDevice Pci device instance.
@return device path protocol instance for specific pci device.
@return Device path protocol instance for specific pci device.
**/
EFI_DEVICE_PATH_PROTOCOL *
CreatePciDevicePath (
@ -593,15 +600,15 @@ CreatePciDevicePath (
}
/**
Check the bar is existed or not.
Check whether the bar is existed or not.
@param PciIoDevice - A pointer to the PCI_IO_DEVICE.
@param Offset - The offset.
@param BarLengthValue - The bar length value.
@param OriginalBarValue - The original bar value.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param Offset The offset.
@param BarLengthValue The bar length value returned.
@param OriginalBarValue The original bar value returned.
@retval EFI_NOT_FOUND - The bar don't exist.
@retval EFI_SUCCESS - The bar exist.
@retval EFI_NOT_FOUND The bar doesn't exist.
@retval EFI_SUCCESS The bar exist.
**/
EFI_STATUS
@ -611,7 +618,6 @@ BarExisted (
OUT UINT32 *BarLengthValue,
OUT UINT32 *OriginalBarValue
)
{
EFI_PCI_IO_PROTOCOL *PciIo;
UINT32 OriginalValue;
@ -623,7 +629,6 @@ BarExisted (
//
// Preserve the original value
//
PciIoRead (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &OriginalValue);
//
@ -660,23 +665,24 @@ BarExisted (
}
/**
Test whether the device can support attributes
Test whether the device can support given attributes.
@param PciIoDevice Pci device instance.
@param Command Command register value.
@param BridgeControl Bridge control value for PPB or P2C.
@param OldCommand Old command register offset.
@param OldBridgeControl Old Bridge control value for PPB or P2C.
@param Command Input command register value, and
returned supported register value.
@param BridgeControl Inout bridge control value for PPB or P2C, and
returned supported bridge control value.
@param OldCommand Returned and stored old command register offset.
@param OldBridgeControl Returned and stored old Bridge control value for PPB or P2C.
@return EFI_SUCCESS.
**/
EFI_STATUS
VOID
PciTestSupportedAttribute (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 *Command,
IN UINT16 *BridgeControl,
IN UINT16 *OldCommand,
IN UINT16 *OldBridgeControl
IN OUT UINT16 *Command,
IN OUT UINT16 *BridgeControl,
OUT UINT16 *OldCommand,
OUT UINT16 *OldBridgeControl
)
{
EFI_TPL OldTpl;
@ -733,20 +739,18 @@ PciTestSupportedAttribute (
*OldBridgeControl = 0;
*BridgeControl = 0;
}
return EFI_SUCCESS;
}
/**
Set the supported or current attributes of a PCI device
Set the supported or current attributes of a PCI device.
@param PciIoDevice - Structure pointer for PCI device.
@param Command - Command register value.
@param BridgeControl - Bridge control value for PPB or P2C.
@param Option - Make a choice of EFI_SET_SUPPORTS or EFI_SET_ATTRIBUTES.
@param PciIoDevice Structure pointer for PCI device.
@param Command Command register value.
@param BridgeControl Bridge control value for PPB or P2C.
@param Option Make a choice of EFI_SET_SUPPORTS or EFI_SET_ATTRIBUTES.
**/
EFI_STATUS
VOID
PciSetDeviceAttribute (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 Command,
@ -830,8 +834,6 @@ PciSetDeviceAttribute (
} else {
PciIoDevice->Attributes = Attributes;
}
return EFI_SUCCESS;
}
/**
@ -839,6 +841,10 @@ PciSetDeviceAttribute (
@param PciIoDevice Pci device instance.
@param StatusIndex Status register value.
@retval EFI_SUCCESS This device support Fast Back to Back attribute.
@retval EFI_UNSUPPORTED This device doesn't support Fast Back to Back attribute.
**/
EFI_STATUS
GetFastBackToBackSupport (
@ -867,7 +873,6 @@ GetFastBackToBackSupport (
} else {
return EFI_UNSUPPORTED;
}
}
/**
@ -876,9 +881,8 @@ GetFastBackToBackSupport (
@param PciIoDevice Pci device instance.
@retval EFI_SUCCESS Success Operation.
**/
EFI_STATUS
VOID
ProcessOptionRomLight (
IN PCI_IO_DEVICE *PciIoDevice
)
@ -907,12 +911,10 @@ ProcessOptionRomLight (
CurrentLink = CurrentLink->ForwardLink;
}
return EFI_SUCCESS;
}
/**
Determine the related attributes of all devices under a Root Bridge
Determine the related attributes of all devices under a Root Bridge.
@param PciIoDevice PCI device instance.
@ -927,11 +929,6 @@ DetermineDeviceAttribute (
UINT16 OldCommand;
UINT16 OldBridgeControl;
BOOLEAN FastB2BSupport;
/*
UINT8 IdePI;
EFI_PCI_IO_PROTOCOL *PciIo;
*/
PCI_IO_DEVICE *Temp;
LIST_ENTRY *CurrentLink;
EFI_STATUS Status;
@ -982,38 +979,6 @@ DetermineDeviceAttribute (
// Enable other supported attributes but not defined in PCI_IO_PROTOCOL
//
PCI_ENABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE);
//
// Enable IDE native mode
//
/*
if (IS_PCI_IDE(&PciIoDevice->Pci)) {
PciIo = &PciIoDevice->PciIo;
PciIoRead (
PciIo,
EfiPciIoWidthUint8,
0x09,
1,
&IdePI
);
//
// Set native mode if it can be supported
//
IdePI |= (((IdePI & 0x0F) >> 1) & 0x05);
PciIoWrite (
PciIo,
EfiPciIoWidthUint8,
0x09,
1,
&IdePI
);
}
*/
}
FastB2BSupport = TRUE;
@ -1082,10 +1047,14 @@ DetermineDeviceAttribute (
}
/**
This routine is used to update the bar information for those incompatible PCI device
This routine is used to update the bar information for those incompatible PCI device.
@param PciIoDevice Pci device instance.
@return EFI_UNSUPPORTED failed to update Pci Info.
@retval EFI_SUCCESS Successfully updated bar information.
@retval EFI_UNSUPPORTED Given PCI device doesn't belong to incompatible PCI device list.
@retval other Failed to check incompatibility device.
**/
EFI_STATUS
UpdatePciInfo (
@ -1227,15 +1196,15 @@ UpdatePciInfo (
if (Configuration != NULL) {
FreePool (Configuration);
}
return Status;
return EFI_SUCCESS;
}
/**
This routine will update the alignment with the new alignment
This routine will update the alignment with the new alignment.
@param Alignment old alignment.
@param NewAlignment new alignment.
@param Alignment Old alignment.
@param NewAlignment New alignment.
**/
VOID
@ -1302,13 +1271,14 @@ SetNewAlign (
}
/**
Parse PCI bar bit.
Parse PCI bar information and fill them into PCI device instance.
@param PciIoDevice Pci device instance.
@param Offset bar offset.
@param BarIndex bar index.
@param Offset Bar offset.
@param BarIndex Bar index.
@return Next bar offset.
@return next bar offset.
**/
UINTN
PciParseBar (
@ -1490,11 +1460,13 @@ PciParseBar (
/**
This routine is used to initialize the bar of a PCI device.
It can be called typically when a device is going to be rejected.
@param PciIoDevice Pci device instance.
@note It can be called typically when a device is going to be rejected.
**/
EFI_STATUS
VOID
InitializePciDevice (
IN PCI_IO_DEVICE *PciIoDevice
)
@ -1512,16 +1484,15 @@ InitializePciDevice (
for (Offset = 0x10; Offset <= 0x24; Offset += sizeof (UINT32)) {
PciIoWrite (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllOne);
}
return EFI_SUCCESS;
}
/**
Init PPB for bridge device
This routine is used to initialize the bar of a PCI-PCI Bridge device.
@param PciIoDevice PCI-PCI bridge device instance.
@param PciIoDevice Pci device instance.
**/
EFI_STATUS
VOID
InitializePpb (
IN PCI_IO_DEVICE *PciIoDevice
)
@ -1557,16 +1528,15 @@ InitializePpb (
// Force Interrupt line to zero for cards that come up randomly
//
PciIoWrite (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &gAllZero);
return EFI_SUCCESS;
}
/**
Init private data for Hotplug bridge device
This routine is used to initialize the bar of a PCI Card Bridge device.
@param PciIoDevice PCI Card bridge device.
@param PciIoDevice hotplug bridge device.
**/
EFI_STATUS
VOID
InitializeP2C (
IN PCI_IO_DEVICE *PciIoDevice
)
@ -1596,7 +1566,6 @@ InitializeP2C (
// Force Interrupt line to zero for cards that come up randomly
//
PciIoWrite (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &gAllZero);
return EFI_SUCCESS;
}
/**
@ -1604,20 +1573,21 @@ InitializeP2C (
PCI device/bridge device/hotplug bridge device.
@param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Pci Pci bar block.
@param Bus device Bus NO.
@param Device device device NO.
@param Func device func NO.
@param Pci Input Pci information block.
@param Bus Device Bus NO.
@param Device Device device NO.
@param Func Device func NO.
@return Instance of PCI device. NULL means no instance created.
@return instance of PCI device.
**/
PCI_IO_DEVICE *
CreatePciIoDevice (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
)
{
PCI_IO_DEVICE *PciIoDevice;
@ -1659,7 +1629,6 @@ CreatePciIoDevice (
InitializePciDriverOverrideInstance (PciIoDevice);
InitializePciLoadFile2 (PciIoDevice);
//
// Initialize the reserved resource list
//
@ -1680,12 +1649,15 @@ CreatePciIoDevice (
/**
This routine is used to enumerate entire pci bus system
in a given platform
in a given platform.
It is only called on the second start on the same Root Bridge.
@param Controller Parent bridge handler.
@return status of operation.
@retval EFI_SUCCESS PCI enumeration finished successfully.
@retval other Some error occurred when enumerating the pci bus system.
**/
EFI_STATUS
PciEnumeratorLight (
@ -1790,15 +1762,16 @@ PciEnumeratorLight (
}
/**
Get bus range.
Get bus range from PCI resource descriptor list.
@param Descriptors A pointer to the address space descriptor.
@param MinBus The min bus.
@param MaxBus The max bus.
@param BusRange The bus range.
@param MinBus The min bus returned.
@param MaxBus The max bus returned.
@param BusRange The bus range returned.
@retval EFI_SUCCESS Successfully got bus range.
@retval EFI_NOT_FOUND Can not find the specific bus.
@retval EFI_SUCCESS Success operation.
@retval EFI_NOT_FOUND can not find the specific bus.
**/
EFI_STATUS
PciGetBusRange (
@ -1808,7 +1781,6 @@ PciGetBusRange (
OUT UINT16 *BusRange
)
{
while ((*Descriptors)->Desc != ACPI_END_TAG_DESCRIPTOR) {
if ((*Descriptors)->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) {
if (MinBus != NULL) {
@ -1838,6 +1810,7 @@ PciGetBusRange (
@param RootBridgeDev Pci device instance.
@retval EFI_SUCCESS This device started.
@retval other Failed to get PCI Root Bridge I/O protocol.
**/
EFI_STATUS
@ -1881,7 +1854,7 @@ StartManagingRootBridge (
}
/**
This routine can be used to check whether a PCI device should be rejected when light enumeration
This routine can be used to check whether a PCI device should be rejected when light enumeration.
@param PciIoDevice Pci device instance.
@ -1945,7 +1918,6 @@ IsPciDeviceRejected (
//
// IO Bar
//
Mask = 0xFFFFFFFC;
TestValue = TestValue & Mask;
if ((TestValue != 0) && (TestValue == (OldValue & Mask))) {
@ -1957,7 +1929,6 @@ IsPciDeviceRejected (
//
// Mem Bar
//
Mask = 0xFFFFFFF0;
TestValue = TestValue & Mask;
@ -1972,7 +1943,6 @@ IsPciDeviceRejected (
//
// Test its high 32-Bit BAR
//
Status = BarExisted (PciIoDevice, BarOffset, &TestValue, &OldValue);
if (TestValue == OldValue) {
return TRUE;
@ -1995,12 +1965,13 @@ IsPciDeviceRejected (
}
/**
Reset and all bus number from specific bridge.
Reset all bus number from specific bridge.
@param Bridge Parent specific bridge.
@param StartBusNumber start bus number.
@param StartBusNumber Start bus number.
**/
EFI_STATUS
VOID
ResetAllPpbBusNumber (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber
@ -2071,7 +2042,5 @@ ResetAllPpbBusNumber (
}
}
}
return EFI_SUCCESS;
}

269
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
View File

@ -1,6 +1,7 @@
/** @file
PCI emumeration support functions declaration for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -11,54 +12,63 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_ENUMERATOR_SUPPORT_H_
#define _EFI_PCI_ENUMERATOR_SUPPORT_H_
/**
This routine is used to check whether the pci device is present.
@param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
@param Pci Output buffer for PCI device structure
@param Bus PCI bus NO
@param Device PCI device NO
@param Func PCI Func NO
@param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Pci Output buffer for PCI device configuration space.
@param Bus PCI bus NO.
@param Device PCI device NO.
@param Func PCI Func NO.
@retval EFI_NOT_FOUND PCI device not present.
@retval EFI_SUCCESS PCI device is found.
@retval EFI_NOT_FOUND device not present
@retval EFI_SUCCESS device is found.
**/
EFI_STATUS
PciDevicePresent (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
OUT PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Collect all the resource information under this root bridge
Collect all the resource information under this root bridge.
A database that records all the information about pci device subject to this
root bridge will then be created.
@param Bridge Parent bridge instance
@param StartBusNumber Bus number of begining
@param Bridge Parent bridge instance.
@param StartBusNumber Bus number of begining.
@retval EFI_SUCCESS PCI device is found.
@retval other Some error occurred when reading PCI bridge information.
**/
EFI_STATUS
PciPciDeviceInfoCollector (
IN PCI_IO_DEVICE *Bridge,
UINT8 StartBusNumber
IN UINT8 StartBusNumber
);
/**
Seach required device and get PCI device info block
Seach required device and create PCI device instance.
@param Bridge Parent bridge instance
@param Pci Output of PCI device info block
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI bus NO.
@param Device PCI device NO.
@param Func PCI func NO.
@param PciDevice output of searched PCI device instance
@param PciDevice Output of searched PCI device instance.
@retval EFI_SUCCESS Successfully created PCI device instance.
@retval EFI_OUT_OF_RESOURCES Cannot get PCI device information.
**/
EFI_STATUS
PciSearchDevice (
@ -71,72 +81,76 @@ PciSearchDevice (
);
/**
Create PCI private data for PCI device
Create PCI device instance for PCI device.
@param Bridge Parent bridge instance
@param Pci PCI bar block
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return new PCI device's private date structure.
@return Created PCI device instance.
**/
PCI_IO_DEVICE *
GatherDeviceInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Create private data for bridge device's PPB.
Create PCI device instance for PCI-PCI bridge.
@param Bridge Parent bridge
@param Pci Pci device block
@param Bus Bridge device's bus NO.
@param Device Bridge device's device NO.
@param Func Bridge device's func NO.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return Created PCI device instance.
@return bridge device instance.
**/
PCI_IO_DEVICE *
GatherPpbInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Create private data for hotplug bridge device
Create PCI device instance for PCI Card bridge device.
@param Bridge Parent bridge instance
@param Pci PCI bar block
@param Bus hotplug bridge device's bus NO.
@param Device hotplug bridge device's device NO.
@param Func hotplug bridge device's Func NO.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return Created PCI device instance.
@return hotplug bridge device instance
**/
PCI_IO_DEVICE *
GatherP2CInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Create device path for pci deivce
Create device path for pci deivce.
@param ParentDevicePath Parent bridge's path.
@param PciIoDevice Pci device instance.
@return device path protocol instance for specific pci device.
**/
EFI_DEVICE_PATH_PROTOCOL *
CreatePciDevicePath (
@ -145,15 +159,15 @@ CreatePciDevicePath (
);
/**
Check the bar is existed or not.
Check whether the bar is existed or not.
@param PciIoDevice - A pointer to the PCI_IO_DEVICE.
@param Offset - The offset.
@param BarLengthValue - The bar length value.
@param OriginalBarValue - The original bar value.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param Offset The offset.
@param BarLengthValue The bar length value returned.
@param OriginalBarValue The original bar value returned.
@retval EFI_NOT_FOUND - The bar don't exist.
@retval EFI_SUCCESS - The bar exist.
@retval EFI_NOT_FOUND The bar doesn't exist.
@retval EFI_SUCCESS The bar exist.
**/
EFI_STATUS
@ -165,35 +179,36 @@ BarExisted (
);
/**
Test whether the device can support attributes
Test whether the device can support given attributes.
@param PciIoDevice Pci device instance
@param Command Command register value.
@param BridgeControl Bridge control value for PPB or P2C.
@param OldCommand Old command register offset
@param OldBridgeControl Old Bridge control value for PPB or P2C.
@param PciIoDevice Pci device instance.
@param Command Input command register value, and
returned supported register value.
@param BridgeControl Inout bridge control value for PPB or P2C, and
returned supported bridge control value.
@param OldCommand Returned and stored old command register offset.
@param OldBridgeControl Returned and stored old Bridge control value for PPB or P2C.
@return EFI_SUCCESS.
**/
EFI_STATUS
VOID
PciTestSupportedAttribute (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 *Command,
IN UINT16 *BridgeControl,
IN UINT16 *OldCommand,
IN UINT16 *OldBridgeControl
IN OUT UINT16 *Command,
IN OUT UINT16 *BridgeControl,
OUT UINT16 *OldCommand,
OUT UINT16 *OldBridgeControl
);
/**
Set the supported or current attributes of a PCI device
Set the supported or current attributes of a PCI device.
@param PciIoDevice - Structure pointer for PCI device.
@param Command - Command register value.
@param BridgeControl - Bridge control value for PPB or P2C.
@param Option - Make a choice of EFI_SET_SUPPORTS or EFI_SET_ATTRIBUTES.
@param PciIoDevice Structure pointer for PCI device.
@param Command Command register value.
@param BridgeControl Bridge control value for PPB or P2C.
@param Option Make a choice of EFI_SET_SUPPORTS or EFI_SET_ATTRIBUTES.
**/
EFI_STATUS
VOID
PciSetDeviceAttribute (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 Command,
@ -202,10 +217,14 @@ PciSetDeviceAttribute (
);
/**
Determine if the device can support Fast Back to Back attribute
Determine if the device can support Fast Back to Back attribute.
@param PciIoDevice Pci device instance.
@param StatusIndex Status register value.
@retval EFI_SUCCESS This device support Fast Back to Back attribute.
@retval EFI_UNSUPPORTED This device doesn't support Fast Back to Back attribute.
**/
EFI_STATUS
GetFastBackToBackSupport (
@ -214,7 +233,7 @@ GetFastBackToBackSupport (
);
/**
Determine the related attributes of all devices under a Root Bridge
Determine the related attributes of all devices under a Root Bridge.
@param PciIoDevice PCI device instance.
@ -225,10 +244,14 @@ DetermineDeviceAttribute (
);
/**
This routine is used to update the bar information for those incompatible PCI device
This routine is used to update the bar information for those incompatible PCI device.
@param PciIoDevice Pci device instance.
@return EFI_UNSUPPORTED failed to update Pci Info.
@retval EFI_SUCCESS Successfully updated bar information.
@retval EFI_UNSUPPORTED Given PCI device doesn't belong to incompatible PCI device list.
@retval other Failed to check incompatibility device.
**/
EFI_STATUS
UpdatePciInfo (
@ -236,10 +259,10 @@ UpdatePciInfo (
);
/**
This routine will update the alignment with the new alignment
This routine will update the alignment with the new alignment.
@param Alignment old alignment.
@param NewAlignment new alignment.
@param Alignment Old alignment.
@param NewAlignment New alignment.
**/
VOID
@ -249,13 +272,14 @@ SetNewAlign (
);
/**
Parse PCI bar bit.
Parse PCI bar information and fill them into PCI device instance.
@param PciIoDevice Pci device instance.
@param Offset bar offset.
@param BarIndex bar index.
@param Offset Bar offset.
@param BarIndex Bar index.
@return Next bar offset.
@return next bar offset.
**/
UINTN
PciParseBar (
@ -265,32 +289,36 @@ PciParseBar (
);
/**
This routine is used to initialize the bar of a PCI device
It can be called typically when a device is going to be rejected.
This routine is used to initialize the bar of a PCI device.
@param PciIoDevice Pci device instance.
@note It can be called typically when a device is going to be rejected.
**/
EFI_STATUS
VOID
InitializePciDevice (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Init PPB for bridge device
This routine is used to initialize the bar of a PCI-PCI Bridge device.
@param PciIoDevice PCI-PCI bridge device instance.
@param PciIoDevice Pci device instance.
**/
EFI_STATUS
VOID
InitializePpb (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Init private data for Hotplug bridge device
This routine is used to initialize the bar of a PCI Card Bridge device.
@param PciIoDevice PCI Card bridge device.
@param PciIoDevice hotplug bridge device.
**/
EFI_STATUS
VOID
InitializeP2C (
IN PCI_IO_DEVICE *PciIoDevice
);
@ -300,30 +328,34 @@ InitializeP2C (
PCI device/bridge device/hotplug bridge device.
@param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Pci Pci bar block
@param Bus device Bus NO.
@param Device device device NO.
@param Func device func NO.
@param Pci Input Pci information block.
@param Bus Device Bus NO.
@param Device Device device NO.
@param Func Device func NO.
@return Instance of PCI device. NULL means no instance created.
@return instance of PCI device.
**/
PCI_IO_DEVICE *
CreatePciIoDevice (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
IN PCI_TYPE00 *Pci,
UINT8 Bus,
UINT8 Device,
UINT8 Func
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
This routine is used to enumerate entire pci bus system
in a given platform
in a given platform.
It is only called on the second start on the same Root Bridge.
@param Controller Parent bridge handler.
@return status of operation.
@retval EFI_SUCCESS PCI enumeration finished successfully.
@retval other Some error occurred when enumerating the pci bus system.
**/
EFI_STATUS
PciEnumeratorLight (
@ -331,15 +363,16 @@ PciEnumeratorLight (
);
/**
Get bus range.
Get bus range from PCI resource descriptor list.
@param Descriptors A pointer to the address space descriptor.
@param MinBus The min bus.
@param MaxBus The max bus.
@param BusRange The bus range.
@param MinBus The min bus returned.
@param MaxBus The max bus returned.
@param BusRange The bus range returned.
@retval EFI_SUCCESS Successfully got bus range.
@retval EFI_NOT_FOUND Can not find the specific bus.
@retval EFI_SUCCESS Success operation.
@retval EFI_NOT_FOUND can not find the specific bus.
**/
EFI_STATUS
PciGetBusRange (
@ -355,6 +388,7 @@ PciGetBusRange (
@param RootBridgeDev Pci device instance.
@retval EFI_SUCCESS This device started.
@retval other Failed to get PCI Root Bridge I/O protocol.
**/
EFI_STATUS
@ -363,7 +397,7 @@ StartManagingRootBridge (
);
/**
This routine can be used to check whether a PCI device should be rejected when light enumeration
This routine can be used to check whether a PCI device should be rejected when light enumeration.
@param PciIoDevice Pci device instance.
@ -376,4 +410,17 @@ IsPciDeviceRejected (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Reset all bus number from specific bridge.
@param Bridge Parent specific bridge.
@param StartBusNumber Start bus number.
**/
VOID
ResetAllPpbBusNumber (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber
);
#endif

179
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
View File

@ -1,7 +1,7 @@
/** @file
This module provide support function for hot plug device.
PCI Hot Plug support functions implementation for PCI Bus module..
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -12,20 +12,20 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
#include "PciHotPlugSupport.h"
EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit;
EFI_HPC_LOCATION *gPciRootHpcPool;
UINTN gPciRootHpcCount;
ROOT_HPC_DATA *gPciRootHpcData;
EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit = NULL;
EFI_HPC_LOCATION *gPciRootHpcPool = NULL;
UINTN gPciRootHpcCount = 0;
ROOT_HPC_DATA *gPciRootHpcData = NULL;
/**
Init HPC private data.
Event notification function to set Hot Plug controller status.
@param Event The event that invoke this function.
@param Context The calling context, pointer to ROOT_HPC_DATA.
@param Event event object
@param Context HPC private data.
**/
VOID
EFIAPI
@ -38,17 +38,17 @@ PciHPCInitialized (
HpcData = (ROOT_HPC_DATA *) Context;
HpcData->Initialized = TRUE;
}
/**
Compare two device path
Compare two device pathes to check if they are exactly same.
@param DevicePath1 the first device path want to be compared.
@param DevicePath2 the first device path want to be compared.
@param DevicePath1 A pointer to the first device path data structure.
@param DevicePath2 A pointer to the second device path data structure.
@retval TRUE They are same.
@retval FALSE They are not same.
@retval TRUE equal.
@retval FALSE different.
**/
BOOLEAN
EfiCompareDevicePath (
@ -74,7 +74,16 @@ EfiCompareDevicePath (
}
/**
Init hot plug support and root hot plug private data.
Check hot plug support and initialize root hot plug private data.
If Hot Plug is supported by the platform, call PCI Hot Plug Init protocol
to get PCI Hot Plug controller's information and constructor the root hot plug
private data structure.
@retval EFI_SUCCESS They are same.
@retval EFI_UNSUPPORTED No PCI Hot Plug controler on the platform.
@retval EFI_OUT_OF_RESOURCES No memory to constructor root hot plug private
data structure.
**/
EFI_STATUS
@ -92,13 +101,8 @@ InitializeHotPlugSupport (
// hot plug controller supported on the platform
// the PCI Bus driver is running on. HotPlug Support
// is an optional feature, so absence of the protocol
// won't incur the penalty
// won't incur the penalty.
//
gPciHotPlugInit = NULL;
gPciRootHpcPool = NULL;
gPciRootHpcCount = 0;
gPciRootHpcData = NULL;
Status = gBS->LocateProtocol (
&gEfiPciHotPlugInitProtocolGuid,
NULL,
@ -129,18 +133,20 @@ InitializeHotPlugSupport (
}
/**
Test whether device path is for root pci hot plug bus
Test whether device path is for root pci hot plug bus.
@param HpbDevicePath tested device path.
@param HpIndex Return the index of root hot plug in global array.
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug bus.
@retval FALSE The device path is not for root pci hot plug bus.
@retval TRUE device path is for root pci hot plug.
@retval FALSE device path is not for root pci hot plug.
**/
BOOLEAN
IsRootPciHotPlugBus (
IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
OUT UINTN *HpIndex
OUT UINTN *HpIndex OPTIONAL
)
{
UINTN Index;
@ -161,13 +167,15 @@ IsRootPciHotPlugBus (
}
/**
Test whether device path is for root pci hot plug controller
Test whether device path is for root pci hot plug controller.
@param HpcDevicePath tested device path.
@param HpIndex Return the index of root hot plug in global array.
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug controller.
@retval FALSE The device path is not for root pci hot plug controller.
@retval TRUE device path is for root pci hot plug controller.
@retval FALSE device path is not for root pci hot plug controller.
**/
BOOLEAN
IsRootPciHotPlugController (
@ -193,12 +201,13 @@ IsRootPciHotPlugController (
}
/**
Wrapper for creating event object for HPC
Creating event object for PCI Hot Plug controller.
@param HpIndex index of hot plug device in global array.
@param Event event object.
@param HpIndex Index of hot plug device in global array.
@param Event The retuned event that invoke this function.
@return Status of create event invoken.
@return status of create event invoken.
**/
EFI_STATUS
CreateEventForHpc (
@ -224,9 +233,13 @@ CreateEventForHpc (
}
/**
Wait for all root HPC initialized.
Wait for all root PCI Hot Plug controller finished initializing.
@param TimeoutInMicroSeconds Microseconds to wait for all root HPCs' initialization.
@retval EFI_SUCCESS All HPCs initialization finished.
@retval EFI_TIMEOUT Not ALL HPCs initialization finished in Microseconds.
@param TimeoutInMicroSeconds microseconds to wait for all root hpc's initialization.
**/
EFI_STATUS
AllRootHPCInitialized (
@ -237,8 +250,8 @@ AllRootHPCInitialized (
UINTN Index;
Delay = (UINT32) ((TimeoutInMicroSeconds / 30) + 1);
do {
do {
for (Index = 0; Index < gPciRootHpcCount; Index++) {
if (!gPciRootHpcData[Index].Initialized) {
@ -251,7 +264,7 @@ AllRootHPCInitialized (
}
//
// Stall for 30 us
// Stall for 30 microseconds..
//
gBS->Stall (30);
@ -263,16 +276,17 @@ AllRootHPCInitialized (
}
/**
Check HPC capability register block
Check whether PCI-PCI bridge has PCI Hot Plug capability register block.
@param PciIoDevice PCI device instance.
@param PciIoDevice A Pointer to the PCI-PCI bridge.
@retval TRUE PCI device is HPC.
@retval FALSE PCI device is not HPC.
@retval EFI_SUCCESS PCI device is HPC.
@retval EFI_NOT_FOUND PCI device is not HPC.
**/
EFI_STATUS
BOOLEAN
IsSHPC (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
)
{
@ -280,7 +294,7 @@ IsSHPC (
UINT8 Offset;
if (PciIoDevice == NULL) {
return EFI_NOT_FOUND;
return FALSE;
}
Offset = 0;
@ -292,42 +306,26 @@ IsSHPC (
);
//
// If the PPB has the hot plug controller build-in,
// If the PCI-PCI bridge has the hot plug controller build-in,
// then return TRUE;
//
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
return TRUE;
}
return EFI_NOT_FOUND;
return FALSE;
}
/**
Get resource padding for hot plug bus
Get resource padding if the specified PCI bridge is a hot plug bus.
@param PciIoDevice PCI device instance
@param PciIoDevice PCI bridge instance.
@retval EFI_SUCCESS success get padding and set it into PCI device instance
@retval EFI_NOT_FOUND PCI device is not a hot plug bus.
**/
EFI_STATUS
VOID
GetResourcePaddingForHpb (
IN PCI_IO_DEVICE *PciIoDevice
)
/**
Routine Description:
Arguments:
Returns:
None
**/
// TODO: PciIoDevice - add argument and description to function comment
// TODO: EFI_SUCCESS - add return value to function comment
// TODO: EFI_NOT_FOUND - add return value to function comment
{
EFI_STATUS Status;
EFI_HPC_STATE State;
@ -335,9 +333,10 @@ Returns:
EFI_HPC_PADDING_ATTRIBUTES Attributes;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
Status = IsPciHotPlugBus (PciIoDevice);
if (!EFI_ERROR (Status)) {
if (IsPciHotPlugBus (PciIoDevice)) {
//
// If PCI-PCI bridge device is PCI Hot Plug bus.
//
PciAddress = EFI_PCI_ADDRESS (PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber, 0);
Status = gPciHotPlugInit->GetResourcePadding (
gPciHotPlugInit,
@ -349,7 +348,7 @@ Returns:
);
if (EFI_ERROR (Status)) {
return Status;
return;
}
if ((State & EFI_HPC_STATE_ENABLED) != 0 && (State & EFI_HPC_STATE_INITIALIZED) != 0) {
@ -357,10 +356,8 @@ Returns:
PciIoDevice->PaddingAttributes = Attributes;
}
return EFI_SUCCESS;
return;
}
return EFI_NOT_FOUND;
}
/**
@ -368,36 +365,30 @@ Returns:
@param PciIoDevice PCI device instance.
@retval EFI_SUCCESS PCI device is hot plug bus.
@retval EFI_NOT_FOUND PCI device is not hot plug bus.
@retval TRUE PCI device is a hot plug bus.
@retval FALSE PCI device is not a hot plug bus.
**/
EFI_STATUS
BOOLEAN
IsPciHotPlugBus (
PCI_IO_DEVICE *PciIoDevice
)
{
BOOLEAN Result;
EFI_STATUS Status;
Status = IsSHPC (PciIoDevice);
if (IsSHPC (PciIoDevice)) {
//
// If the PPB has the hot plug controller build-in,
// then return TRUE;
//
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
return TRUE;
}
//
// Otherwise, see if it is a Root HPC
//
Result = IsRootPciHotPlugBus (PciIoDevice->DevicePath, NULL);
if (Result) {
return EFI_SUCCESS;
if(IsRootPciHotPlugBus (PciIoDevice->DevicePath, NULL)) {
return TRUE;
}
return EFI_NOT_FOUND;
return FALSE;
}

114
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
View File

@ -1,6 +1,7 @@
/** @file
PCI Hot Plug support functions declaration for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -11,32 +12,36 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_HOT_PLUG_SUPPORT_H_
#define _EFI_PCI_HOT_PLUG_SUPPORT_H_
//
// stall 1 second
// stall 1 second, its unit is 100ns
//
#define STALL_1_SECOND 1000000
//
// PCI Hot Plug controller private data
//
typedef struct {
EFI_EVENT Event;
BOOLEAN Initialized;
VOID *Padding;
} ROOT_HPC_DATA;
//
// Reference of some global variabes
//
extern EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit;
extern EFI_HPC_LOCATION *gPciRootHpcPool;
extern UINTN gPciRootHpcCount;
extern ROOT_HPC_DATA *gPciRootHpcData;
/**
Init HPC private data.
Event notification function to set Hot Plug controller status.
@param Event The event that invoke this function.
@param Context The calling context, pointer to ROOT_HPC_DATA.
@param Event event object
@param Context HPC private data.
**/
VOID
EFIAPI
@ -46,13 +51,14 @@ PciHPCInitialized (
);
/**
Compare two device path
Compare two device pathes to check if they are exactly same.
@param DevicePath1 the first device path want to be compared.
@param DevicePath2 the first device path want to be compared.
@param DevicePath1 A pointer to the first device path data structure.
@param DevicePath2 A pointer to the second device path data structure.
@retval TRUE They are same.
@retval FALSE They are not same.
@retval TRUE equal.
@retval FALSE different.
**/
BOOLEAN
EfiCompareDevicePath (
@ -61,7 +67,16 @@ EfiCompareDevicePath (
);
/**
Init hot plug support and root hot plug private data.
Check hot plug support and initialize root hot plug private data.
If Hot Plug is supported by the platform, call PCI Hot Plug Init protocol
to get PCI Hot Plug controller's information and constructor the root hot plug
private data structure.
@retval EFI_SUCCESS They are same.
@retval EFI_UNSUPPORTED No PCI Hot Plug controler on the platform.
@retval EFI_OUT_OF_RESOURCES No memory to constructor root hot plug private
data structure.
**/
EFI_STATUS
@ -74,37 +89,42 @@ InitializeHotPlugSupport (
@param PciIoDevice PCI device instance.
@retval EFI_SUCCESS PCI device is hot plug bus.
@retval EFI_NOT_FOUND PCI device is not hot plug bus.
@retval TRUE PCI device is a hot plug bus.
@retval FALSE PCI device is not a hot plug bus.
**/
EFI_STATUS
BOOLEAN
IsPciHotPlugBus (
PCI_IO_DEVICE *PciIoDevice
);
/**
Test whether device path is for root pci hot plug bus
Test whether device path is for root pci hot plug bus.
@param HpbDevicePath tested device path
@param HpIndex Return the index of root hot plug in global array.
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug bus.
@retval FALSE The device path is not for root pci hot plug bus.
@retval TRUE device path is for root pci hot plug
@retval FALSE device path is not for root pci hot plug
**/
BOOLEAN
IsRootPciHotPlugBus (
IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
OUT UINTN *HpIndex
OUT UINTN *HpIndex OPTIONAL
);
/**
Test whether device path is for root pci hot plug controller
Test whether device path is for root pci hot plug controller.
@param HpcDevicePath tested device path.
@param HpIndex Return the index of root hot plug in global array.
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug controller.
@retval FALSE The device path is not for root pci hot plug controller.
@retval TRUE device path is for root pci hot plug controller.
@retval FALSE device path is not for root pci hot plug controller.
**/
BOOLEAN
IsRootPciHotPlugController (
@ -113,12 +133,13 @@ IsRootPciHotPlugController (
);
/**
Wrapper for creating event object for HPC
Creating event object for PCI Hot Plug controller.
@param HpIndex index of hot plug device in global array.
@param Event event object.
@param HpIndex Index of hot plug device in global array.
@param Event The retuned event that invoke this function.
@return Status of create event invoken.
@return status of create event invoken.
**/
EFI_STATUS
CreateEventForHpc (
@ -127,9 +148,13 @@ CreateEventForHpc (
);
/**
Wait for all root HPC initialized.
Wait for all root PCI Hot Plug controller finished initializing.
@param TimeoutInMicroSeconds Microseconds to wait for all root HPCs' initialization.
@retval EFI_SUCCESS All HPCs initialization finished.
@retval EFI_TIMEOUT Not ALL HPCs initialization finished in Microseconds.
@param TimeoutInMicroSeconds microseconds to wait for all root hpc's initialization.
**/
EFI_STATUS
AllRootHPCInitialized (
@ -137,27 +162,26 @@ AllRootHPCInitialized (
);
/**
Check HPC capability register block
Check whether PCI-PCI bridge has PCI Hot Plug capability register block.
@param PciIoDevice PCI device instance.
@param PciIoDevice A Pointer to the PCI-PCI bridge.
@retval TRUE PCI device is HPC.
@retval FALSE PCI device is not HPC.
@retval EFI_SUCCESS PCI device is HPC.
@retval EFI_NOT_FOUND PCI device is not HPC.
**/
EFI_STATUS
BOOLEAN
IsSHPC (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Get resource padding for hot plug bus
Get resource padding if the specified PCI bridge is a hot plug bus.
@param PciIoDevice PCI device instance.
@param PciIoDevice PCI bridge instance.
@retval EFI_SUCCESS success get padding and set it into PCI device instance.
@retval EFI_NOT_FOUND PCI device is not a hot plug bus.
**/
EFI_STATUS
VOID
GetResourcePaddingForHpb (
IN PCI_IO_DEVICE *PciIoDevice
);

129
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciIo.c
View File

@ -1,7 +1,7 @@
/** @file
Implements all interfaces for EFI_PCI_IO_PROTOCOL.
EFI PCI IO protocol functions implementation for PCI Bus module.
Copyright (c) 2006 - 2008, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -12,7 +12,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
//
@ -48,30 +47,13 @@ EFI_PCI_IO_PROTOCOL mPciIoInterface = {
};
/**
report a error Status code of PCI bus driver controller.
Report a error Status code of PCI bus driver controller.
@param PciIoDevice Pci device instance.
@param Code status code.
@param Code Status code value.
**/
EFI_STATUS
ReportErrorStatusCode (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_STATUS_CODE_VALUE Code
);
//
// PCI I/O Support Function Prototypes
//
//
/**
report a error Status code of PCI bus driver controller.
@param PciIoDevice Pci device instance.
@param Code status code.
**/
EFI_STATUS
ReportErrorStatusCode (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_STATUS_CODE_VALUE Code
@ -92,34 +74,35 @@ ReportErrorStatusCode (
**/
VOID
InitializePciIoInstance (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
)
{
CopyMem (&PciIoDevice->PciIo, &mPciIoInterface, sizeof (EFI_PCI_IO_PROTOCOL));
}
/**
Verifies access to a PCI Base Address Register (BAR)
Verifies access to a PCI Base Address Register (BAR).
@param PciIoDevice Pci device instance
@param PciIoDevice Pci device instance.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Type Operation type could be memory or I/O
@param Type Operation type could be memory or I/O.
@param Width Signifies the width of the memory or I/O operations.
@param Count The number of memory or I/O operations to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
@retval EFI_INVALID_PARAMETER Invalid Width/BarIndex or Bar type.
@retval EFI_SUCCESS Success Operation.
@retval EFI_SUCCESS Successfully verified.
**/
EFI_STATUS
PciIoVerifyBarAccess (
PCI_IO_DEVICE *PciIoDevice,
UINT8 BarIndex,
PCI_BAR_TYPE Type,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINTN Count,
UINT64 *Offset
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT8 BarIndex,
IN PCI_BAR_TYPE Type,
IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN IN UINTN Count,
IN UINT64 *Offset
)
{
if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
@ -161,20 +144,21 @@ PciIoVerifyBarAccess (
}
/**
Verifies access to a PCI Config Header
Verifies access to a PCI Configuration Header.
@param PciIoDevice Pci device instance
@param PciIoDevice Pci device instance.
@param Width Signifies the width of the memory or I/O operations.
@param Count The number of memory or I/O operations to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
@retval EFI_INVALID_PARAMETER Invalid Width
@retval EFI_UNSUPPORTED Offset overflow
@retval EFI_SUCCESS Success operation
@retval EFI_UNSUPPORTED Offset overflowed.
@retval EFI_SUCCESS Successfully verified.
**/
EFI_STATUS
PciIoVerifyConfigAccess (
PCI_IO_DEVICE *PciIoDevice,
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINTN Count,
IN UINT64 *Offset
@ -212,23 +196,26 @@ PciIoVerifyConfigAccess (
}
/**
Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
satisfied or after a defined duration.
@param This Pointer to protocol instance of EFI_PCI_IO_PROTOCOL
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
base address for the memory operation to perform.
@param Offset The offset within the selected BAR to start the memory operation.
@param Mask Mask used for the polling criteria.
@param Value The comparison value used for the polling exit criteria.
@param Delay The number of 100 ns units to poll.
@param Result Pointer to the last value read from the memory location.
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
@retval EFI_TIMEOUT Delay expired before a match occurred.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
@ -279,20 +266,22 @@ PciIoPollMem (
}
/**
Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
satisfied or after a defined duration.
@param This A pointer to the EFI_PCI_IO_PROTOCOL.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the selected BAR to start the memory or I/O operation.
base address for the memory operation to perform.
@param Offset The offset within the selected BAR to start the memory operation.
@param Mask Mask used for the polling criteria.
@param Value The comparison value used for the polling exit criteria.
@param Delay The number of 100 ns units to poll.
@param Result Pointer to the last value read from the memory location.
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
@retval EFI_TIMEOUT Delay expired before a match occurred.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@ -794,7 +783,7 @@ PciIoCopyMem (
}
/**
Provides the PCI controller-Cspecific addresses needed to access system memory.
Provides the PCI controller-specific addresses needed to access system memory.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Operation Indicates if the bus master is going to read or write to system memory.
@ -1063,18 +1052,20 @@ PciIoGetLocation (
/**
Check BAR type for PCI resource.
@param PciIoDevice PCI device instance
@param PciIoDevice PCI device instance.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param BarType Memory or I/O
@param BarType Memory or I/O.
@retval TRUE Pci device's bar type is same with input BarType.
@retval TRUE Pci device's bar type is not same with input BarType.
@return whether Pci device's bar type is same with input BarType.
**/
BOOLEAN
CheckBarType (
IN PCI_IO_DEVICE *PciIoDevice,
UINT8 BarIndex,
PCI_BAR_TYPE BarType
IN UINT8 BarIndex,
IN PCI_BAR_TYPE BarType
)
{
switch (BarType) {
@ -1106,14 +1097,15 @@ CheckBarType (
}
/**
Set/Disable new attributes to a Root Bridge
Set/Disable new attributes to a Root Bridge.
@param PciIoDevice Pci device instance
@param Attributes New attribute want to be set
@param Operation Set or Disable
@param PciIoDevice Pci device instance.
@param Attributes New attribute want to be set.
@param Operation Set or Disable.
@retval EFI_UNSUPPORTED If root bridge does not support change attribute.
@retval EFI_SUCCESS Successfully set new attributs.
@retval EFI_UNSUPPORTED If root bridge does not support change attribute
@retval EFI_SUCCESS Success operation.
**/
EFI_STATUS
ModifyRootBridgeAttributes (
@ -1171,18 +1163,19 @@ ModifyRootBridgeAttributes (
// Also update the attributes for this Root Bridge structure
//
PciIoDevice->Attributes = NewPciRootBridgeAttributes;
return EFI_SUCCESS;
return EFI_SUCCESS;
}
/**
Check whether this device can be enable/disable to snoop
Check whether this device can be enable/disable to snoop.
@param PciIoDevice Pci device instance
@param Operation Enable/Disable
@param PciIoDevice Pci device instance.
@param Operation Enable/Disable.
@retval EFI_UNSUPPORTED Pci device is not GFX device or not support snoop
@retval EFI_UNSUPPORTED Pci device is not GFX device or not support snoop.
@retval EFI_SUCCESS Snoop can be supported.
**/
EFI_STATUS
SupportPaletteSnoopAttributes (
@ -1859,12 +1852,14 @@ UpStreamBridgesAttributes (
}
/**
Test whether two Pci device has same parent bridge.
Test whether two Pci devices has same parent bridge.
@param PciDevice1 the frist pci device for testing
@param PciDevice2 the second pci device for testing
@param PciDevice1 The first pci device for testing.
@param PciDevice2 The second pci device for testing.
@retval TRUE Two Pci device has the same parent bridge.
@retval FALSE Two Pci device has not the same parent bridge.
@return whether two Pci device has same parent bridge.
**/
BOOLEAN
PciDevicesOnTheSamePath (

106
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciIo.h
View File

@ -1,5 +1,5 @@
/** @file
Header file of EFI PCI IO protocol.
EFI PCI IO protocol functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -12,7 +12,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_IO_PROTOCOL_H_
#define _EFI_PCI_IO_PROTOCOL_H_
@ -24,71 +23,76 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
VOID
InitializePciIoInstance (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Verifies access to a PCI Base Address Register (BAR)
Verifies access to a PCI Base Address Register (BAR).
@param PciIoDevice Pci device instance
@param PciIoDevice Pci device instance.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Type Operation type could be memory or I/O
@param Type Operation type could be memory or I/O.
@param Width Signifies the width of the memory or I/O operations.
@param Count The number of memory or I/O operations to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
@retval EFI_INVALID_PARAMETER Invalid Width/BarIndex or Bar type.
@retval EFI_SUCCESS Success Operation.
@retval EFI_SUCCESS Successfully verified.
**/
EFI_STATUS
PciIoVerifyBarAccess (
PCI_IO_DEVICE *PciIoDevice,
UINT8 BarIndex,
PCI_BAR_TYPE Type,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINTN Count,
UINT64 *Offset
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT8 BarIndex,
IN PCI_BAR_TYPE Type,
IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN IN UINTN Count,
IN UINT64 *Offset
);
/**
Verifies access to a PCI Config Header
Verifies access to a PCI Configuration Header.
@param PciIoDevice Pci device instance
@param PciIoDevice Pci device instance.
@param Width Signifies the width of the memory or I/O operations.
@param Count The number of memory or I/O operations to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
@retval EFI_INVALID_PARAMETER Invalid Width.
@retval EFI_UNSUPPORTED Offset overflow.
@retval EFI_SUCCESS Success operation.
@retval EFI_INVALID_PARAMETER Invalid Width
@retval EFI_UNSUPPORTED Offset overflowed.
@retval EFI_SUCCESS Successfully verified.
**/
EFI_STATUS
PciIoVerifyConfigAccess (
PCI_IO_DEVICE *PciIoDevice,
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINTN Count,
IN UINT64 *Offset
);
/**
Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
satisfied or after a defined duration.
@param This Pointer to protocol instance of EFI_PCI_IO_PROTOCOL
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
base address for the memory operation to perform.
@param Offset The offset within the selected BAR to start the memory operation.
@param Mask Mask used for the polling criteria.
@param Value The comparison value used for the polling exit criteria.
@param Delay The number of 100 ns units to poll.
@param Result Pointer to the last value read from the memory location.
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
@retval EFI_TIMEOUT Delay expired before a match occurred.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
@ -104,20 +108,22 @@ PciIoPollMem (
);
/**
Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
satisfied or after a defined duration.
@param This A pointer to the EFI_PCI_IO_PROTOCOL.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the selected BAR to start the memory or I/O operation.
base address for the memory operation to perform.
@param Offset The offset within the selected BAR to start the memory operation.
@param Mask Mask used for the polling criteria.
@param Value The comparison value used for the polling exit criteria.
@param Delay The number of 100 ns units to poll.
@param Result Pointer to the last value read from the memory location.
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
@retval EFI_TIMEOUT Delay expired before a match occurred.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@ -357,7 +363,7 @@ PciIoCopyMem (
);
/**
Provides the PCI controller-Cspecific addresses needed to access system memory.
Provides the PCI controller-specific addresses needed to access system memory.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Operation Indicates if the bus master is going to read or write to system memory.
@ -497,29 +503,32 @@ PciIoGetLocation (
/**
Check BAR type for PCI resource.
@param PciIoDevice PCI device instance
@param PciIoDevice PCI device instance.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param BarType Memory or I/O
@param BarType Memory or I/O.
@retval TRUE Pci device's bar type is same with input BarType.
@retval TRUE Pci device's bar type is not same with input BarType.
@return whether Pci device's bar type is same with input BarType.
**/
BOOLEAN
CheckBarType (
IN PCI_IO_DEVICE *PciIoDevice,
UINT8 BarIndex,
PCI_BAR_TYPE BarType
IN UINT8 BarIndex,
IN PCI_BAR_TYPE BarType
);
/**
Set/Disable new attributes to a Root Bridge
Set/Disable new attributes to a Root Bridge.
@param PciIoDevice Pci device instance
@param Attributes New attribute want to be set
@param Operation Set or Disable
@param PciIoDevice Pci device instance.
@param Attributes New attribute want to be set.
@param Operation Set or Disable.
@retval EFI_UNSUPPORTED If root bridge does not support change attribute.
@retval EFI_SUCCESS Successfully set new attributs.
@retval EFI_UNSUPPORTED If root bridge does not support change attribute
@retval EFI_SUCCESS Success operation.
**/
EFI_STATUS
ModifyRootBridgeAttributes (
@ -529,13 +538,14 @@ ModifyRootBridgeAttributes (
);
/**
Check whether this device can be enable/disable to snoop
Check whether this device can be enable/disable to snoop.
@param PciIoDevice Pci device instance
@param Operation Enable/Disable
@param PciIoDevice Pci device instance.
@param Operation Enable/Disable.
@retval EFI_UNSUPPORTED Pci device is not GFX device or not support snoop
@retval EFI_UNSUPPORTED Pci device is not GFX device or not support snoop.
@retval EFI_SUCCESS Snoop can be supported.
**/
EFI_STATUS
SupportPaletteSnoopAttributes (
@ -659,12 +669,14 @@ UpStreamBridgesAttributes (
);
/**
Test whether two Pci device has same parent bridge.
Test whether two Pci devices has same parent bridge.
@param PciDevice1 the frist pci device for testing
@param PciDevice2 the second pci device for testing
@param PciDevice1 The first pci device for testing.
@param PciDevice2 The second pci device for testing.
@retval TRUE Two Pci device has the same parent bridge.
@retval FALSE Two Pci device has not the same parent bridge.
@return whether two Pci device has same parent bridge.
**/
BOOLEAN
PciDevicesOnTheSamePath (

961
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c
View File

File diff suppressed because it is too large Load Diff

165
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.h
View File

@ -1,6 +1,7 @@
/** @file
Internal library declaration for PCI Bus module.
Copyright (c) 2006 - 2007, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -9,18 +10,6 @@ http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PciLib.h
Abstract:
PCI Bus Driver Lib header file.
Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable
support hot plug.
Revision History
**/
#ifndef _EFI_PCI_LIB_H_
@ -51,9 +40,10 @@ typedef struct {
/**
Retrieve the BAR information via PciIo interface.
Retrieve the PCI Card device BAR information via PciIo interface.
@param PciIoDevice PCI Card device instance.
@param PciIoDevice Pci device instance.
**/
VOID
GetBackPcCardBar (
@ -64,21 +54,27 @@ GetBackPcCardBar (
Remove rejected pci device from specific root bridge
handle.
@param RootBridgeHandle specific parent root bridge handle.
@param RootBridgeHandle Specific parent root bridge handle.
@param Bridge Bridge device instance.
@retval EFI_SUCCESS Success operation.
**/
EFI_STATUS
VOID
RemoveRejectedPciDevices (
EFI_HANDLE RootBridgeHandle,
IN EFI_HANDLE RootBridgeHandle,
IN PCI_IO_DEVICE *Bridge
);
/**
Wrapper function for allocating resource for pci host bridge.
Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
@param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_SUCCESS Successfully finished resource allocation.
@retval EFI_NOT_FOUND Cannot get root bridge instance.
@retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.
@retval other Some error occurred when allocating resources for the PCI Host Bridge.
@note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
**/
EFI_STATUS
@ -87,38 +83,18 @@ PciHostBridgeResourceAllocator (
);
/**
Wrapper function for allocating resource for pci host bridge without hotplug device support.
@param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
**/
EFI_STATUS
PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
Wrapper function for allocating resource for pci host bridge with hotplug device support.
@param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
**/
EFI_STATUS
PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
Wapper function of scanning pci bus and assign bus number to the given PCI bus system
Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
Scan pci bus and assign bus number to the given PCI bus system.
@param Bridge Bridge device instance.
@param StartBusNumber start point.
@param SubBusNumber Point to sub bus number.
@param PaddedBusRange Customized bus number.
@retval EFI_SUCCESS Success.
@retval EFI_DEVICE_ERROR Fail to scan bus.
@retval EFI_SUCCESS Successfully scanned and assigned bus number.
@retval other Some error occurred when scanning pci bus.
@note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
**/
EFI_STATUS
PciScanBus (
@ -129,51 +105,13 @@ PciScanBus (
);
/**
Wapper function of scanning pci bus and assign bus number to the given PCI bus system
Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
Process Option Rom on the specified root bridge.
@param Bridge Bridge device instance.
@param StartBusNumber start point.
@param SubBusNumber Point to sub bus number.
@param PaddedBusRange Customized bus number.
@param Bridge Pci root bridge device instance.
@retval EFI_SUCCESS Success.
@retval EFI_DEVICE_ERROR Fail to scan bus.
**/
EFI_STATUS
PciScanBus_WithHotPlugDeviceSupport (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber,
OUT UINT8 *SubBusNumber,
OUT UINT8 *PaddedBusRange
);
@retval EFI_SUCCESS Success process.
@retval other Some error occurred when processing Option Rom on the root bridge.
/**
Wapper function of scanning pci bus and assign bus number to the given PCI bus system
Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
@param Bridge Bridge device instance.
@param StartBusNumber start point.
@param SubBusNumber Point to sub bus number.
@param PaddedBusRange Customized bus number.
@retval EFI_SUCCESS Success.
@retval EFI_DEVICE_ERROR Fail to scan bus.
**/
EFI_STATUS
PciScanBus_WithoutHotPlugDeviceSupport (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber,
OUT UINT8 *SubBusNumber,
OUT UINT8 *PaddedBusRange
);
/**
Process Option Rom on this host bridge.
@param Bridge Pci bridge device instance.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
PciRootBridgeP2CProcess (
@ -181,12 +119,14 @@ PciRootBridgeP2CProcess (
);
/**
Process Option Rom on this host bridge.
Process Option Rom on the specified host bridge.
@param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_NOT_FOUND Can not find the root bridge instance.
@retval EFI_SUCCESS Success process.
@retval EFI_NOT_FOUND Can not find the root bridge instance.
@retval other Some error occurred when processing Option Rom on the host bridge.
**/
EFI_STATUS
PciHostBridgeP2CProcess (
@ -197,10 +137,11 @@ PciHostBridgeP2CProcess (
This function is used to enumerate the entire host bridge
in a given platform.
@param PciResAlloc A pointer to the resource allocate protocol.
@param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.
@retval EFI_OUT_OF_RESOURCES no enough resource.
@retval EFI_SUCCESS Success.
@retval EFI_SUCCESS Successfully enumerated the host bridge.
@retval EFI_OUT_OF_RESOURCES No enough memory available.
@retval other Some error occurred when enumerating the host bridge.
**/
EFI_STATUS
@ -218,10 +159,11 @@ PciHostBridgeEnumerator (
@param Buffer For read operations, the destination buffer to store the results. For
write operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
@retval EFI_INVALID_PARAMETER Buffer is NULL.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI configuration header of the PCI controller.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
**/
EFI_STATUS
@ -236,17 +178,20 @@ PciIoRead (
/**
Write PCI configuration space through EFI_PCI_IO_PROTOCOL.
@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.
@param Width Signifies the width of the memory operations.
@param Address The address within the PCI configuration space for the PCI controller.
@param Count The number of unit to be write.
@param Buffer For read operations, the destination buffer to store the results. For
write operations, the source buffer to write data from.
If PCI incompatibility check is enabled, do incompatibility check.
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
@retval EFI_INVALID_PARAMETER Buffer is NULL.
@param PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory operations.
@param Offset The offset within the PCI configuration space for the PCI controller.
@param Count The number of PCI configuration operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI configuration header of the PCI controller.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
**/
EFI_STATUS
@ -265,14 +210,13 @@ PciIoWrite (
@param Pci A pointer to PCI_TYPE00.
@param Width Signifies the width of the memory operations.
@param Address The address within the PCI configuration space for the PCI controller.
@param Count The number of unit to be write.
@param Count The number of unit to be read.
@param Buffer For read operations, the destination buffer to store the results. For
write operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
@retval EFI_INVALID_PARAMETER Buffer is NULL.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
@ -297,9 +241,8 @@ PciRootBridgeIoWrite (
write operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
@retval EFI_INVALID_PARAMETER Buffer is NULL.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS

93
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
View File

@ -1,4 +1,5 @@
/** @file
PCI Rom supporting funtions implementation for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -12,14 +13,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
#include "PciResourceSupport.h"
#include <IndustryStandard/Pci23.h>
/**
Load the EFI Image from Option ROM
@param PciIoDevice PCI IO Device
@param PciIoDevice PCI IO device instance.
@param FilePath The file path of the EFI Image
@param BufferSize On input the size of Buffer in bytes. On output with a return
code of EFI_SUCCESS, the amount of data transferred to Buffer.
@ -29,7 +27,10 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
then no the size of the requested file is returned in BufferSize.
@retval EFI_SUCCESS The file was loaded.
@retval EFI_UNSUPPORTED BootPolicy is TRUE.
@retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
BufferSize is NULL.
@retval EFI_NOT_FOUND Not found PCI Option Rom on PCI device.
@retval EFI_DEVICE_ERROR Failed to decompress PCI Option Rom image.
@retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry.
BufferSize has been updated with the size needed to complete the request.
**/
@ -160,7 +161,7 @@ LocalLoadFile2 (
**/
VOID
InitializePciLoadFile2 (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
)
{
PciIoDevice->LoadFile2.LoadFile = LoadFile2;
@ -181,6 +182,10 @@ InitializePciLoadFile2 (
@retval EFI_SUCCESS The file was loaded.
@retval EFI_UNSUPPORTED BootPolicy is TRUE.
@retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
BufferSize is NULL.
@retval EFI_NOT_FOUND Not found PCI Option Rom on PCI device.
@retval EFI_DEVICE_ERROR Failed to decompress PCI Option Rom image.
@retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry.
BufferSize has been updated with the size needed to complete the request.
@ -210,31 +215,14 @@ LoadFile2 (
);
}
//
// Module global for a template of the PCI option ROM Image Device Path Node
//
MEMMAP_DEVICE_PATH mPciOptionRomImageDevicePathNodeTemplate = {
{
HARDWARE_DEVICE_PATH,
HW_MEMMAP_DP,
{
(UINT8) (sizeof (MEMMAP_DEVICE_PATH)),
(UINT8) ((sizeof (MEMMAP_DEVICE_PATH)) >> 8)
}
},
EfiMemoryMappedIO,
0,
0
};
/**
Get Pci device's oprom infor bits.
@param PciIoDevice Pci device instance
@param PciIoDevice Pci device instance.
@retval EFI_NOT_FOUND Pci device has not Option Rom.
@retval EFI_SUCCESS Pci device has Option Rom.
@retval EFI_NOT_FOUND Pci device has not oprom
@retval EFI_SUCCESS Pci device has oprom
**/
EFI_STATUS
GetOpRomInfo (
@ -257,7 +245,7 @@ GetOpRomInfo (
PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;
//
// offset is 0x30 if is not ppb
// Offset is 0x30 if is not ppb
//
//
@ -267,7 +255,7 @@ GetOpRomInfo (
if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
//
// if is ppb
// If is ppb
//
//
@ -276,7 +264,7 @@ GetOpRomInfo (
RomBarIndex = PCI_BRIDGE_ROMBAR;
}
//
// the bit0 is 0 to prevent the enabling of the Rom address decoder
// The bit0 is 0 to prevent the enabling of the Rom address decoder
//
AllOnes = 0xfffffffe;
Address = EFI_PCI_ADDRESS (Bus, Device, Function, RomBarIndex);
@ -290,11 +278,11 @@ GetOpRomInfo (
&AllOnes
);
if (EFI_ERROR (Status)) {
return Status;
return EFI_NOT_FOUND;
}
//
// read back
// Read back
//
Status = PciRootBridgeIoRead (
PciRootBridgeIo,
@ -305,7 +293,7 @@ GetOpRomInfo (
&AllOnes
);
if (EFI_ERROR (Status)) {
return Status;
return EFI_NOT_FOUND;
}
//
// Bits [1, 10] are reserved
@ -320,7 +308,6 @@ GetOpRomInfo (
}
/**
Check if the RomImage contains EFI Images.
@param RomImage The ROM address of Image for check.
@ -368,13 +355,14 @@ ContainEfiImage (
/**
Load option rom image for specified PCI device
Load Option Rom image for specified PCI device.
@param PciDevice Pci device instance
@param RomBase Base address of oprom.
@param PciDevice Pci device instance.
@param RomBase Base address of Option Rom.
@retval EFI_OUT_OF_RESOURCES No enough memory to hold image.
@retval EFI_SUCESS Successfully loaded Option Rom.
@retval EFI_OUT_OF_RESOURCES not enough memory to hold image
@retval EFI_SUCESS Success
**/
EFI_STATUS
LoadOpRomImage (
@ -543,17 +531,16 @@ LoadOpRomImage (
}
/**
enable/disable oprom decode
Enable/Disable Option Rom decode.
@param PciDevice pci device instance
@param PciDevice Pci device instance.
@param RomBarIndex The BAR index of the standard PCI Configuration header to use as the
base address for resource range. The legal range for this field is 0..5.
@param RomBar Base address of rom
@param RomBar Base address of Option Rom.
@param Enable Flag for enable/disable decode.
@retval EFI_SUCCESS Success
**/
EFI_STATUS
VOID
RomDecode (
IN PCI_IO_DEVICE *PciDevice,
IN UINT8 RomBarIndex,
@ -622,19 +609,20 @@ RomDecode (
);
}
return EFI_SUCCESS;
}
/**
Process the oprom image.
Load and start the Option Rom image.
@param PciDevice Pci device instance.
@retval EFI_SUCCESS Successfully loaded and started PCI Option Rom image.
@retval EFI_NOT_FOUND Failed to process PCI Option Rom image.
@param PciDevice Pci device instance
**/
EFI_STATUS
ProcessOpRomImage (
PCI_IO_DEVICE *PciDevice
IN PCI_IO_DEVICE *PciDevice
)
{
UINT8 Indicator;
@ -648,7 +636,6 @@ ProcessOpRomImage (
EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
PCI_DATA_STRUCTURE *Pcir;
EFI_DEVICE_PATH_PROTOCOL *PciOptionRomImageDevicePath;
MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH EfiOpRomImageNode;
VOID *Buffer;
UINTN BufferSize;
@ -656,7 +643,7 @@ ProcessOpRomImage (
Indicator = 0;
//
// Get the Address of the Rom image
// Get the Address of the Option Rom image
//
RomBar = PciDevice->PciIo.RomImage;
RomBarOffset = (UINT8 *) RomBar;
@ -694,7 +681,6 @@ ProcessOpRomImage (
//
// load image and start image
//
BufferSize = 0;
Buffer = NULL;
Status = EFI_SUCCESS;
@ -749,6 +735,5 @@ ProcessOpRomImage (
} while (((Indicator & 0x80) == 0x00) && ((UINTN) (RomBarOffset - (UINT8 *) RomBar) < PciDevice->RomSize));
return RetStatus;
}

50
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
View File

@ -1,4 +1,5 @@
/** @file
PCI Rom supporting funtions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -11,10 +12,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_OP_ROM_SUPPORT_H_
#define _EFI_PCI_OP_ROM_SUPPORT_H_
#ifndef _EFI_PCI_OPTION_ROM_SUPPORT_H_
#define _EFI_PCI_OPTION_ROM_SUPPORT_H_
#include <Protocol/LoadFile2.h>
/**
Initialize a PCI LoadFile2 instance.
@ -24,7 +24,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
VOID
InitializePciLoadFile2 (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
);
/**
@ -42,6 +42,10 @@ InitializePciLoadFile2 (
@retval EFI_SUCCESS The file was loaded.
@retval EFI_UNSUPPORTED BootPolicy is TRUE.
@retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
BufferSize is NULL.
@retval EFI_NOT_FOUND Not found PCI Option Rom on PCI device.
@retval EFI_DEVICE_ERROR Failed to decompress PCI Option Rom image.
@retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry.
BufferSize has been updated with the size needed to complete the request.
@ -57,7 +61,6 @@ LoadFile2 (
);
/**
Check if the RomImage contains EFI Images.
@param RomImage The ROM address of Image for check.
@ -77,10 +80,11 @@ ContainEfiImage (
/**
Get Pci device's oprom infor bits.
@param PciIoDevice Pci device instance
@param PciIoDevice Pci device instance.
@retval EFI_NOT_FOUND Pci device has not Option Rom.
@retval EFI_SUCCESS Pci device has Option Rom.
@retval EFI_NOT_FOUND Pci device has not oprom
@retval EFI_SUCCESS Pci device has oprom
**/
EFI_STATUS
GetOpRomInfo (
@ -88,13 +92,14 @@ GetOpRomInfo (
);
/**
Load option rom image for specified PCI device
Load Option Rom image for specified PCI device.
@param PciDevice Pci device instance
@param RomBase Base address of oprom.
@param PciDevice Pci device instance.
@param RomBase Base address of Option Rom.
@retval EFI_OUT_OF_RESOURCES No enough memory to hold image.
@retval EFI_SUCESS Successfully loaded Option Rom.
@retval EFI_OUT_OF_RESOURCES not enough memory to hold image
@retval EFI_SUCESS Success
**/
EFI_STATUS
LoadOpRomImage (
@ -103,17 +108,16 @@ LoadOpRomImage (
);
/**
enable/disable oprom decode
Enable/Disable Option Rom decode.
@param PciDevice pci device instance
@param PciDevice Pci device instance.
@param RomBarIndex The BAR index of the standard PCI Configuration header to use as the
base address for resource range. The legal range for this field is 0..5.
@param RomBar Base address of rom
@param RomBar Base address of Option Rom.
@param Enable Flag for enable/disable decode.
@retval EFI_SUCCESS Success
**/
EFI_STATUS
VOID
RomDecode (
IN PCI_IO_DEVICE *PciDevice,
IN UINT8 RomBarIndex,
@ -122,13 +126,17 @@ RomDecode (
);
/**
Process the oprom image.
Load and start the Option Rom image.
@param PciDevice Pci device instance.
@retval EFI_SUCCESS Successfully loaded and started PCI Option Rom image.
@retval EFI_NOT_FOUND Failed to process PCI Option Rom image.
@param PciDevice Pci device instance
**/
EFI_STATUS
ProcessOpRomImage (
PCI_IO_DEVICE *PciDevice
IN PCI_IO_DEVICE *PciDevice
);
#endif

10
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
View File

@ -1,6 +1,7 @@
/** @file
Power management support fucntions implementation for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -18,10 +19,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
put the device to D0 state if the device supports
PCI Power Management.
@param PciIoDevice Pci device instance
@param PciIoDevice PCI device instance.
@retval EFI_UNSUPPORTED PCI Device does not support power management.
@retval EFI_SUCCESS Turned off PWE successfully.
@retval EFI_UNSUPPORTED Device do not support power management
@retval EFI_SUCCESS Success
**/
EFI_STATUS
ResetPowerManagementFeature (

10
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
View File

@ -1,6 +1,7 @@
/** @file
Power management support fucntions delaration for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -19,10 +20,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
put the device to D0 state if the device supports
PCI Power Management.
@param PciIoDevice Pci device instance
@param PciIoDevice PCI device instance.
@retval EFI_UNSUPPORTED PCI Device does not support power management.
@retval EFI_SUCCESS Turned off PWE successfully.
@retval EFI_UNSUPPORTED Device do not support power management
@retval EFI_SUCCESS Success
**/
EFI_STATUS
ResetPowerManagementFeature (

413
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
View File

@ -1,4 +1,5 @@
/** @file
PCI resouces support functions implemntation for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -12,18 +13,15 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
#include "PciResourceSupport.h"
#include "PciCommand.h"
/**
The function is used to skip VGA range
The function is used to skip VGA range.
@param Start address including VGA range
@param Length length of VGA range.
@param Start Returned start address including VGA range.
@param Length The length of VGA range.
@retval EFI_SUCCESS success.
**/
EFI_STATUS
VOID
SkipVGAAperture (
OUT UINT64 *Start,
IN UINT64 Length
@ -34,6 +32,7 @@ SkipVGAAperture (
UINT64 StartOffset;
UINT64 LimitOffset;
ASSERT (Start != NULL);
//
// For legacy VGA, bit 10 to bit 15 is not decoded
//
@ -45,19 +44,16 @@ SkipVGAAperture (
if (LimitOffset >= VGABASE1) {
*Start = *Start - StartOffset + VGALIMIT2 + 1;
}
return EFI_SUCCESS;
}
/**
This function is used to skip ISA aliasing aperture.
@param Start address including ISA aliasing aperture.
@param Length length of ISA aliasing aperture.
@param Start Returned start address including ISA aliasing aperture.
@param Length The length of ISA aliasing aperture.
@retval EFI_SUCCESS success.
**/
EFI_STATUS
VOID
SkipIsaAliasAperture (
OUT UINT64 *Start,
IN UINT64 Length
@ -69,6 +65,8 @@ SkipIsaAliasAperture (
UINT64 StartOffset;
UINT64 LimitOffset;
ASSERT (Start != NULL);
//
// For legacy ISA, bit 10 to bit 15 is not decoded
//
@ -81,8 +79,6 @@ SkipIsaAliasAperture (
if (LimitOffset >= ISABASE) {
*Start = *Start - StartOffset + ISALIMIT + 1;
}
return EFI_SUCCESS;
}
/**
@ -92,12 +88,11 @@ SkipIsaAliasAperture (
@param Bridge PCI resource node for bridge.
@param ResNode Resource node want to be inserted.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
InsertResourceNode (
PCI_RESOURCE_NODE *Bridge,
PCI_RESOURCE_NODE *ResNode
IN PCI_RESOURCE_NODE *Bridge,
IN PCI_RESOURCE_NODE *ResNode
)
{
LIST_ENTRY *CurrentLink;
@ -128,35 +123,31 @@ InsertResourceNode (
CurrentLink = ResNode->Link.ForwardLink;
}
return EFI_SUCCESS;
}
/**
This routine is used to merge two different resource trees in need of
resoure degradation.
Routine Description:
This routine is used to merge two different resource tree in need of
resoure degradation. For example, if a upstream PPB doesn't support,
For example, if an upstream PPB doesn't support,
prefetchable memory decoding, the PCI bus driver will choose to call this function
to merge prefectchable memory resource list into normal memory list.
If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource
type.
If Dst is NULL or Res is NULL, ASSERT ().
@param Dst Point to destination resource tree.
@param Res Point to source resource tree.
@param TypeMerge If the TypeMerge is TRUE, Res resource type is changed to the type of
destination resource type.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
MergeResourceTree (
PCI_RESOURCE_NODE *Dst,
PCI_RESOURCE_NODE *Res,
BOOLEAN TypeMerge
IN PCI_RESOURCE_NODE *Dst,
IN PCI_RESOURCE_NODE *Res,
IN BOOLEAN TypeMerge
)
{
@ -177,10 +168,7 @@ MergeResourceTree (
RemoveEntryList (CurrentLink);
InsertResourceNode (Dst, Temp);
}
return EFI_SUCCESS;
}
/**
@ -189,9 +177,8 @@ MergeResourceTree (
@param Bridge PCI resource node for bridge.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
CalculateApertureIo16 (
IN PCI_RESOURCE_NODE *Bridge
)
@ -205,7 +192,6 @@ CalculateApertureIo16 (
BOOLEAN VGAEnable;
EFI_PCI_PLATFORM_POLICY PciPolicy;
//
// Always assume there is ISA device and VGA device on the platform
// will be customized later
@ -222,10 +208,10 @@ CalculateApertureIo16 (
&PciPolicy
);
if (!EFI_ERROR (Status)) {
if (PciPolicy & EFI_RESERVE_ISA_IO_ALIAS) {
if ((PciPolicy & EFI_RESERVE_ISA_IO_ALIAS) != 0) {
IsaEnable = TRUE;
}
if (PciPolicy & EFI_RESERVE_VGA_IO_ALIAS) {
if ((PciPolicy & EFI_RESERVE_VGA_IO_ALIAS) != 0) {
VGAEnable = TRUE;
}
}
@ -234,7 +220,7 @@ CalculateApertureIo16 (
Aperture = 0;
if (Bridge == NULL) {
return EFI_SUCCESS;
return ;
}
CurrentLink = Bridge->ChildList.ForwardLink;
@ -262,7 +248,6 @@ CalculateApertureIo16 (
// If both of them are enabled, then the IO resource would
// become too limited to meet the requirement of most of devices.
//
if (IsaEnable || VGAEnable) {
if (!IS_PCI_BRIDGE (&(Node->PciDev->Pci)) && !IS_CARDBUS_BRIDGE (&(Node->PciDev->Pci))) {
//
@ -323,19 +308,16 @@ CalculateApertureIo16 (
Bridge->Alignment = Node->Alignment;
}
}
return EFI_SUCCESS;
}
/**
This function is used to calculate the resource aperture
for a given bridge device.
@param Bridge Give bridge device.
@param Bridge PCI resouce node for given bridge device.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
CalculateResourceAperture (
IN PCI_RESOURCE_NODE *Bridge
)
@ -349,11 +331,13 @@ CalculateResourceAperture (
Aperture = 0;
if (Bridge == NULL) {
return EFI_SUCCESS;
return ;
}
if (Bridge->ResType == PciBarTypeIo16) {
return CalculateApertureIo16 (Bridge);
CalculateApertureIo16 (Bridge);
return ;
}
CurrentLink = Bridge->ChildList.ForwardLink;
@ -424,8 +408,6 @@ CalculateResourceAperture (
Bridge->Alignment = Node->Alignment;
}
}
return EFI_SUCCESS;
}
/**
@ -434,20 +416,19 @@ CalculateResourceAperture (
@param PciDev Pci device instance.
@param IoNode Resource info node for IO .
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
GetResourceFromDevice (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
)
{
@ -571,8 +552,6 @@ GetResourceFromDevice (
if (!ResourceRequested) {
PciDev->Allocated = TRUE;
}
return EFI_SUCCESS;
}
/**
@ -584,6 +563,10 @@ GetResourceFromDevice (
@param Bar Bar index.
@param ResType Type of resource: IO/Memory.
@param ResUsage Resource usage.
@return PCI resource node created for given PCI device.
NULL means PCI resource node is not created.
**/
PCI_RESOURCE_NODE *
CreateResourceNode (
@ -616,23 +599,23 @@ CreateResourceNode (
Node->Reserved = FALSE;
Node->ResourceUsage = ResUsage;
InitializeListHead (&Node->ChildList);
return Node;
}
/**
This routine is used to extract resource request from
This function is used to extract resource request from
device node list.
@param Bridge Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
CreateResourceMap (
IN PCI_IO_DEVICE *Bridge,
IN PCI_RESOURCE_NODE *IoNode,
@ -678,6 +661,7 @@ CreateResourceMap (
// Note: For PPB, memory aperture is aligned with 1MB and IO aperture
// is aligned with 4KB
// This device is typically a bridge device like PPB and P2C
// Note: 0x1000 aligned
//
IoBridge = CreateResourceNode (
Temp,
@ -686,7 +670,7 @@ CreateResourceMap (
PPB_IO_RANGE,
PciBarTypeIo16,
PciResUsageTypical
); //0x1000 aligned
);
Mem32Bridge = CreateResourceNode (
Temp,
@ -861,9 +845,6 @@ CreateResourceMap (
CalculateResourceAperture (Mem64Node);
CalculateResourceAperture (PMem64Node);
CalculateResourceAperture (IoNode);
return EFI_SUCCESS;
}
/**
@ -872,20 +853,19 @@ CreateResourceMap (
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ResourcePaddingPolicy (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
)
{
//
@ -901,9 +881,6 @@ ResourcePaddingPolicy (
PMem64Node
);
}
return EFI_SUCCESS;
}
/**
@ -915,13 +892,12 @@ ResourcePaddingPolicy (
@param Bridge Pci device instance.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
DegradeResource (
IN PCI_IO_DEVICE *Bridge,
IN PCI_RESOURCE_NODE *Mem32Node,
@ -1018,18 +994,16 @@ DegradeResource (
FALSE
);
}
return EFI_SUCCESS;
}
/**
Test whether bridge device support decode resource
Test whether bridge device support decode resource.
@param Bridge Bridge device instance.
@param Decode Decode type according to resource type.
@return TRUE bridge device support decode resource.
@return FALSE bridge device don't support decode resource.
@return TRUE The bridge device support decode resource.
@return FALSE The bridge device don't support decode resource.
**/
BOOLEAN
@ -1038,7 +1012,6 @@ BridgeSupportResourceDecode (
IN UINT32 Decode
)
{
if (((Bridge->Decodes) & Decode) != 0) {
return TRUE;
}
@ -1048,13 +1021,15 @@ BridgeSupportResourceDecode (
/**
This function is used to program the resource allocated
for each resource node.
for each resource node under specified bridge.
@param Base Base address of resource to be progammed.
@param Bridge PCI resource node for the bridge device.
@param Base Base address of resource.
@param Bridge Bridge device instance.
@retval EFI_SUCCESS Successfully to program all resouces
on given PCI bridge device.
@retval EFI_OUT_OF_RESOURCES Base is all one.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
ProgramResource (
@ -1079,13 +1054,21 @@ ProgramResource (
if (!IS_PCI_BRIDGE (&(Node->PciDev->Pci))) {
if (IS_CARDBUS_BRIDGE (&(Node->PciDev->Pci))) {
//
// Program the PCI Card Bus device
//
ProgramP2C (Base, Node);
} else {
//
// Program the PCI device BAR
//
ProgramBar (Base, Node);
}
} else {
//
// Program the PCI devices under this bridge
//
Status = ProgramResource (Base + Node->Offset, Node);
if (EFI_ERROR (Status)) {
return Status;
}
@ -1100,14 +1083,13 @@ ProgramResource (
}
/**
Program Bar register.
Program Bar register for PCI device.
@param Base Base address for resource.
@param Base Base address for PCI device resource to be progammed.
@param Node Point to resoure node structure.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ProgramBar (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
@ -1180,19 +1162,16 @@ ProgramBar (
default:
break;
}
return EFI_SUCCESS;
}
/**
Program PPB apperture.
Program PCI-PCI bridge apperture.
@param Base Base address for resource.
@param Node Point to resoure node structure.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ProgramPpbApperture (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
@ -1204,14 +1183,14 @@ ProgramPpbApperture (
Address = 0;
//
// if no device south of this PPB, return anyway
// If no device resource of this PPB, return anyway
// Apperture is set default in the initialization code
//
if (Node->Length == 0 || Node->ResourceUsage == PciResUsagePadding) {
//
// For padding resource node, just ignore when programming
//
return EFI_SUCCESS;
return ;
}
PciIo = &(Node->PciDev->PciIo);
@ -1354,20 +1333,17 @@ ProgramPpbApperture (
default:
break;
}
return EFI_SUCCESS;
}
/**
Program parent bridge for oprom.
Program parent bridge for Option Rom.
@param PciDevice Pci deivce instance.
@param OptionRomBase Base address for oprom.
@param Enable Enable/Disable.
@param OptionRomBase Base address for Optiona Rom.
@param Enable Enable or disable PCI memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ProgrameUpstreamBridgeForRom (
IN PCI_IO_DEVICE *PciDevice,
IN UINT32 OptionRomBase,
@ -1394,7 +1370,7 @@ ProgrameUpstreamBridgeForRom (
Node.Offset = 0;
//
// Program PPB to only open a single <= 16<MB apperture
// Program PPB to only open a single <= 16MB apperture
//
if (Enable) {
ProgramPpbApperture (OptionRomBase, &Node);
@ -1406,8 +1382,6 @@ ProgrameUpstreamBridgeForRom (
Parent = Parent->Parent;
}
return EFI_SUCCESS;
}
/**
@ -1415,7 +1389,9 @@ ProgrameUpstreamBridgeForRom (
@param Bridge Point to resource node for a bridge.
@return whether resource exists.
@retval TRUE There is resource on the given bridge.
@retval FALSE There isn't resource on the given bridge.
**/
BOOLEAN
ResourceRequestExisted (
@ -1434,24 +1410,24 @@ ResourceRequestExisted (
/**
Initialize resource pool structure.
@param ResourcePool Point to resource pool structure.
@param ResourcePool Point to resource pool structure. This pool
is reset to all zero when returned.
@param ResourceType Type of resource.
**/
EFI_STATUS
VOID
InitializeResourcePool (
PCI_RESOURCE_NODE *ResourcePool,
PCI_BAR_TYPE ResourceType
IN OUT PCI_RESOURCE_NODE *ResourcePool,
IN PCI_BAR_TYPE ResourceType
)
{
ZeroMem (ResourcePool, sizeof (PCI_RESOURCE_NODE));
ResourcePool->ResType = ResourceType;
ResourcePool->Signature = PCI_RESOURCE_SIGNATURE;
InitializeListHead (&ResourcePool->ChildList);
return EFI_SUCCESS;
}
/**
Get all resource information for given Pci device.
@ -1463,25 +1439,24 @@ InitializeResourcePool (
@param PMem64Bridge 64-bit PMemory node.
@param IoPool Link list header for Io resource.
@param Mem32Pool Link list header for 32-bit memory.
@param PMem32Pool Link list header for 32-bit Pmemory.
@param PMem32Pool Link list header for 32-bit Prefetchable memory.
@param Mem64Pool Link list header for 64-bit memory.
@param PMem64Pool Link list header for 64-bit Pmemory.
@param PMem64Pool Link list header for 64-bit Prefetchable memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
GetResourceMap (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE **IoBridge,
PCI_RESOURCE_NODE **Mem32Bridge,
PCI_RESOURCE_NODE **PMem32Bridge,
PCI_RESOURCE_NODE **Mem64Bridge,
PCI_RESOURCE_NODE **PMem64Bridge,
PCI_RESOURCE_NODE *IoPool,
PCI_RESOURCE_NODE *Mem32Pool,
PCI_RESOURCE_NODE *PMem32Pool,
PCI_RESOURCE_NODE *Mem64Pool,
PCI_RESOURCE_NODE *PMem64Pool
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE **IoBridge,
IN PCI_RESOURCE_NODE **Mem32Bridge,
IN PCI_RESOURCE_NODE **PMem32Bridge,
IN PCI_RESOURCE_NODE **Mem64Bridge,
IN PCI_RESOURCE_NODE **PMem64Bridge,
IN PCI_RESOURCE_NODE *IoPool,
IN PCI_RESOURCE_NODE *Mem32Pool,
IN PCI_RESOURCE_NODE *PMem32Pool,
IN PCI_RESOURCE_NODE *Mem64Pool,
IN PCI_RESOURCE_NODE *PMem64Pool
)
{
@ -1567,18 +1542,15 @@ GetResourceMap (
CurrentLink = CurrentLink->ForwardLink;
}
return EFI_SUCCESS;
}
/**
Destory given resource tree.
@param Bridge root node of resource tree.
@param Bridge PCI resource root node of resource tree.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
DestroyResourceTree (
IN PCI_RESOURCE_NODE *Bridge
)
@ -1591,6 +1563,7 @@ DestroyResourceTree (
CurrentLink = Bridge->ChildList.ForwardLink;
Temp = RESOURCE_NODE_FROM_LINK (CurrentLink);
ASSERT (Temp);
RemoveEntryList (CurrentLink);
@ -1598,43 +1571,8 @@ DestroyResourceTree (
DestroyResourceTree (Temp);
}
gBS->FreePool (Temp);
FreePool (Temp);
}
return EFI_SUCCESS;
}
/**
Record the reserved resource and insert to reserved list.
@param Base Base address of reserved resourse.
@param Length Length of reserved resource.
@param ResType Resource type.
@param Bridge Pci device instance.
**/
EFI_STATUS
RecordReservedResource (
IN UINT64 Base,
IN UINT64 Length,
IN PCI_BAR_TYPE ResType,
IN PCI_IO_DEVICE *Bridge
)
{
PCI_RESERVED_RESOURCE_LIST *ReservedNode;
ReservedNode = AllocatePool (sizeof (PCI_RESERVED_RESOURCE_LIST));
if (ReservedNode == NULL) {
return EFI_OUT_OF_RESOURCES;
}
ReservedNode->Signature = RESERVED_RESOURCE_SIGNATURE;
ReservedNode->Node.Base = Base;
ReservedNode->Node.Length = Length;
ReservedNode->Node.ResType = ResType;
InsertTailList (&Bridge->ReservedResourceList, &(ReservedNode->Link));
return EFI_SUCCESS;
}
/**
@ -1643,20 +1581,19 @@ RecordReservedResource (
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ResourcePaddingForCardBusBridge (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
)
{
PCI_RESOURCE_NODE *Node;
@ -1734,19 +1671,16 @@ ResourcePaddingForCardBusBridge (
IoNode,
Node
);
return EFI_SUCCESS;
}
/**
Program P2C register for given resource node
Program PCI Card device register for given resource node.
@param Base Base address of P2C device
@param Base Base address of PCI Card device to be programmed.
@param Node Given resource node.
@retval EFI_SUCCESS Success
**/
EFI_STATUS
VOID
ProgramP2C (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
@ -1789,7 +1723,7 @@ ProgramP2C (
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x1c,
PCI_CARD_MEMORY_BASE_0,
1,
&Address
);
@ -1798,51 +1732,49 @@ ProgramP2C (
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x20,
PCI_CARD_MEMORY_LIMIT_0,
1,
&TempAddress
);
if (Node->ResType == PciBarTypeMem32) {
//
// Set non-prefetchable bit
//
PciIoRead (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
BridgeControl &= 0xfeff;
BridgeControl &= (UINT16) ~PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE;
PciIoWrite (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
} else {
//
// Set pre-fetchable bit
//
PciIoRead (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
BridgeControl |= 0x0100;
BridgeControl |= PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE;
PciIoWrite (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
@ -1858,7 +1790,7 @@ ProgramP2C (
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x24,
PCI_CARD_MEMORY_BASE_1,
1,
&Address
);
@ -1868,7 +1800,7 @@ ProgramP2C (
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x28,
PCI_CARD_MEMORY_LIMIT_1,
1,
&TempAddress
);
@ -1881,19 +1813,20 @@ ProgramP2C (
PciIoRead (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
BridgeControl &= 0xfdff;
BridgeControl &= (UINT16) ~(PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE);
PciIoWrite (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
} else {
//
@ -1902,16 +1835,16 @@ ProgramP2C (
PciIoRead (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
BridgeControl |= 0x0200;
BridgeControl |= PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE;
PciIoWrite (
PciIo,
EfiPciIoWidthUint16,
0x3e,
PCI_CARD_BRIDGE_CONTROL,
1,
&BridgeControl
);
@ -1926,15 +1859,16 @@ ProgramP2C (
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x2c,
PCI_CARD_IO_BASE_0_LOWER,
1,
&Address
);
TempAddress = Address + Node->Length - 1;
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x30,
PCI_CARD_IO_LIMIT_0_LOWER,
1,
&TempAddress
);
@ -1949,7 +1883,7 @@ ProgramP2C (
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x34,
PCI_CARD_IO_BASE_1_LOWER,
1,
&Address
);
@ -1958,7 +1892,7 @@ ProgramP2C (
PciIoWrite (
PciIo,
EfiPciIoWidthUint32,
0x38,
PCI_CARD_IO_LIMIT_1_LOWER,
1,
&TempAddress
);
@ -1971,8 +1905,6 @@ ProgramP2C (
default:
break;
}
return EFI_SUCCESS;
}
/**
@ -1981,21 +1913,19 @@ ProgramP2C (
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@retval EFI_SUCCESS Success.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
EFI_STATUS
VOID
ApplyResourcePadding (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
)
{
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
@ -2131,23 +2061,22 @@ ApplyResourcePadding (
Ptr++;
}
return EFI_SUCCESS;
}
/**
Get padding resource for PPB.
Light PCI bus driver woundn't support hotplug root device
So no need to pad resource for them.
Get padding resource for PCI-PCI bridge.
@param PciIoDevice Pci device instance.
@param PciIoDevice PCI-PCI bridge device instance.
@note Feature flag PcdPciBusHotplugDeviceSupport determines
whether need to pad resource for them.
**/
VOID
GetResourcePaddingPpb (
IN PCI_IO_DEVICE *PciIoDevice
)
{
if (gPciHotPlugInit != NULL) {
if (gPciHotPlugInit != NULL && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
if (PciIoDevice->ResourcePaddingDescriptors == NULL) {
GetResourcePaddingForHpb (PciIoDevice);
}

297
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
View File

@ -1,6 +1,7 @@
/** @file
PCI resouces support functions declaration for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -14,26 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#ifndef _EFI_PCI_RESOURCE_SUPPORT_H_
#define _EFI_PCI_RESOURCE_SUPPORT_H_
#define RESERVED_RESOURCE_SIGNATURE SIGNATURE_32 ('r', 's', 'v', 'd')
typedef struct {
UINT64 Base;
UINT64 Length;
PCI_BAR_TYPE ResType;
} PCI_RESERVED_RESOURCE_NODE;
typedef struct {
UINT32 Signature;
LIST_ENTRY Link;
PCI_RESERVED_RESOURCE_NODE Node;
} PCI_RESERVED_RESOURCE_LIST;
#define RESOURCED_LIST_FROM_NODE(a) \
CR (a, PCI_RESERVED_RESOURCE_LIST, Node, RESERVED_RESOURCE_SIGNATURE)
#define RESOURCED_LIST_FROM_LINK(a) \
CR (a, PCI_RESERVED_RESOURCE_LIST, Link, RESERVED_RESOURCE_SIGNATURE)
typedef enum {
PciResUsageTypical = 0,
PciResUsagePadding,
@ -60,14 +41,13 @@ typedef struct {
CR (a, PCI_RESOURCE_NODE, Link, PCI_RESOURCE_SIGNATURE)
/**
The function is used to skip VGA range
The function is used to skip VGA range.
@param Start address including VGA range
@param Length length of VGA range.
@param Start Returned start address including VGA range.
@param Length The length of VGA range.
@retval EFI_SUCCESS success.
**/
EFI_STATUS
VOID
SkipVGAAperture (
OUT UINT64 *Start,
IN UINT64 Length
@ -76,12 +56,11 @@ SkipVGAAperture (
/**
This function is used to skip ISA aliasing aperture.
@param Start address including ISA aliasing aperture.
@param Length length of ISA aliasing aperture.
@param Start Returned start address including ISA aliasing aperture.
@param Length The length of ISA aliasing aperture.
@retval EFI_SUCCESS success.
**/
EFI_STATUS
VOID
SkipIsaAliasAperture (
OUT UINT64 *Start,
IN UINT64 Length
@ -94,39 +73,36 @@ SkipIsaAliasAperture (
@param Bridge PCI resource node for bridge.
@param ResNode Resource node want to be inserted.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
InsertResourceNode (
PCI_RESOURCE_NODE *Bridge,
PCI_RESOURCE_NODE *ResNode
IN PCI_RESOURCE_NODE *Bridge,
IN PCI_RESOURCE_NODE *ResNode
);
/**
This routine is used to merge two different resource trees in need of
resoure degradation.
Routine Description:
This routine is used to merge two different resource tree in need of
resoure degradation. For example, if a upstream PPB doesn't support,
For example, if an upstream PPB doesn't support,
prefetchable memory decoding, the PCI bus driver will choose to call this function
to merge prefectchable memory resource list into normal memory list.
If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource
type.
If Dst is NULL or Res is NULL, ASSERT ().
@param Dst Point to destination resource tree.
@param Res Point to source resource tree.
@param TypeMerge If the TypeMerge is TRUE, Res resource type is changed to the type of
destination resource type.
@retval EFI_SUCCESS Success
**/
EFI_STATUS
VOID
MergeResourceTree (
PCI_RESOURCE_NODE *Dst,
PCI_RESOURCE_NODE *Res,
BOOLEAN TypeMerge
IN PCI_RESOURCE_NODE *Dst,
IN PCI_RESOURCE_NODE *Res,
IN BOOLEAN TypeMerge
);
/**
@ -135,9 +111,8 @@ MergeResourceTree (
@param Bridge PCI resource node for bridge.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
CalculateApertureIo16 (
IN PCI_RESOURCE_NODE *Bridge
);
@ -146,11 +121,10 @@ CalculateApertureIo16 (
This function is used to calculate the resource aperture
for a given bridge device.
@param Bridge Give bridge device.
@param Bridge PCI resouce node for given bridge device.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
CalculateResourceAperture (
IN PCI_RESOURCE_NODE *Bridge
);
@ -161,20 +135,19 @@ CalculateResourceAperture (
@param PciDev Pci device instance.
@param IoNode Resource info node for IO .
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
GetResourceFromDevice (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
@ -186,6 +159,10 @@ GetResourceFromDevice (
@param Bar Bar index.
@param ResType Type of resource: IO/Memory.
@param ResUsage Resource usage.
@return PCI resource node created for given PCI device.
NULL means PCI resource node is not created.
**/
PCI_RESOURCE_NODE *
CreateResourceNode (
@ -198,19 +175,18 @@ CreateResourceNode (
);
/**
This routine is used to extract resource request from
This function is used to extract resource request from
device node list.
@param Bridge Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
CreateResourceMap (
IN PCI_IO_DEVICE *Bridge,
IN PCI_RESOURCE_NODE *IoNode,
@ -226,20 +202,19 @@ CreateResourceMap (
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ResourcePaddingPolicy (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
@ -247,17 +222,16 @@ ResourcePaddingPolicy (
doesn't support certain resource. Degradation path is
PMEM64 -> MEM64 -> MEM32
PMEM64 -> PMEM32 -> MEM32
IO32 -> IO16
IO32 -> IO16.
@param Bridge Pci device instance.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
DegradeResource (
IN PCI_IO_DEVICE *Bridge,
IN PCI_RESOURCE_NODE *Mem32Node,
@ -272,7 +246,8 @@ DegradeResource (
@param Bridge Bridge device instance.
@param Decode Decode type according to resource type.
@return whether bridge device support decode resource.
@return TRUE The bridge device support decode resource.
@return FALSE The bridge device don't support decode resource.
**/
BOOLEAN
@ -283,13 +258,15 @@ BridgeSupportResourceDecode (
/**
This function is used to program the resource allocated
for each resource node.
for each resource node under specified bridge.
@param Base Base address of resource to be progammed.
@param Bridge PCI resource node for the bridge device.
@param Base Base address of resource.
@param Bridge Bridge device instance.
@retval EFI_SUCCESS Successfully to program all resouces
on given PCI bridge device.
@retval EFI_OUT_OF_RESOURCES Base is all one.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
ProgramResource (
@ -298,43 +275,40 @@ ProgramResource (
);
/**
Program Bar register.
Program Bar register for PCI device.
@param Base Base address for resource.
@param Base Base address for PCI device resource to be progammed.
@param Node Point to resoure node structure.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ProgramBar (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
);
/**
Program PPB apperture.
Program PCI-PCI bridge apperture.
@param Base Base address for resource.
@param Node Point to resoure node structure.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ProgramPpbApperture (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
);
/**
Program parent bridge for oprom.
Program parent bridge for Option Rom.
@param PciDevice Pci deivce instance.
@param OptionRomBase Base address for oprom.
@param Enable Enable/Disable.
@param OptionRomBase Base address for Optiona Rom.
@param Enable Enable or disable PCI memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ProgrameUpstreamBridgeForRom (
IN PCI_IO_DEVICE *PciDevice,
IN UINT32 OptionRomBase,
@ -346,7 +320,9 @@ ProgrameUpstreamBridgeForRom (
@param Bridge Point to resource node for a bridge.
@return whether resource exists.
@retval TRUE There is resource on the given bridge.
@retval FALSE There isn't resource on the given bridge.
**/
BOOLEAN
ResourceRequestExisted (
@ -356,13 +332,15 @@ ResourceRequestExisted (
/**
Initialize resource pool structure.
@param ResourcePool Point to resource pool structure.
@param ResourcePool Point to resource pool structure. This pool
is reset to all zero when returned.
@param ResourceType Type of resource.
**/
EFI_STATUS
VOID
InitializeResourcePool (
PCI_RESOURCE_NODE *ResourcePool,
PCI_BAR_TYPE ResourceType
IN OUT PCI_RESOURCE_NODE *ResourcePool,
IN PCI_BAR_TYPE ResourceType
);
/**
@ -376,86 +354,66 @@ InitializeResourcePool (
@param PMem64Bridge 64-bit PMemory node.
@param IoPool Link list header for Io resource.
@param Mem32Pool Link list header for 32-bit memory.
@param PMem32Pool Link list header for 32-bit Pmemory.
@param PMem32Pool Link list header for 32-bit Prefetchable memory.
@param Mem64Pool Link list header for 64-bit memory.
@param PMem64Pool Link list header for 64-bit Pmemory.
@param PMem64Pool Link list header for 64-bit Prefetchable memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
GetResourceMap (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE **IoBridge,
PCI_RESOURCE_NODE **Mem32Bridge,
PCI_RESOURCE_NODE **PMem32Bridge,
PCI_RESOURCE_NODE **Mem64Bridge,
PCI_RESOURCE_NODE **PMem64Bridge,
PCI_RESOURCE_NODE *IoPool,
PCI_RESOURCE_NODE *Mem32Pool,
PCI_RESOURCE_NODE *PMem32Pool,
PCI_RESOURCE_NODE *Mem64Pool,
PCI_RESOURCE_NODE *PMem64Pool
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE **IoBridge,
IN PCI_RESOURCE_NODE **Mem32Bridge,
IN PCI_RESOURCE_NODE **PMem32Bridge,
IN PCI_RESOURCE_NODE **Mem64Bridge,
IN PCI_RESOURCE_NODE **PMem64Bridge,
IN PCI_RESOURCE_NODE *IoPool,
IN PCI_RESOURCE_NODE *Mem32Pool,
IN PCI_RESOURCE_NODE *PMem32Pool,
IN PCI_RESOURCE_NODE *Mem64Pool,
IN PCI_RESOURCE_NODE *PMem64Pool
);
/**
Destory given resource tree.
@param Bridge root node of resource tree.
@param Bridge PCI resource root node of resource tree.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
DestroyResourceTree (
IN PCI_RESOURCE_NODE *Bridge
);
/**
Record the reserved resource and insert to reserved list.
@param Base Base address of reserved resourse.
@param Length Length of reserved resource.
@param ResType Resource type.
@param Bridge Pci device instance.
**/
EFI_STATUS
RecordReservedResource (
IN UINT64 Base,
IN UINT64 Length,
IN PCI_BAR_TYPE ResType,
IN PCI_IO_DEVICE *Bridge
);
/**
Insert resource padding for P2C.
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ResourcePaddingForCardBusBridge (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
Program P2C register for given resource node.
Program PCI Card device register for given resource node.
@param Base Base address of P2C device.
@param Base Base address of PCI Card device to be programmed.
@param Node Given resource node.
@retval EFI_SUCCESS Success.
**/
EFI_STATUS
VOID
ProgramP2C (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
@ -467,45 +425,32 @@ ProgramP2C (
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit PMemory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit PMemory.
@retval EFI_SUCCESS Success
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
EFI_STATUS
VOID
ApplyResourcePadding (
PCI_IO_DEVICE *PciDev,
PCI_RESOURCE_NODE *IoNode,
PCI_RESOURCE_NODE *Mem32Node,
PCI_RESOURCE_NODE *PMem32Node,
PCI_RESOURCE_NODE *Mem64Node,
PCI_RESOURCE_NODE *PMem64Node
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
Get padding resource for PPB
Light PCI bus driver woundn't support hotplug root device
So no need to pad resource for them.
Get padding resource for PCI-PCI bridge.
@param PciIoDevice Pci device instance.
@param PciIoDevice PCI-PCI bridge device instance.
@note Feature flag PcdPciBusHotplugDeviceSupport determines
whether need to pad resource for them.
**/
VOID
GetResourcePaddingPpb (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Reset and all bus number from specific bridge.
@param Bridge Parent specific bridge.
@param StartBusNumber start bus number.
**/
EFI_STATUS
ResetAllPpbBusNumber (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber
);
#endif

13
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
View File

@ -1,7 +1,7 @@
/** @file
Option Rom Support for PCI Bus Driver
Set up ROM Table for PCI Bus module.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -13,8 +13,10 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
#include "PciRomTable.h"
//
// PCI ROM image information
//
typedef struct {
EFI_HANDLE ImageHandle;
UINTN Seg;
@ -39,6 +41,7 @@ EFI_PCI_ROM_IMAGE_MAPPING *mRomImageTable = NULL;
@param Func Func NO of PCI space.
@param RomAddress Base address of OptionRom.
@param RomLength Length of rom image.
**/
VOID
PciRomAddImageMapping (
@ -88,12 +91,12 @@ PciRomAddImageMapping (
@param PciIoDevice Device instance.
@retval TRUE Found Image mapping.
@retval FALSE
@retval FALSE Cannot found image mapping.
**/
BOOLEAN
PciRomGetImageMapping (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
)
{
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;

7
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h
View File

@ -1,5 +1,5 @@
/** @file
Option Rom Support for PCI Bus Driver
Set up ROM Table for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
@ -25,6 +25,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@param Func Func NO of PCI space.
@param RomAddress Base address of OptionRom.
@param RomLength Length of rom image.
**/
VOID
PciRomAddImageMapping (
@ -43,12 +44,12 @@ PciRomAddImageMapping (
@param PciIoDevice Device instance.
@retval TRUE Found Image mapping.
@retval FALSE
@retval FALSE Cannot found image mapping.
**/
BOOLEAN
PciRomGetImageMapping (
PCI_IO_DEVICE *PciIoDevice
IN PCI_IO_DEVICE *PciIoDevice
);
#endif

29
IntelFrameworkModulePkg/Include/Library/PciIncompatibleDeviceSupportLib.h
View File

@ -65,7 +65,7 @@ typedef struct {
} EFI_PCI_RESOUCE_DESCRIPTOR;
/**
Checks the incompatible device list for ACPI resource update and return
Check the incompatible device list for ACPI resource update and return
the configuration.
This function searches the incompatible device list according to request
@ -75,10 +75,13 @@ typedef struct {
@param PciDeviceInfo A pointer to PCI device information.
@param Configuration Returned information.
@retval EFI_SUCCESS The incompatible device is supported.
@retval EFI_UNSUPPORTED The incompatible device is not supported.
@retval EFI_SUCCESS If check incompatible device successfully.
@retval EFI_ABORTED No any resource type.
@retval EFI_OUT_OF_RESOURCES No memory available.
@retval EFI_UNSUPPORTED Invalid Tag encounted.
**/
RETURN_STATUS
EFI_STATUS
EFIAPI
PciResourceUpdateCheck (
IN EFI_PCI_DEVICE_INFO *PciDeviceInfo,
@ -86,7 +89,7 @@ PciResourceUpdateCheck (
);
/**
Checks the incompatible device list and return configuration register mask values.
Check the incompatible device list and return configuraton register mask values.
This function searches the incompatible device list according to request
information. If the PCI device belongs to the devices list, corresponding
@ -97,10 +100,11 @@ PciResourceUpdateCheck (
@param Offset The address within the PCI configuration space.
@param Configuration Returned information.
@retval EFI_SUCCESS The incompatible device is supported.
@retval EFI_UNSUPPORTED The incompatible device is not supported.
@retval EFI_SUCCESS If check incompatible device successfully.
@retval EFI_UNSUPPORTED Failed to check incompatibility device.
**/
RETURN_STATUS
EFI_STATUS
EFIAPI
PciRegisterUpdateCheck (
IN EFI_PCI_DEVICE_INFO *PciDeviceInfo,
@ -110,7 +114,7 @@ PciRegisterUpdateCheck (
);
/**
Checks the incompatible device list for access width incompatibility and
Check the incompatible device list for access width incompatibility and
return the configuration
This function searches the incompatible device list for access width
@ -124,10 +128,11 @@ PciRegisterUpdateCheck (
@param AccessWidth Access width needs to check incompatibility.
@param Configuration Returned information.
@retval EFI_SUCCESS The incompatible device is supported.
@retval EFI_UNSUPPORTED The incompatible device is not supported.
@retval EFI_SUCCESS If check incompatible device successfully.
@retval EFI_UNSUPPORTED Failed to check incompatibility device.
**/
RETURN_STATUS
EFI_STATUS
EFIAPI
PciRegisterAccessCheck (
IN EFI_PCI_DEVICE_INFO *PciDeviceInfo,

138
IntelFrameworkModulePkg/Library/PciIncompatibleDeviceSupportLib/IncompatiblePciDeviceList.h
View File

@ -1,7 +1,7 @@
/** @file
The incompatible PCI device list
The incompatible PCI device list template.
Copyright (c) 2006 - 2007, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -19,7 +19,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Library/MemoryAllocationLib.h>
#include <Library/DebugLib.h>
#include <IndustryStandard/Pci22.h>
#include <IndustryStandard/Pci.h>
#include <IndustryStandard/Acpi.h>
@ -51,11 +51,10 @@ typedef struct {
EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;
} EFI_PCI_REGISTER_VALUE_DESCRIPTOR;
//
// the incompatible PCI devices list for ACPI resource
//
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 gIncompatiblePciDeviceListForResource[] = {
//
// DEVICE_INF_TAG,
// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
@ -63,76 +62,37 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
// ResType, GFlag , SFlag, Granularity, RangeMin,
// RangeMax, Offset, AddrLen
//
//
// Device Adaptec 9004
// Sample Device 1
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//DEVICE_INF_TAG,
//PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
//DEVICE_RES_TAG,
//PCI_BAR_TYPE_IO,
//PCI_ACPI_UNUSED,
//PCI_ACPI_UNUSED,
//PCI_ACPI_UNUSED,
//PCI_ACPI_UNUSED,
//PCI_BAR_EVEN_ALIGN,
//PCI_BAR_ALL,
//PCI_BAR_NOCHANGE,
//
// Device Adaptec 9005
// Sample Device 2
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// Device QLogic 1007
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// Device Agilent 103C
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// Device Agilent 15BC
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//DEVICE_INF_TAG,
//PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
//DEVICE_RES_TAG,
//PCI_BAR_TYPE_IO,
//PCI_ACPI_UNUSED,
//PCI_ACPI_UNUSED,
//PCI_ACPI_UNUSED,
//PCI_ACPI_UNUSED,
//PCI_BAR_EVEN_ALIGN,
//PCI_BAR_ALL,
//PCI_BAR_NOCHANGE,
//
// The end of the list
//
@ -142,7 +102,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
//
// the incompatible PCI devices list for the values of configuration registers
//
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 gIncompatiblePciDeviceListForRegister[] = {
//
// DEVICE_INF_TAG,
// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
@ -151,26 +111,26 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
// AND_VALUE, OR_VALUE
//
// Device Lava 0x1407, DeviceId 0x0110
// Sample Device 1
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_REGISTER_READ,
PCI_CAPBILITY_POINTER_OFFSET,
0xffffff00,
VALUE_NOCARE,
//DEVICE_INF_TAG,
//PCI_DEVICE_ID(0xXXXX, 0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
//DEVICE_RES_TAG,
//PCI_REGISTER_READ,
//PCI_CAPBILITY_POINTER_OFFSET,
//0xffffff00,
//VALUE_NOCARE,
//
// Device Lava 0x1407, DeviceId 0x0111
// Sample Device 2
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_REGISTER_READ,
PCI_CAPBILITY_POINTER_OFFSET,
0xffffff00,
VALUE_NOCARE,
//DEVICE_INF_TAG,
//PCI_DEVICE_ID(0xXXXX, 0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
//DEVICE_RES_TAG,
//PCI_REGISTER_READ,
//PCI_CAPBILITY_POINTER_OFFSET,
//0xffffff00,
//VALUE_NOCARE,
//
// The end of the list
@ -181,7 +141,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
//
// the incompatible PCI devices list for the access width of configuration registers
//
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 gDeviceListForAccessWidth[] = {
//
// DEVICE_INF_TAG,
// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),

56
IntelFrameworkModulePkg/Library/PciIncompatibleDeviceSupportLib/PciIncompatibleDeviceSupportLib.c
View File

@ -1,7 +1,7 @@
/** @file
The implementation of PCI incompatible device support libary.
The template of PCI incompatible device support libary.
Copyright (c) 2006 - 2007, Intel Corporation
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -14,13 +14,19 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "IncompatiblePciDeviceList.h"
EFI_PCI_REGISTER_ACCESS_DATA mPciRegisterAccessData = {0, 0, 0};
EFI_PCI_REGISTER_VALUE_DATA mPciRegisterValueData = {0, 0};
/**
Check whether two PCI devices matched
Check whether two PCI devices matched.
@param PciDeviceInfo A pointer to EFI_PCI_DEVICE_INFO.
@param Header A pointer to EFI_PCI_DEVICE_INFO.
@retval returns EFI_SUCCESS if two PCI device matched.
@retval EFI_SUCCESS Two PCI devices matched.
@retval EFI_UNSUPPORTED Two PCI devices don't match.
**/
EFI_STATUS
DeviceCheck (
@ -67,7 +73,7 @@ DeviceCheck (
/**
Check the incompatible device list for ACPI resource update and return
the configuration
the configuration.
This function searches the incompatible device list according to request
information. If the PCI device belongs to the devices list, corresponding
@ -76,10 +82,13 @@ DeviceCheck (
@param PciDeviceInfo A pointer to PCI device information.
@param Configuration Returned information.
@retval returns EFI_SUCCESS if check incompatible device ok.
Otherwise return EFI_UNSUPPORTED.
@retval EFI_SUCCESS If check incompatible device successfully.
@retval EFI_ABORTED No any resource type.
@retval EFI_OUT_OF_RESOURCES No memory available.
@retval EFI_UNSUPPORTED Invalid Tag encounted.
**/
RETURN_STATUS
EFI_STATUS
EFIAPI
PciResourceUpdateCheck (
IN EFI_PCI_DEVICE_INFO *PciDeviceInfo,
@ -103,7 +112,7 @@ PciResourceUpdateCheck (
//
* (VOID **) Configuration = NULL;
ListPtr = IncompatiblePciDeviceListForResource;
ListPtr = gIncompatiblePciDeviceListForResource;
while (*ListPtr != LIST_END_TAG) {
Tag = *ListPtr;
@ -204,10 +213,11 @@ PciResourceUpdateCheck (
@param Offset The address within the PCI configuration space.
@param Configuration Returned information.
@retval returns EFI_SUCCESS if check incompatible device ok.
Otherwise return EFI_UNSUPPORTED.
@retval EFI_SUCCESS If check incompatible device successfully.
@retval EFI_UNSUPPORTED Failed to check incompatibility device.
**/
RETURN_STATUS
EFI_STATUS
EFIAPI
PciRegisterUpdateCheck (
IN EFI_PCI_DEVICE_INFO *PciDeviceInfo,
@ -224,7 +234,7 @@ PciRegisterUpdateCheck (
ASSERT (PciDeviceInfo != NULL);
ListPtr = IncompatiblePciDeviceListForRegister;
ListPtr = gIncompatiblePciDeviceListForRegister;
//
// Initialize the return value to NULL
@ -257,10 +267,8 @@ PciRegisterUpdateCheck (
if (((EFI_PCI_REGISTER_VALUE_DESCRIPTOR *)ListPtr)->AccessType == AccessType) {
Dsc = (EFI_PCI_REGISTER_VALUE_DATA *) (ListPtr + 2);
RegisterPtr = AllocateZeroPool (sizeof (EFI_PCI_REGISTER_VALUE_DATA));
if (RegisterPtr == NULL) {
return EFI_SUCCESS;
}
RegisterPtr = &mPciRegisterValueData;
RegisterPtr->AndValue = Dsc->AndValue;
RegisterPtr->OrValue = Dsc->OrValue;
@ -304,10 +312,11 @@ PciRegisterUpdateCheck (
@param AccessWidth Access width needs to check incompatibility.
@param Configuration Returned information.
@retval returns EFI_SUCCESS if check incompatible device ok.
Otherwise return EFI_UNSUPPORTED.
@retval EFI_SUCCESS If check incompatible device successfully.
@retval EFI_UNSUPPORTED Failed to check incompatibility device.
**/
RETURN_STATUS
EFI_STATUS
EFIAPI
PciRegisterAccessCheck (
IN EFI_PCI_DEVICE_INFO *PciDeviceInfo,
@ -325,7 +334,7 @@ PciRegisterAccessCheck (
ASSERT (PciDeviceInfo != NULL);
ListPtr = DeviceListForAccessWidth;
ListPtr = gDeviceListForAccessWidth;
//
// Initialize the return value to NULL
@ -361,10 +370,7 @@ PciRegisterAccessCheck (
if((Dsc->StartOffset <= Offset) && (Dsc->EndOffset > Offset)) {
RegisterPtr = AllocateZeroPool (sizeof (EFI_PCI_REGISTER_ACCESS_DATA));
if (RegisterPtr == NULL) {
return EFI_OUT_OF_RESOURCES;
}
RegisterPtr = &mPciRegisterAccessData;
RegisterPtr->StartOffset = Dsc->StartOffset;
RegisterPtr->EndOffset = Dsc->EndOffset;

4
IntelFrameworkModulePkg/Library/PciIncompatibleDeviceSupportLib/PciIncompatibleDeviceSupportLib.inf
View File

@ -1,7 +1,7 @@
#/** @file
# PCI Incompatible device support Library
# PCI Incompatible device support Library template.
#
# Check PCI incompatible devices and set necessary configuration
# Check PCI incompatible devices and set necessary configuration.
# Copyright (c) 2007 - 2009, Intel Corporation.
#
# All rights reserved. This program and the accompanying materials