Import two CPU Exception Handler Library instances: SecPeiCpuExceptionHandler.inf and DxeSmmCpuExceptionHandler.inf.
Signed-off-by: vanjeff Reviewed-by: jyao1 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13098 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff
@@ -0,0 +1,164 @@
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/** @file
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IA32 CPU Exception Hanlder functons.
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Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuExceptionCommon.h"
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/**
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Internal function to setup CPU exception handlers.
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**/
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VOID
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InternalSetupCpuExceptionHandlers (
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VOID
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)
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{
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IA32_DESCRIPTOR IdtDescriptor;
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UINTN IdtSize;
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EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap;
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UINT16 CodeSegment;
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IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
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UINTN Index;
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UINTN InterruptHandler;;
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//
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// Read IDT descriptor and calculate IDT size
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//
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AsmReadIdtr (&IdtDescriptor);
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IdtSize = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
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if (IdtSize > CPU_EXCEPTION_NUM) {
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//
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// CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most
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//
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IdtSize = CPU_EXCEPTION_NUM;
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}
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//
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// Use current CS as the segment selector of interrupt gate in IDT
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//
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CodeSegment = AsmReadCs ();
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IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
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GetTemplateAddressMap (&TemplateMap);
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for (Index = 0; Index < IdtSize; Index ++) {
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InterruptHandler = TemplateMap.ExceptionStart + Index * TemplateMap.ExceptionStubHeaderSize;
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IdtEntry[Index].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
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IdtEntry[Index].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
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IdtEntry[Index].Bits.Selector = CodeSegment;
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IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
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}
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}
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/**
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Dump CPU content information.
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@param ExceptionType Exception type.
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@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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**/
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VOID
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DumpCpuContent (
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IN UINTN ExceptionType,
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IN EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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UINTN ImageBase;
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UINTN EntryPoint;
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InternalPrintMessage (
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"!!!! IA32 Exception Type - %08x CPU Apic ID - %08x !!!!\n",
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ExceptionType,
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GetApicId ()
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);
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InternalPrintMessage (
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"EIP - %08x, CS - %08x, EFLAGS - %08x\n",
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SystemContext.SystemContextIa32->Eip,
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SystemContext.SystemContextIa32->Cs,
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SystemContext.SystemContextIa32->Eflags
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);
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if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {
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InternalPrintMessage (
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"ExceptionData - %08x\n",
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SystemContext.SystemContextIa32->ExceptionData
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);
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}
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InternalPrintMessage (
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"EAX - %08x, ECX - %08x, EDX - %08x, EBX - %08x\n",
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SystemContext.SystemContextIa32->Eax,
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SystemContext.SystemContextIa32->Ecx,
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SystemContext.SystemContextIa32->Edx,
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SystemContext.SystemContextIa32->Ebx
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);
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InternalPrintMessage (
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"ESP - %08x, EBP - %08x, ESI - %08x, EDI - %08x\n",
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SystemContext.SystemContextIa32->Esp,
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SystemContext.SystemContextIa32->Ebp,
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SystemContext.SystemContextIa32->Esi,
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SystemContext.SystemContextIa32->Edi
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);
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InternalPrintMessage (
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"DS - %08x, ES - %08x, FS - %08x, GS - %08x, SS - %08x\n",
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SystemContext.SystemContextIa32->Ds,
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SystemContext.SystemContextIa32->Es,
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SystemContext.SystemContextIa32->Fs,
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SystemContext.SystemContextIa32->Gs,
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SystemContext.SystemContextIa32->Ss
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);
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InternalPrintMessage (
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"CR0 - %08x, CR2 - %08x, CR3 - %08x, CR4 - %08x\n",
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SystemContext.SystemContextIa32->Cr0,
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SystemContext.SystemContextIa32->Cr2,
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SystemContext.SystemContextIa32->Cr3,
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SystemContext.SystemContextIa32->Cr4
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);
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InternalPrintMessage (
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"DR0 - %08x, DR1 - %08x, DR2 - %08x, DR3 - %08x\n",
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SystemContext.SystemContextIa32->Dr0,
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SystemContext.SystemContextIa32->Dr1,
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SystemContext.SystemContextIa32->Dr2,
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SystemContext.SystemContextIa32->Dr3
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);
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InternalPrintMessage (
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"DR6 - %08x, DR7 - %08x\n",
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SystemContext.SystemContextIa32->Dr6,
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SystemContext.SystemContextIa32->Dr7
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);
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InternalPrintMessage (
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"GDTR - %08x %08x, IDTR - %08x %08x\n",
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SystemContext.SystemContextIa32->Gdtr[0],
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SystemContext.SystemContextIa32->Gdtr[1],
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SystemContext.SystemContextIa32->Idtr[0],
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SystemContext.SystemContextIa32->Idtr[1]
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);
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InternalPrintMessage (
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"LDTR - %08x, TR - %08x\n",
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SystemContext.SystemContextIa32->Ldtr,
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SystemContext.SystemContextIa32->Tr
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);
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InternalPrintMessage (
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"FXSAVE_STATE - %08x\n",
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&SystemContext.SystemContextIa32->FxSaveState
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);
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//
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// Find module image base and module entry point by RIP
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//
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ImageBase = FindModuleImageBase (SystemContext.SystemContextIa32->Eip, &EntryPoint);
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if (ImageBase != 0) {
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InternalPrintMessage (
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" (ImageBase=%08x, EntryPoint=%08x) !!!!\n",
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ImageBase,
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EntryPoint
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);
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}
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}
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@@ -0,0 +1,467 @@
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#------------------------------------------------------------------------------
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#*
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#* Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
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#* This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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#* http://opensource.org/licenses/bsd-license.php
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* ExceptionHandlerAsm.S
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#*
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#* Abstract:
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#*
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#* IA32 CPU Exception Handler
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#
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#------------------------------------------------------------------------------
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#.MMX
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#.XMM
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ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
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.text
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#
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# exception handler stub table
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#
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Exception0Handle:
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pushl $0
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jmp ASM_PFX(CommonInterruptEntry)
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Exception1Handle:
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pushl $1
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jmp ASM_PFX(CommonInterruptEntry)
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Exception2Handle:
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pushl $2
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jmp ASM_PFX(CommonInterruptEntry)
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Exception3Handle:
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pushl $3
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jmp ASM_PFX(CommonInterruptEntry)
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Exception4Handle:
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pushl $4
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jmp ASM_PFX(CommonInterruptEntry)
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Exception5Handle:
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pushl $5
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jmp ASM_PFX(CommonInterruptEntry)
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Exception6Handle:
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pushl $6
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jmp ASM_PFX(CommonInterruptEntry)
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Exception7Handle:
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pushl $7
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jmp ASM_PFX(CommonInterruptEntry)
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Exception8Handle:
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pushl $8
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jmp ASM_PFX(CommonInterruptEntry)
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Exception9Handle:
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pushl $9
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jmp ASM_PFX(CommonInterruptEntry)
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Exception10Handle:
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pushl $10
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jmp ASM_PFX(CommonInterruptEntry)
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Exception11Handle:
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pushl $11
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jmp ASM_PFX(CommonInterruptEntry)
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Exception12Handle:
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pushl $12
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jmp ASM_PFX(CommonInterruptEntry)
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Exception13Handle:
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pushl $13
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jmp ASM_PFX(CommonInterruptEntry)
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Exception14Handle:
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pushl $14
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jmp ASM_PFX(CommonInterruptEntry)
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Exception15Handle:
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pushl $15
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jmp ASM_PFX(CommonInterruptEntry)
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Exception16Handle:
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pushl $16
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jmp ASM_PFX(CommonInterruptEntry)
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Exception17Handle:
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pushl $17
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jmp ASM_PFX(CommonInterruptEntry)
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Exception18Handle:
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pushl $18
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jmp ASM_PFX(CommonInterruptEntry)
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Exception19Handle:
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pushl $19
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jmp ASM_PFX(CommonInterruptEntry)
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Exception20Handle:
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pushl $20
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jmp ASM_PFX(CommonInterruptEntry)
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Exception21Handle:
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pushl $21
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jmp ASM_PFX(CommonInterruptEntry)
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Exception22Handle:
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pushl $22
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jmp ASM_PFX(CommonInterruptEntry)
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Exception23Handle:
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pushl $23
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jmp ASM_PFX(CommonInterruptEntry)
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Exception24Handle:
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pushl $24
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jmp ASM_PFX(CommonInterruptEntry)
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Exception25Handle:
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pushl $25
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jmp ASM_PFX(CommonInterruptEntry)
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Exception26Handle:
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pushl $26
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jmp ASM_PFX(CommonInterruptEntry)
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Exception27Handle:
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pushl $27
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jmp ASM_PFX(CommonInterruptEntry)
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Exception28Handle:
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pushl $28
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jmp ASM_PFX(CommonInterruptEntry)
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Exception29Handle:
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pushl $29
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jmp ASM_PFX(CommonInterruptEntry)
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Exception30Handle:
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pushl $30
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jmp ASM_PFX(CommonInterruptEntry)
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Exception31Handle:
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pushl $31
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jmp ASM_PFX(CommonInterruptEntry)
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#---------------------------------------;
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# CommonInterruptEntry ;
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#---------------------------------------;
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# The follow algorithm is used for the common interrupt routine.
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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ASM_PFX(CommonInterruptEntry):
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cli
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#
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# All interrupt handlers are invoked through interrupt gates, so
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# IF flag automatically cleared at the entry point
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#
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#
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# Calculate vector number
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#
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# Get the return address of call, actually, it is the
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# address of vector number.
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#
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xchgl (%esp), %ecx
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andl $0x0FFFF, %ecx
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cmpl $32, %ecx # Intel reserved vector for exceptions?
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jae NoErrorCode
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bt %ecx, ASM_PFX(mErrorCodeFlag)
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jc HasErrorCode
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NoErrorCode:
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + ECX +
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# +---------------------+ <-- ESP
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#
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# Registers:
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# ECX - Vector Number
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#
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#
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# Put Vector Number on stack
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#
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pushl %ecx
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#
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# Put 0 (dummy) error code on stack, and restore ECX
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#
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xorl %ecx, %ecx # ECX = 0
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xchgl 4(%esp), %ecx
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jmp ErrorCodeAndVectorOnStack
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HasErrorCode:
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + ECX +
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# +---------------------+ <-- ESP
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#
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# Registers:
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# ECX - Vector Number
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#
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#
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# Put Vector Number on stack and restore ECX
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#
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xchgl (%esp), %ecx
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#
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# Fall through to join main routine code
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# at ErrorCodeAndVectorOnStack
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#
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CommonInterruptEntry_al_0000:
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jmp CommonInterruptEntry_al_0000
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ErrorCodeAndVectorOnStack:
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pushl %ebp
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movl %esp, %ebp
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|
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
|
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# + EIP +
|
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + Vector Number +
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# +---------------------+
|
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# + EBP +
|
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# +---------------------+ <-- EBP
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#
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|
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#
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# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
|
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# is 16-byte aligned
|
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#
|
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andl $0x0fffffff0, %esp
|
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subl $12, %esp
|
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|
||||
#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
|
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pushl %eax
|
||||
pushl %ecx
|
||||
pushl %edx
|
||||
pushl %ebx
|
||||
leal 24(%ebp), %ecx
|
||||
pushl %ecx # ESP
|
||||
pushl (%ebp) # EBP
|
||||
pushl %esi
|
||||
pushl %edi
|
||||
|
||||
#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
movl %ss, %eax
|
||||
pushl %eax
|
||||
movzwl 16(%ebp), %eax
|
||||
pushl %eax
|
||||
movl %ds, %eax
|
||||
pushl %eax
|
||||
movl %es, %eax
|
||||
pushl %eax
|
||||
movl %fs, %eax
|
||||
pushl %eax
|
||||
movl %gs, %eax
|
||||
pushl %eax
|
||||
|
||||
#; UINT32 Eip;
|
||||
movl 12(%ebp), %eax
|
||||
pushl %eax
|
||||
|
||||
#; UINT32 Gdtr[2], Idtr[2];
|
||||
subl $8, %esp
|
||||
sidt (%esp)
|
||||
movl 2(%esp), %eax
|
||||
xchgl (%esp), %eax
|
||||
andl $0x0FFFF, %eax
|
||||
movl %eax, 4(%esp)
|
||||
|
||||
subl $8, %esp
|
||||
sgdt (%esp)
|
||||
movl 2(%esp), %eax
|
||||
xchgl (%esp), %eax
|
||||
andl $0x0FFFF, %eax
|
||||
movl %eax, 4(%esp)
|
||||
|
||||
#; UINT32 Ldtr, Tr;
|
||||
xorl %eax, %eax
|
||||
str %ax
|
||||
pushl %eax
|
||||
sldt %ax
|
||||
pushl %eax
|
||||
|
||||
#; UINT32 EFlags;
|
||||
movl 20(%ebp), %eax
|
||||
pushl %eax
|
||||
|
||||
#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
||||
movl %cr4, %eax
|
||||
orl $0x208, %eax
|
||||
movl %eax, %cr4
|
||||
pushl %eax
|
||||
movl %cr3, %eax
|
||||
pushl %eax
|
||||
movl %cr2, %eax
|
||||
pushl %eax
|
||||
xorl %eax, %eax
|
||||
pushl %eax
|
||||
movl %cr0, %eax
|
||||
pushl %eax
|
||||
|
||||
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
movl %dr7, %eax
|
||||
pushl %eax
|
||||
movl %dr6, %eax
|
||||
pushl %eax
|
||||
movl %dr3, %eax
|
||||
pushl %eax
|
||||
movl %dr2, %eax
|
||||
pushl %eax
|
||||
movl %dr1, %eax
|
||||
pushl %eax
|
||||
movl %dr0, %eax
|
||||
pushl %eax
|
||||
|
||||
#; FX_SAVE_STATE_IA32 FxSaveState;
|
||||
subl $512, %esp
|
||||
movl %esp, %edi
|
||||
.byte 0x0f, 0x0ae, 0x07 #fxsave [edi]
|
||||
|
||||
#; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
|
||||
cld
|
||||
|
||||
#; UINT32 ExceptionData;
|
||||
pushl 8(%ebp)
|
||||
|
||||
#; Prepare parameter and call
|
||||
movl %esp, %edx
|
||||
pushl %edx
|
||||
movl 4(%ebp), %edx
|
||||
pushl %edx
|
||||
|
||||
#
|
||||
# Call External Exception Handler
|
||||
#
|
||||
call ASM_PFX(CommonExceptionHandler)
|
||||
addl $8, %esp
|
||||
|
||||
cli
|
||||
#; UINT32 ExceptionData;
|
||||
addl $4, %esp
|
||||
|
||||
#; FX_SAVE_STATE_IA32 FxSaveState;
|
||||
movl %esp, %esi
|
||||
.byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]
|
||||
addl $512, %esp
|
||||
|
||||
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
#; Skip restoration of DRx registers to support in-circuit emualators
|
||||
#; or debuggers set breakpoint in interrupt/exception context
|
||||
addl $24, %esp
|
||||
|
||||
#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
||||
popl %eax
|
||||
movl %eax, %cr0
|
||||
addl $4, %esp # not for Cr1
|
||||
popl %eax
|
||||
movl %eax, %cr2
|
||||
popl %eax
|
||||
movl %eax, %cr3
|
||||
popl %eax
|
||||
movl %eax, %cr4
|
||||
|
||||
#; UINT32 EFlags;
|
||||
popl 20(%ebp)
|
||||
|
||||
#; UINT32 Ldtr, Tr;
|
||||
#; UINT32 Gdtr[2], Idtr[2];
|
||||
#; Best not let anyone mess with these particular registers...
|
||||
addl $24, %esp
|
||||
|
||||
#; UINT32 Eip;
|
||||
popl 12(%ebp)
|
||||
|
||||
#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
#; NOTE - modified segment registers could hang the debugger... We
|
||||
#; could attempt to insulate ourselves against this possibility,
|
||||
#; but that poses risks as well.
|
||||
#;
|
||||
popl %gs
|
||||
popl %fs
|
||||
popl %es
|
||||
popl %ds
|
||||
popl 16(%ebp)
|
||||
popl %ss
|
||||
|
||||
#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
|
||||
popl %edi
|
||||
popl %esi
|
||||
addl $4, %esp # not for ebp
|
||||
addl $4, %esp # not for esp
|
||||
popl %ebx
|
||||
popl %edx
|
||||
popl %ecx
|
||||
popl %eax
|
||||
|
||||
movl %ebp, %esp
|
||||
popl %ebp
|
||||
addl $8, %esp
|
||||
iretl
|
||||
|
||||
|
||||
#---------------------------------------;
|
||||
# _GetTemplateAddressMap ;
|
||||
#----------------------------------------------------------------------------;
|
||||
#
|
||||
# Protocol prototype
|
||||
# GetTemplateAddressMap (
|
||||
# EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
|
||||
# );
|
||||
#
|
||||
# Routine Description:
|
||||
#
|
||||
# Return address map of interrupt handler template so that C code can generate
|
||||
# interrupt table.
|
||||
#
|
||||
# Arguments:
|
||||
#
|
||||
#
|
||||
# Returns:
|
||||
#
|
||||
# Nothing
|
||||
#
|
||||
#
|
||||
# Input: [ebp][0] = Original ebp
|
||||
# [ebp][4] = Return address
|
||||
#
|
||||
# Output: Nothing
|
||||
#
|
||||
# Destroys: Nothing
|
||||
#-----------------------------------------------------------------------------;
|
||||
#-------------------------------------------------------------------------------------
|
||||
# AsmGetAddressMap (&AddressMap);
|
||||
#-------------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(GetTemplateAddressMap)
|
||||
ASM_PFX(GetTemplateAddressMap):
|
||||
|
||||
pushl %ebp
|
||||
movl %esp,%ebp
|
||||
pushal
|
||||
|
||||
movl 0x8(%ebp), %ebx
|
||||
movl $Exception0Handle, (%ebx)
|
||||
movl $(Exception1Handle - Exception0Handle), 0x4(%ebx)
|
||||
|
||||
popal
|
||||
popl %ebp
|
||||
ret
|
||||
|
||||
@@ -0,0 +1,471 @@
|
||||
;------------------------------------------------------------------------------ ;
|
||||
; Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Module Name:
|
||||
;
|
||||
; ExceptionHandlerAsm.Asm
|
||||
;
|
||||
; Abstract:
|
||||
;
|
||||
; IA32 CPU Exception Handler
|
||||
;
|
||||
; Notes:
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.686
|
||||
.model flat,C
|
||||
|
||||
;
|
||||
; CommonExceptionHandler()
|
||||
;
|
||||
CommonExceptionHandler PROTO C
|
||||
|
||||
.data
|
||||
|
||||
CommonEntryAddr DD CommonInterruptEntry
|
||||
|
||||
EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
|
||||
|
||||
.code
|
||||
|
||||
;
|
||||
; exception handler stub table
|
||||
;
|
||||
Exception0Handle:
|
||||
push 0
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception1Handle:
|
||||
push 1
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception2Handle:
|
||||
push 2
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception3Handle:
|
||||
push 3
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception4Handle:
|
||||
push 4
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception5Handle:
|
||||
push 5
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception6Handle:
|
||||
push 6
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception7Handle:
|
||||
push 7
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception8Handle:
|
||||
push 8
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception9Handle:
|
||||
push 9
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception10Handle:
|
||||
push 10
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception11Handle:
|
||||
push 11
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception12Handle:
|
||||
push 12
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception13Handle:
|
||||
push 13
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception14Handle:
|
||||
push 14
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception15Handle:
|
||||
push 15
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception16Handle:
|
||||
push 16
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception17Handle:
|
||||
push 17
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception18Handle:
|
||||
push 18
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception19Handle:
|
||||
push 19
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception20Handle:
|
||||
push 20
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception21Handle:
|
||||
push 21
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception22Handle:
|
||||
push 22
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception23Handle:
|
||||
push 23
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception24Handle:
|
||||
push 24
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception25Handle:
|
||||
push 25
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception26Handle:
|
||||
push 26
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception27Handle:
|
||||
push 27
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception28Handle:
|
||||
push 28
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception29Handle:
|
||||
push 29
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception30Handle:
|
||||
push 30
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
Exception31Handle:
|
||||
push 31
|
||||
jmp dword ptr [CommonEntryAddr]
|
||||
|
||||
;----------------------------------------------------------------------------;
|
||||
; CommonInterruptEntry ;
|
||||
;----------------------------------------------------------------------------;
|
||||
; The follow algorithm is used for the common interrupt routine.
|
||||
; Entry from each interrupt with a push eax and eax=interrupt number
|
||||
|
||||
CommonInterruptEntry PROC PUBLIC
|
||||
cli
|
||||
;
|
||||
; All interrupt handlers are invoked through interrupt gates, so
|
||||
; IF flag automatically cleared at the entry point
|
||||
;
|
||||
|
||||
;
|
||||
; Calculate vector number
|
||||
;
|
||||
; Get the return address of call, actually, it is the
|
||||
; address of vector number.
|
||||
;
|
||||
xchg ecx, [esp]
|
||||
and ecx, 0FFFFh
|
||||
cmp ecx, 32 ; Intel reserved vector for exceptions?
|
||||
jae NoErrorCode
|
||||
bt mErrorCodeFlag, ecx
|
||||
jc HasErrorCode
|
||||
|
||||
NoErrorCode:
|
||||
|
||||
;
|
||||
; Stack:
|
||||
; +---------------------+
|
||||
; + EFlags +
|
||||
; +---------------------+
|
||||
; + CS +
|
||||
; +---------------------+
|
||||
; + EIP +
|
||||
; +---------------------+
|
||||
; + ECX +
|
||||
; +---------------------+ <-- ESP
|
||||
;
|
||||
; Registers:
|
||||
; ECX - Vector Number
|
||||
;
|
||||
|
||||
;
|
||||
; Put Vector Number on stack
|
||||
;
|
||||
push ecx
|
||||
|
||||
;
|
||||
; Put 0 (dummy) error code on stack, and restore ECX
|
||||
;
|
||||
xor ecx, ecx ; ECX = 0
|
||||
xchg ecx, [esp+4]
|
||||
|
||||
jmp ErrorCodeAndVectorOnStack
|
||||
|
||||
HasErrorCode:
|
||||
|
||||
;
|
||||
; Stack:
|
||||
; +---------------------+
|
||||
; + EFlags +
|
||||
; +---------------------+
|
||||
; + CS +
|
||||
; +---------------------+
|
||||
; + EIP +
|
||||
; +---------------------+
|
||||
; + Error Code +
|
||||
; +---------------------+
|
||||
; + ECX +
|
||||
; +---------------------+ <-- ESP
|
||||
;
|
||||
; Registers:
|
||||
; ECX - Vector Number
|
||||
;
|
||||
|
||||
;
|
||||
; Put Vector Number on stack and restore ECX
|
||||
;
|
||||
xchg ecx, [esp]
|
||||
|
||||
;
|
||||
; Fall through to join main routine code
|
||||
; at ErrorCodeAndVectorOnStack
|
||||
;
|
||||
@@:
|
||||
jmp @B
|
||||
|
||||
ErrorCodeAndVectorOnStack:
|
||||
push ebp
|
||||
mov ebp, esp
|
||||
|
||||
;
|
||||
; Stack:
|
||||
; +---------------------+
|
||||
; + EFlags +
|
||||
; +---------------------+
|
||||
; + CS +
|
||||
; +---------------------+
|
||||
; + EIP +
|
||||
; +---------------------+
|
||||
; + Error Code +
|
||||
; +---------------------+
|
||||
; + Vector Number +
|
||||
; +---------------------+
|
||||
; + EBP +
|
||||
; +---------------------+ <-- EBP
|
||||
;
|
||||
|
||||
;
|
||||
; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
|
||||
; is 16-byte aligned
|
||||
;
|
||||
and esp, 0fffffff0h
|
||||
sub esp, 12
|
||||
|
||||
;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
|
||||
push eax
|
||||
push ecx
|
||||
push edx
|
||||
push ebx
|
||||
lea ecx, [ebp + 6 * 4]
|
||||
push ecx ; ESP
|
||||
push dword ptr [ebp] ; EBP
|
||||
push esi
|
||||
push edi
|
||||
|
||||
;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
mov eax, ss
|
||||
push eax
|
||||
movzx eax, word ptr [ebp + 4 * 4]
|
||||
push eax
|
||||
mov eax, ds
|
||||
push eax
|
||||
mov eax, es
|
||||
push eax
|
||||
mov eax, fs
|
||||
push eax
|
||||
mov eax, gs
|
||||
push eax
|
||||
|
||||
;; UINT32 Eip;
|
||||
mov eax, [ebp + 3 * 4]
|
||||
push eax
|
||||
|
||||
;; UINT32 Gdtr[2], Idtr[2];
|
||||
sub esp, 8
|
||||
sidt [esp]
|
||||
mov eax, [esp + 2]
|
||||
xchg eax, [esp]
|
||||
and eax, 0FFFFh
|
||||
mov [esp+4], eax
|
||||
|
||||
sub esp, 8
|
||||
sgdt [esp]
|
||||
mov eax, [esp + 2]
|
||||
xchg eax, [esp]
|
||||
and eax, 0FFFFh
|
||||
mov [esp+4], eax
|
||||
|
||||
;; UINT32 Ldtr, Tr;
|
||||
xor eax, eax
|
||||
str ax
|
||||
push eax
|
||||
sldt ax
|
||||
push eax
|
||||
|
||||
;; UINT32 EFlags;
|
||||
mov eax, [ebp + 5 * 4]
|
||||
push eax
|
||||
|
||||
;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
||||
mov eax, cr4
|
||||
or eax, 208h
|
||||
mov cr4, eax
|
||||
push eax
|
||||
mov eax, cr3
|
||||
push eax
|
||||
mov eax, cr2
|
||||
push eax
|
||||
xor eax, eax
|
||||
push eax
|
||||
mov eax, cr0
|
||||
push eax
|
||||
|
||||
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
mov eax, dr7
|
||||
push eax
|
||||
mov eax, dr6
|
||||
push eax
|
||||
mov eax, dr3
|
||||
push eax
|
||||
mov eax, dr2
|
||||
push eax
|
||||
mov eax, dr1
|
||||
push eax
|
||||
mov eax, dr0
|
||||
push eax
|
||||
|
||||
;; FX_SAVE_STATE_IA32 FxSaveState;
|
||||
sub esp, 512
|
||||
mov edi, esp
|
||||
db 0fh, 0aeh, 07h ;fxsave [edi]
|
||||
|
||||
;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
|
||||
cld
|
||||
|
||||
;; UINT32 ExceptionData;
|
||||
push dword ptr [ebp + 2 * 4]
|
||||
|
||||
;; Prepare parameter and call
|
||||
mov edx, esp
|
||||
push edx
|
||||
mov edx, dword ptr [ebp + 1 * 4]
|
||||
push edx
|
||||
|
||||
;
|
||||
; Call External Exception Handler
|
||||
;
|
||||
mov eax, CommonExceptionHandler
|
||||
call eax
|
||||
add esp, 8
|
||||
|
||||
cli
|
||||
;; UINT32 ExceptionData;
|
||||
add esp, 4
|
||||
|
||||
;; FX_SAVE_STATE_IA32 FxSaveState;
|
||||
mov esi, esp
|
||||
db 0fh, 0aeh, 0eh ; fxrstor [esi]
|
||||
add esp, 512
|
||||
|
||||
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
;; Skip restoration of DRx registers to support in-circuit emualators
|
||||
;; or debuggers set breakpoint in interrupt/exception context
|
||||
add esp, 4 * 6
|
||||
|
||||
;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
||||
pop eax
|
||||
mov cr0, eax
|
||||
add esp, 4 ; not for Cr1
|
||||
pop eax
|
||||
mov cr2, eax
|
||||
pop eax
|
||||
mov cr3, eax
|
||||
pop eax
|
||||
mov cr4, eax
|
||||
|
||||
;; UINT32 EFlags;
|
||||
pop dword ptr [ebp + 5 * 4]
|
||||
|
||||
;; UINT32 Ldtr, Tr;
|
||||
;; UINT32 Gdtr[2], Idtr[2];
|
||||
;; Best not let anyone mess with these particular registers...
|
||||
add esp, 24
|
||||
|
||||
;; UINT32 Eip;
|
||||
pop dword ptr [ebp + 3 * 4]
|
||||
|
||||
;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
;; NOTE - modified segment registers could hang the debugger... We
|
||||
;; could attempt to insulate ourselves against this possibility,
|
||||
;; but that poses risks as well.
|
||||
;;
|
||||
pop gs
|
||||
pop fs
|
||||
pop es
|
||||
pop ds
|
||||
pop dword ptr [ebp + 4 * 4]
|
||||
pop ss
|
||||
|
||||
;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
|
||||
pop edi
|
||||
pop esi
|
||||
add esp, 4 ; not for ebp
|
||||
add esp, 4 ; not for esp
|
||||
pop ebx
|
||||
pop edx
|
||||
pop ecx
|
||||
pop eax
|
||||
|
||||
mov esp, ebp
|
||||
pop ebp
|
||||
add esp, 8
|
||||
iretd
|
||||
|
||||
CommonInterruptEntry ENDP
|
||||
|
||||
;---------------------------------------;
|
||||
; _GetTemplateAddressMap ;
|
||||
;----------------------------------------------------------------------------;
|
||||
;
|
||||
; Protocol prototype
|
||||
; GetTemplateAddressMap (
|
||||
; EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
|
||||
; );
|
||||
;
|
||||
; Routine Description:
|
||||
;
|
||||
; Return address map of interrupt handler template so that C code can generate
|
||||
; interrupt table.
|
||||
;
|
||||
; Arguments:
|
||||
;
|
||||
;
|
||||
; Returns:
|
||||
;
|
||||
; Nothing
|
||||
;
|
||||
;
|
||||
; Input: [ebp][0] = Original ebp
|
||||
; [ebp][4] = Return address
|
||||
;
|
||||
; Output: Nothing
|
||||
;
|
||||
; Destroys: Nothing
|
||||
;-----------------------------------------------------------------------------;
|
||||
GetTemplateAddressMap proc near public
|
||||
push ebp ; C prolog
|
||||
mov ebp, esp
|
||||
pushad
|
||||
|
||||
mov ebx, dword ptr [ebp+08h]
|
||||
mov dword ptr [ebx], Exception0Handle
|
||||
mov dword ptr [ebx+4h], Exception1Handle - Exception0Handle
|
||||
|
||||
popad
|
||||
pop ebp
|
||||
ret
|
||||
GetTemplateAddressMap ENDP
|
||||
|
||||
END
|
||||
Reference in New Issue
Block a user