sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

MdePkg: Clean up source files

Browse Source 
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Liming Gao
2018-06-27 21:11:33 +08:00
parent d1102dba72
commit 9095d37b8f
729 changed files with 15683 additions and 15683 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointer.c
View File

@@ -3,15 +3,15 @@
According to PI specification, the peiservice pointer is stored prior at IDT
table in IA32 and x64 architecture.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
@@ -25,10 +25,10 @@
/**
Retrieves the cached value of the PEI Services Table pointer.
Returns the cached value of the PEI Services Table pointer in a CPU specific manner
as specified in the CPU binding section of the Platform Initialization Pre-EFI
Returns the cached value of the PEI Services Table pointer in a CPU specific manner
as specified in the CPU binding section of the Platform Initialization Pre-EFI
Initialization Core Interface Specification.
If the cached PEI Services Table pointer is NULL, then ASSERT().
@return The pointer to PeiServices.
@@ -42,7 +42,7 @@ GetPeiServicesTablePointer (
{
CONST EFI_PEI_SERVICES **PeiServices;
IA32_DESCRIPTOR Idtr;
AsmReadIdtr (&Idtr);
PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));
ASSERT (PeiServices != NULL);
@@ -50,16 +50,16 @@ GetPeiServicesTablePointer (
}
/**
Caches a pointer PEI Services Table.
Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
in a CPU specific manner as specified in the CPU binding section of the Platform Initialization
Pre-EFI Initialization Core Interface Specification.
Caches a pointer PEI Services Table.
Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
in a CPU specific manner as specified in the CPU binding section of the Platform Initialization
Pre-EFI Initialization Core Interface Specification.
The function set the pointer of PEI services immediately preceding the IDT table
according to PI specification.
If PeiServicesTablePointer is NULL, then ASSERT().
@param PeiServicesTablePointer The address of PeiServices pointer.
**/
VOID
@@ -69,23 +69,23 @@ SetPeiServicesTablePointer (
)
{
IA32_DESCRIPTOR Idtr;
ASSERT (PeiServicesTablePointer != NULL);
AsmReadIdtr (&Idtr);
(*(UINTN*)(Idtr.Base - sizeof (UINTN))) = (UINTN)PeiServicesTablePointer;
}
/**
Perform CPU specific actions required to migrate the PEI Services Table
Perform CPU specific actions required to migrate the PEI Services Table
pointer from temporary RAM to permanent RAM.
For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
a dedicated CPU register. This means that there is no memory storage
associated with storing the PEI Services Table pointer, so no additional
a dedicated CPU register. This means that there is no memory storage
associated with storing the PEI Services Table pointer, so no additional
migration actions are required for Itanium or ARM CPUs.
If The cached PEI Services Table pointer is NULL, then ASSERT().
@@ -112,7 +112,7 @@ MigratePeiServicesTablePointer (
// Allocate the permanent memory.
//
Status = (*PeiServices)->AllocatePages (
PeiServices,
PeiServices,
EfiBootServicesCode,
EFI_SIZE_TO_PAGES(Idtr.Limit + 1 + sizeof (UINTN)),
&IdtBase
@@ -124,7 +124,7 @@ MigratePeiServicesTablePointer (
CopyMem ((VOID *) (UINTN) IdtBase, (VOID *) (Idtr.Base - sizeof (UINTN)), Idtr.Limit + 1 + sizeof (UINTN));
Idtr.Base = (UINTN) IdtBase + sizeof (UINTN);
AsmWriteIdtr (&Idtr);
return;
}