Import EhciDxe and UhciDxe into MdeModulePkg.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3191 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff
941
MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
Normal file
941
MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
Normal file
@@ -0,0 +1,941 @@
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/** @file
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Copyright (c) 2007, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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EhciSched.c
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Abstract:
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EHCI transfer scheduling routines
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Revision History
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**/
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#include "Ehci.h"
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/**
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Create helper QTD/QH for the EHCI device
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@param Ehc The EHCI device
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@retval EFI_OUT_OF_RESOURCES Failed to allocate resource for helper QTD/QH
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@retval EFI_SUCCESS Helper QH/QTD are created
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**/
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STATIC
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EFI_STATUS
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EhcCreateHelpQ (
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IN USB2_HC_DEV *Ehc
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)
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{
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USB_ENDPOINT Ep;
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EHC_QH *Qh;
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QH_HW *QhHw;
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EHC_QTD *Qtd;
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//
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// Create an inactive Qtd to terminate the short packet read.
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//
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Qtd = EhcCreateQtd (Ehc, NULL, 0, QTD_PID_INPUT, 0, 64);
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if (Qtd == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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Qtd->QtdHw.Status = QTD_STAT_HALTED;
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Ehc->ShortReadStop = Qtd;
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//
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// Create a QH to act as the EHC reclamation header.
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// Set the header to loopback to itself.
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//
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Ep.DevAddr = 0;
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Ep.EpAddr = 1;
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Ep.Direction = EfiUsbDataIn;
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Ep.DevSpeed = EFI_USB_SPEED_HIGH;
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Ep.MaxPacket = 64;
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Ep.HubAddr = 0;
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Ep.HubPort = 0;
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Ep.Toggle = 0;
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Ep.Type = EHC_BULK_TRANSFER;
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Ep.PollRate = 1;
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Qh = EhcCreateQh (Ehc, &Ep);
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if (Qh == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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QhHw = &Qh->QhHw;
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QhHw->HorizonLink = QH_LINK (QhHw, EHC_TYPE_QH, FALSE);
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QhHw->Status = QTD_STAT_HALTED;
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QhHw->ReclaimHead = 1;
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Ehc->ReclaimHead = Qh;
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//
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// Create a dummy QH to act as the terminator for periodical schedule
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//
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Ep.EpAddr = 2;
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Ep.Type = EHC_INT_TRANSFER_SYNC;
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Qh = EhcCreateQh (Ehc, &Ep);
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if (Qh == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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Qh->QhHw.Status = QTD_STAT_HALTED;
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Ehc->PeriodOne = Qh;
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return EFI_SUCCESS;
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}
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/**
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Initialize the schedule data structure such as frame list
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@param Ehc The EHCI device to init schedule data for
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@retval EFI_OUT_OF_RESOURCES Failed to allocate resource to init schedule data
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@retval EFI_SUCCESS The schedule data is initialized
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**/
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EFI_STATUS
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EhcInitSched (
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IN USB2_HC_DEV *Ehc
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)
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{
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EFI_PCI_IO_PROTOCOL *PciIo;
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VOID *Buf;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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VOID *Map;
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UINTN Pages;
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UINTN Bytes;
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UINTN Index;
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UINT32 *Desc;
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EFI_STATUS Status;
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//
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// First initialize the periodical schedule data:
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// 1. Allocate and map the memory for the frame list
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// 2. Create the help QTD/QH
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// 3. Initialize the frame entries
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// 4. Set the frame list register
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//
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PciIo = Ehc->PciIo;
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Bytes = 4096;
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Pages = EFI_SIZE_TO_PAGES (Bytes);
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Status = PciIo->AllocateBuffer (
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PciIo,
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AllocateAnyPages,
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EfiBootServicesData,
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Pages,
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&Buf,
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0
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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Status = PciIo->Map (
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PciIo,
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EfiPciIoOperationBusMasterCommonBuffer,
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Buf,
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&Bytes,
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&PhyAddr,
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&Map
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);
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if (EFI_ERROR (Status) || (Bytes != 4096)) {
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PciIo->FreeBuffer (PciIo, Pages, Buf);
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return EFI_OUT_OF_RESOURCES;
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}
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Ehc->PeriodFrameHost = Buf;
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Ehc->PeriodFrame = (VOID *) ((UINTN) PhyAddr);
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Ehc->PeriodFrameMap = Map;
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Ehc->High32bitAddr = EHC_HIGH_32BIT (PhyAddr);
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//
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// Init memory pool management then create the helper
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// QTD/QH. If failed, previously allocated resources
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// will be freed by EhcFreeSched
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//
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Ehc->MemPool = UsbHcInitMemPool (
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PciIo,
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EHC_BIT_IS_SET (Ehc->HcCapParams, HCCP_64BIT),
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Ehc->High32bitAddr
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);
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if (Ehc->MemPool == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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Status = EhcCreateHelpQ (Ehc);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Initialize the frame list entries then set the registers
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//
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Desc = (UINT32 *) Ehc->PeriodFrame;
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for (Index = 0; Index < EHC_FRAME_LEN; Index++) {
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Desc[Index] = QH_LINK (Ehc->PeriodOne, EHC_TYPE_QH, FALSE);
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}
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EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (Ehc->PeriodFrame));
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//
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// Second initialize the asynchronous schedule:
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// Only need to set the AsynListAddr register to
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// the reclamation header
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//
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EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (Ehc->ReclaimHead));
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return EFI_SUCCESS;
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}
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/**
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Free the schedule data. It may be partially initialized.
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@param Ehc The EHCI device
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@return None
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**/
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VOID
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EhcFreeSched (
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IN USB2_HC_DEV *Ehc
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)
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{
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EFI_PCI_IO_PROTOCOL *PciIo;
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EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, 0);
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EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, 0);
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if (Ehc->PeriodOne != NULL) {
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UsbHcFreeMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (EHC_QH));
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Ehc->PeriodOne = NULL;
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}
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if (Ehc->ReclaimHead != NULL) {
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UsbHcFreeMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (EHC_QH));
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Ehc->ReclaimHead = NULL;
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}
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if (Ehc->ShortReadStop != NULL) {
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UsbHcFreeMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (EHC_QTD));
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Ehc->ShortReadStop = NULL;
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}
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if (Ehc->MemPool != NULL) {
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UsbHcFreeMemPool (Ehc->MemPool);
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Ehc->MemPool = NULL;
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}
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if (Ehc->PeriodFrame != NULL) {
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PciIo = Ehc->PciIo;
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ASSERT (PciIo != NULL);
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PciIo->Unmap (PciIo, Ehc->PeriodFrameMap);
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PciIo->FreeBuffer (
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PciIo,
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EFI_SIZE_TO_PAGES (EFI_PAGE_SIZE),
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Ehc->PeriodFrameHost
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);
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Ehc->PeriodFrame = NULL;
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}
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}
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/**
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Link the queue head to the asynchronous schedule list.
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UEFI only supports one CTRL/BULK transfer at a time
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due to its interfaces. This simplifies the AsynList
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management: A reclamation header is always linked to
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the AsyncListAddr, the only active QH is appended to it.
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@param Ehc The EHCI device
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@param Qh The queue head to link
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@return None
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**/
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VOID
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EhcLinkQhToAsync (
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IN USB2_HC_DEV *Ehc,
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IN EHC_QH *Qh
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)
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{
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EHC_QH *Head;
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//
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// Append the queue head after the reclaim header, then
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// fix the hardware visiable parts (EHCI R1.0 page 72).
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// ReclaimHead is always linked to the EHCI's AsynListAddr.
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//
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Head = Ehc->ReclaimHead;
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Qh->NextQh = Head->NextQh;
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Head->NextQh = Qh;
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Qh->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);;
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Head->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
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}
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/**
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Unlink a queue head from the asynchronous schedule list.
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Need to synchronize with hardware
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@param Ehc The EHCI device
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@param Qh The queue head to unlink
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@return None
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**/
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VOID
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EhcUnlinkQhFromAsync (
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IN USB2_HC_DEV *Ehc,
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IN EHC_QH *Qh
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)
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{
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EHC_QH *Head;
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EFI_STATUS Status;
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ASSERT (Ehc->ReclaimHead->NextQh == Qh);
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//
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// Remove the QH from reclamation head, then update the hardware
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// visiable part: Only need to loopback the ReclaimHead. The Qh
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// is pointing to ReclaimHead (which is staill in the list).
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//
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Head = Ehc->ReclaimHead;
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Head->NextQh = Qh->NextQh;
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Qh->NextQh = NULL;
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Head->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);
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//
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// Set and wait the door bell to synchronize with the hardware
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//
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Status = EhcSetAndWaitDoorBell (Ehc, EHC_GENERIC_TIME);
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if (EFI_ERROR (Status)) {
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EHC_ERROR (("EhcUnlinkQhFromAsync: Failed to synchronize with doorbell\n"));
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}
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}
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/**
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Link a queue head for interrupt transfer to the periodic
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schedule frame list. This code is very much the same as
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that in UHCI.
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@param Ehc The EHCI device
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@param Qh The queue head to link
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@return None
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**/
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VOID
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EhcLinkQhToPeriod (
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IN USB2_HC_DEV *Ehc,
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IN EHC_QH *Qh
|
||||
)
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{
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UINT32 *Frames;
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UINTN Index;
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EHC_QH *Prev;
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EHC_QH *Next;
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Frames = Ehc->PeriodFrame;
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for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
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//
|
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// First QH can't be NULL because we always keep PeriodOne
|
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// heads on the frame list
|
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//
|
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ASSERT (!EHC_LINK_TERMINATED (Frames[Index]));
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Next = EHC_ADDR (Ehc->High32bitAddr, Frames[Index]);
|
||||
Prev = NULL;
|
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//
|
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// Now, insert the queue head (Qh) into this frame:
|
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// 1. Find a queue head with the same poll interval, just insert
|
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// Qh after this queue head, then we are done.
|
||||
//
|
||||
// 2. Find the position to insert the queue head into:
|
||||
// Previous head's interval is bigger than Qh's
|
||||
// Next head's interval is less than Qh's
|
||||
// Then, insert the Qh between then
|
||||
//
|
||||
while (Next->Interval > Qh->Interval) {
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Prev = Next;
|
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Next = Next->NextQh;
|
||||
}
|
||||
|
||||
ASSERT (Next != NULL);
|
||||
|
||||
//
|
||||
// The entry may have been linked into the frame by early insertation.
|
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// For example: if insert a Qh with Qh.Interval == 4, and there is a Qh
|
||||
// with Qh.Interval == 8 on the frame. If so, we are done with this frame.
|
||||
// It isn't necessary to compare all the QH with the same interval to
|
||||
// Qh. This is because if there is other QH with the same interval, Qh
|
||||
// should has been inserted after that at Frames[0] and at Frames[0] it is
|
||||
// impossible for (Next == Qh)
|
||||
//
|
||||
if (Next == Qh) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (Next->Interval == Qh->Interval) {
|
||||
//
|
||||
// If there is a QH with the same interval, it locates at
|
||||
// Frames[0], and we can simply insert it after this QH. We
|
||||
// are all done.
|
||||
//
|
||||
ASSERT ((Index == 0) && (Qh->NextQh == NULL));
|
||||
|
||||
Prev = Next;
|
||||
Next = Next->NextQh;
|
||||
|
||||
Qh->NextQh = Next;
|
||||
Prev->NextQh = Qh;
|
||||
|
||||
Qh->QhHw.HorizonLink = Prev->QhHw.HorizonLink;
|
||||
Prev->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
|
||||
break;
|
||||
}
|
||||
|
||||
//
|
||||
// OK, find the right position, insert it in. If Qh's next
|
||||
// link has already been set, it is in position. This is
|
||||
// guarranted by 2^n polling interval.
|
||||
//
|
||||
if (Qh->NextQh == NULL) {
|
||||
Qh->NextQh = Next;
|
||||
Qh->QhHw.HorizonLink = QH_LINK (Next, EHC_TYPE_QH, FALSE);
|
||||
}
|
||||
|
||||
if (Prev == NULL) {
|
||||
Frames[Index] = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
|
||||
} else {
|
||||
Prev->NextQh = Qh;
|
||||
Prev->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Unlink an interrupt queue head from the periodic
|
||||
schedule frame list
|
||||
|
||||
@param Ehc The EHCI device
|
||||
@param Qh The queue head to unlink
|
||||
|
||||
@return None
|
||||
|
||||
**/
|
||||
VOID
|
||||
EhcUnlinkQhFromPeriod (
|
||||
IN USB2_HC_DEV *Ehc,
|
||||
IN EHC_QH *Qh
|
||||
)
|
||||
{
|
||||
UINT32 *Frames;
|
||||
UINTN Index;
|
||||
EHC_QH *Prev;
|
||||
EHC_QH *This;
|
||||
|
||||
Frames = Ehc->PeriodFrame;
|
||||
|
||||
for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
|
||||
//
|
||||
// Frame link can't be NULL because we always keep PeroidOne
|
||||
// on the frame list
|
||||
//
|
||||
ASSERT (!EHC_LINK_TERMINATED (Frames[Index]));
|
||||
This = EHC_ADDR (Ehc->High32bitAddr, Frames[Index]);
|
||||
Prev = NULL;
|
||||
|
||||
//
|
||||
// Walk through the frame's QH list to find the
|
||||
// queue head to remove
|
||||
//
|
||||
while ((This != NULL) && (This != Qh)) {
|
||||
Prev = This;
|
||||
This = This->NextQh;
|
||||
}
|
||||
|
||||
//
|
||||
// Qh may have already been unlinked from this frame
|
||||
// by early action. See the comments in EhcLinkQhToPeriod.
|
||||
//
|
||||
if (This == NULL) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (Prev == NULL) {
|
||||
//
|
||||
// Qh is the first entry in the frame
|
||||
//
|
||||
Frames[Index] = Qh->QhHw.HorizonLink;
|
||||
} else {
|
||||
Prev->NextQh = Qh->NextQh;
|
||||
Prev->QhHw.HorizonLink = Qh->QhHw.HorizonLink;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
Check the URB's execution result and update the URB's
|
||||
result accordingly.
|
||||
|
||||
@param Ehc The EHCI device
|
||||
@param Urb The URB to check result
|
||||
|
||||
@return Whether the result of URB transfer is finialized.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
BOOLEAN
|
||||
EhcCheckUrbResult (
|
||||
IN USB2_HC_DEV *Ehc,
|
||||
IN URB *Urb
|
||||
)
|
||||
{
|
||||
LIST_ENTRY *Entry;
|
||||
EHC_QTD *Qtd;
|
||||
QTD_HW *QtdHw;
|
||||
UINT8 State;
|
||||
BOOLEAN Finished;
|
||||
|
||||
ASSERT ((Ehc != NULL) && (Urb != NULL) && (Urb->Qh != NULL));
|
||||
|
||||
Finished = TRUE;
|
||||
Urb->Completed = 0;
|
||||
|
||||
Urb->Result = EFI_USB_NOERROR;
|
||||
|
||||
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {
|
||||
Urb->Result |= EFI_USB_ERR_SYSTEM;
|
||||
goto ON_EXIT;
|
||||
}
|
||||
|
||||
EFI_LIST_FOR_EACH (Entry, &Urb->Qh->Qtds) {
|
||||
Qtd = EFI_LIST_CONTAINER (Entry, EHC_QTD, QtdList);
|
||||
QtdHw = &Qtd->QtdHw;
|
||||
State = (UINT8) QtdHw->Status;
|
||||
|
||||
if (EHC_BIT_IS_SET (State, QTD_STAT_HALTED)) {
|
||||
//
|
||||
// EHCI will halt the queue head when met some error.
|
||||
// If it is halted, the result of URB is finialized.
|
||||
//
|
||||
if ((State & QTD_STAT_ERR_MASK) == 0) {
|
||||
Urb->Result |= EFI_USB_ERR_STALL;
|
||||
}
|
||||
|
||||
if (EHC_BIT_IS_SET (State, QTD_STAT_BABBLE_ERR)) {
|
||||
Urb->Result |= EFI_USB_ERR_BABBLE;
|
||||
}
|
||||
|
||||
if (EHC_BIT_IS_SET (State, QTD_STAT_BUFF_ERR)) {
|
||||
Urb->Result |= EFI_USB_ERR_BUFFER;
|
||||
}
|
||||
|
||||
if (EHC_BIT_IS_SET (State, QTD_STAT_TRANS_ERR) && (QtdHw->ErrCnt == 0)) {
|
||||
Urb->Result |= EFI_USB_ERR_TIMEOUT;
|
||||
}
|
||||
|
||||
Finished = TRUE;
|
||||
goto ON_EXIT;
|
||||
|
||||
} else if (EHC_BIT_IS_SET (State, QTD_STAT_ACTIVE)) {
|
||||
//
|
||||
// The QTD is still active, no need to check furthur.
|
||||
//
|
||||
Urb->Result |= EFI_USB_ERR_NOTEXECUTE;
|
||||
|
||||
Finished = FALSE;
|
||||
goto ON_EXIT;
|
||||
|
||||
} else {
|
||||
//
|
||||
// This QTD is finished OK or met short packet read. Update the
|
||||
// transfer length if it isn't a setup.
|
||||
//
|
||||
if (QtdHw->Pid != QTD_PID_SETUP) {
|
||||
Urb->Completed += Qtd->DataLen - QtdHw->TotalBytes;
|
||||
}
|
||||
|
||||
if ((QtdHw->TotalBytes != 0) && (QtdHw->Pid == QTD_PID_INPUT)) {
|
||||
EHC_DUMP_QH ((Urb->Qh, "Short packet read", FALSE));
|
||||
|
||||
//
|
||||
// Short packet read condition. If it isn't a setup transfer,
|
||||
// no need to check furthur: the queue head will halt at the
|
||||
// ShortReadStop. If it is a setup transfer, need to check the
|
||||
// Status Stage of the setup transfer to get the finial result
|
||||
//
|
||||
if (QtdHw->AltNext == QTD_LINK (Ehc->ShortReadStop, FALSE)) {
|
||||
EHC_DEBUG (("EhcCheckUrbResult: Short packet read, break\n"));
|
||||
|
||||
Finished = TRUE;
|
||||
goto ON_EXIT;
|
||||
}
|
||||
|
||||
EHC_DEBUG (("EhcCheckUrbResult: Short packet read, continue\n"));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
ON_EXIT:
|
||||
//
|
||||
// Return the data toggle set by EHCI hardware, bulk and interrupt
|
||||
// transfer will use this to initialize the next transaction. For
|
||||
// Control transfer, it always start a new data toggle sequence for
|
||||
// new transfer.
|
||||
//
|
||||
// NOTICE: don't move DT update before the loop, otherwise there is
|
||||
// a race condition that DT is wrong.
|
||||
//
|
||||
Urb->DataToggle = (UINT8) Urb->Qh->QhHw.DataToggle;
|
||||
|
||||
return Finished;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Execute the transfer by polling the URB. This is a synchronous operation.
|
||||
|
||||
@param Ehc The EHCI device
|
||||
@param Urb The URB to execute
|
||||
@param TimeOut The time to wait before abort, in millisecond.
|
||||
|
||||
@return EFI_DEVICE_ERROR : The transfer failed due to transfer error
|
||||
@return EFI_TIMEOUT : The transfer failed due to time out
|
||||
@return EFI_SUCCESS : The transfer finished OK
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EhcExecTransfer (
|
||||
IN USB2_HC_DEV *Ehc,
|
||||
IN URB *Urb,
|
||||
IN UINTN TimeOut
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINTN Index;
|
||||
UINTN Loop;
|
||||
BOOLEAN Finished;
|
||||
|
||||
Status = EFI_SUCCESS;
|
||||
Loop = (TimeOut * EHC_STALL_1_MILLISECOND / EHC_SYNC_POLL_TIME) + 1;
|
||||
Finished = FALSE;
|
||||
|
||||
for (Index = 0; Index < Loop; Index++) {
|
||||
Finished = EhcCheckUrbResult (Ehc, Urb);
|
||||
|
||||
if (Finished) {
|
||||
break;
|
||||
}
|
||||
|
||||
gBS->Stall (EHC_SYNC_POLL_TIME);
|
||||
}
|
||||
|
||||
if (!Finished) {
|
||||
EHC_ERROR (("EhcExecTransfer: transfer not finished in %dms\n", TimeOut));
|
||||
EHC_DUMP_QH ((Urb->Qh, NULL, FALSE));
|
||||
|
||||
Status = EFI_TIMEOUT;
|
||||
|
||||
} else if (Urb->Result != EFI_USB_NOERROR) {
|
||||
EHC_ERROR (("EhcExecTransfer: transfer failed with %x\n", Urb->Result));
|
||||
EHC_DUMP_QH ((Urb->Qh, NULL, FALSE));
|
||||
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Delete a single asynchronous interrupt transfer for
|
||||
the device and endpoint
|
||||
|
||||
@param Ehc The EHCI device
|
||||
@param DevAddr The address of the target device
|
||||
@param EpNum The endpoint of the target
|
||||
@param DataToggle Return the next data toggle to use
|
||||
|
||||
@retval EFI_SUCCESS An asynchronous transfer is removed
|
||||
@retval EFI_NOT_FOUND No transfer for the device is found
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EhciDelAsyncIntTransfer (
|
||||
IN USB2_HC_DEV *Ehc,
|
||||
IN UINT8 DevAddr,
|
||||
IN UINT8 EpNum,
|
||||
OUT UINT8 *DataToggle
|
||||
)
|
||||
{
|
||||
LIST_ENTRY *Entry;
|
||||
LIST_ENTRY *Next;
|
||||
URB *Urb;
|
||||
EFI_USB_DATA_DIRECTION Direction;
|
||||
|
||||
Direction = ((EpNum & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
|
||||
EpNum &= 0x0F;
|
||||
|
||||
EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Ehc->AsyncIntTransfers) {
|
||||
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
|
||||
|
||||
if ((Urb->Ep.DevAddr == DevAddr) && (Urb->Ep.EpAddr == EpNum) &&
|
||||
(Urb->Ep.Direction == Direction)) {
|
||||
//
|
||||
// Check the URB status to retrieve the next data toggle
|
||||
// from the associated queue head.
|
||||
//
|
||||
EhcCheckUrbResult (Ehc, Urb);
|
||||
*DataToggle = Urb->DataToggle;
|
||||
|
||||
EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
|
||||
RemoveEntryList (&Urb->UrbList);
|
||||
|
||||
gBS->FreePool (Urb->Data);
|
||||
EhcFreeUrb (Ehc, Urb);
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
return EFI_NOT_FOUND;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Remove all the asynchronous interrutp transfers
|
||||
|
||||
@param Ehc The EHCI device
|
||||
|
||||
@return None
|
||||
|
||||
**/
|
||||
VOID
|
||||
EhciDelAllAsyncIntTransfers (
|
||||
IN USB2_HC_DEV *Ehc
|
||||
)
|
||||
{
|
||||
LIST_ENTRY *Entry;
|
||||
LIST_ENTRY *Next;
|
||||
URB *Urb;
|
||||
|
||||
EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Ehc->AsyncIntTransfers) {
|
||||
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
|
||||
|
||||
EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
|
||||
RemoveEntryList (&Urb->UrbList);
|
||||
|
||||
gBS->FreePool (Urb->Data);
|
||||
EhcFreeUrb (Ehc, Urb);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
Update the queue head for next round of asynchronous transfer
|
||||
|
||||
@param Urb The URB to update
|
||||
|
||||
@return None
|
||||
|
||||
**/
|
||||
STATIC
|
||||
VOID
|
||||
EhcUpdateAsyncRequest (
|
||||
IN URB *Urb
|
||||
)
|
||||
{
|
||||
LIST_ENTRY *Entry;
|
||||
EHC_QTD *FirstQtd;
|
||||
QH_HW *QhHw;
|
||||
EHC_QTD *Qtd;
|
||||
QTD_HW *QtdHw;
|
||||
UINTN Index;
|
||||
|
||||
Qtd = NULL;
|
||||
|
||||
if (Urb->Result == EFI_USB_NOERROR) {
|
||||
FirstQtd = NULL;
|
||||
|
||||
EFI_LIST_FOR_EACH (Entry, &Urb->Qh->Qtds) {
|
||||
Qtd = EFI_LIST_CONTAINER (Entry, EHC_QTD, QtdList);
|
||||
|
||||
if (FirstQtd == NULL) {
|
||||
FirstQtd = Qtd;
|
||||
}
|
||||
|
||||
//
|
||||
// Update the QTD for next round of transfer. Host control
|
||||
// may change dt/Total Bytes to Transfer/C_Page/Cerr/Status/
|
||||
// Current Offset. These fields need to be updated. DT isn't
|
||||
// used by interrupt transfer. It uses DT in queue head.
|
||||
// Current Offset is in Page[0], only need to reset Page[0]
|
||||
// to initial data buffer.
|
||||
//
|
||||
QtdHw = &Qtd->QtdHw;
|
||||
QtdHw->Status = QTD_STAT_ACTIVE;
|
||||
QtdHw->ErrCnt = QTD_MAX_ERR;
|
||||
QtdHw->CurPage = 0;
|
||||
QtdHw->TotalBytes = (UINT32) Qtd->DataLen;
|
||||
QtdHw->Page[0] = EHC_LOW_32BIT (Qtd->Data);
|
||||
}
|
||||
|
||||
//
|
||||
// Update QH for next round of transfer. Host control only
|
||||
// touch the fields in transfer overlay area. Only need to
|
||||
// zero out the overlay area and set NextQtd to the first
|
||||
// QTD. DateToggle bit is left untouched.
|
||||
//
|
||||
QhHw = &Urb->Qh->QhHw;
|
||||
QhHw->CurQtd = QTD_LINK (0, TRUE);
|
||||
QhHw->AltQtd = 0;
|
||||
|
||||
QhHw->Status = 0;
|
||||
QhHw->Pid = 0;
|
||||
QhHw->ErrCnt = 0;
|
||||
QhHw->CurPage = 0;
|
||||
QhHw->IOC = 0;
|
||||
QhHw->TotalBytes = 0;
|
||||
|
||||
for (Index = 0; Index < 5; Index++) {
|
||||
QhHw->Page[Index] = 0;
|
||||
QhHw->PageHigh[Index] = 0;
|
||||
}
|
||||
|
||||
QhHw->NextQtd = QTD_LINK (FirstQtd, FALSE);
|
||||
}
|
||||
|
||||
return ;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Interrupt transfer periodic check handler
|
||||
|
||||
@param Event Interrupt event
|
||||
@param Context Pointer to USB2_HC_DEV
|
||||
|
||||
@return None
|
||||
|
||||
**/
|
||||
VOID
|
||||
EhcMoniteAsyncRequests (
|
||||
IN EFI_EVENT Event,
|
||||
IN VOID *Context
|
||||
)
|
||||
{
|
||||
USB2_HC_DEV *Ehc;
|
||||
EFI_TPL OldTpl;
|
||||
LIST_ENTRY *Entry;
|
||||
LIST_ENTRY *Next;
|
||||
BOOLEAN Finished;
|
||||
UINT8 *ProcBuf;
|
||||
URB *Urb;
|
||||
|
||||
OldTpl = gBS->RaiseTPL (EHC_TPL);
|
||||
Ehc = (USB2_HC_DEV *) Context;
|
||||
|
||||
EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Ehc->AsyncIntTransfers) {
|
||||
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
|
||||
|
||||
//
|
||||
// Check the result of URB execution. If it is still
|
||||
// active, check the next one.
|
||||
//
|
||||
Finished = EhcCheckUrbResult (Ehc, Urb);
|
||||
|
||||
if (!Finished) {
|
||||
continue;
|
||||
}
|
||||
|
||||
//
|
||||
// Allocate a buffer then copy the transferred data for user.
|
||||
// If failed to allocate the buffer, update the URB for next
|
||||
// round of transfer. Ignore the data of this round.
|
||||
//
|
||||
ProcBuf = NULL;
|
||||
|
||||
if (Urb->Result == EFI_USB_NOERROR) {
|
||||
ASSERT (Urb->Completed <= Urb->DataLen);
|
||||
|
||||
ProcBuf = AllocatePool (Urb->Completed);
|
||||
|
||||
if (ProcBuf == NULL) {
|
||||
EhcUpdateAsyncRequest (Urb);
|
||||
continue;
|
||||
}
|
||||
|
||||
CopyMem (ProcBuf, Urb->Data, Urb->Completed);
|
||||
}
|
||||
|
||||
EhcUpdateAsyncRequest (Urb);
|
||||
|
||||
//
|
||||
// Leave error recovery to its related device driver. A
|
||||
// common case of the error recovery is to re-submit the
|
||||
// interrupt transfer which is linked to the head of the
|
||||
// list. This function scans from head to tail. So the
|
||||
// re-submitted interrupt transfer's callback function
|
||||
// will not be called again in this round. Don't touch this
|
||||
// URB after the callback, it may have been removed by the
|
||||
// callback.
|
||||
//
|
||||
if (Urb->Callback != NULL) {
|
||||
//
|
||||
// Restore the old TPL, USB bus maybe connect device in
|
||||
// his callback. Some drivers may has a lower TPL restriction.
|
||||
//
|
||||
gBS->RestoreTPL (OldTpl);
|
||||
(Urb->Callback) (ProcBuf, Urb->Completed, Urb->Context, Urb->Result);
|
||||
OldTpl = gBS->RaiseTPL (EHC_TPL);
|
||||
}
|
||||
|
||||
if (ProcBuf != NULL) {
|
||||
gBS->FreePool (ProcBuf);
|
||||
}
|
||||
}
|
||||
|
||||
gBS->RestoreTPL (OldTpl);
|
||||
}
|
||||
Reference in New Issue
Block a user