MdeModulePkg/DxeIpl: Implement NULL pointer detection
NULL pointer detection is done by making use of paging mechanism of CPU. During page table setup, if enabled, the first 4-K page (0-4095) will be marked as NOT PRESENT. Any code which unintentionally access memory between 0-4095 will trigger a Page Fault exception which warns users that there's potential illegal code in BIOS. This also means that legacy code which has to access memory between 0-4095 should be cautious to temporarily disable this feature before the access and re-enable it afterwards; or disalbe this feature at all. Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ayellet Wolman <ayellet.wolman@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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@@ -123,7 +123,9 @@ Create4GPageTablesIa32Pae (
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PageDirectoryPointerEntry->Bits.Present = 1;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) {
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if ((PhysicalAddress < StackBase + StackSize) && ((PhysicalAddress + SIZE_2MB) > StackBase)) {
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if ((IsNullDetectionEnabled () && PhysicalAddress == 0)
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|| ((PhysicalAddress < StackBase + StackSize)
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&& ((PhysicalAddress + SIZE_2MB) > StackBase))) {
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//
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// Need to split this 2M page that covers stack range.
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//
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@@ -240,6 +242,10 @@ HandOffToDxeCore (
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EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
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BOOLEAN BuildPageTablesIa32Pae;
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if (IsNullDetectionEnabled ()) {
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ClearFirst4KPage (HobList.Raw);
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}
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Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);
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ASSERT_EFI_ERROR (Status);
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@@ -379,10 +385,15 @@ HandOffToDxeCore (
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TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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PageTables = 0;
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BuildPageTablesIa32Pae = (BOOLEAN) (PcdGetBool (PcdSetNxForStack) && IsIa32PaeSupport () && IsExecuteDisableBitAvailable ());
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BuildPageTablesIa32Pae = (BOOLEAN) (IsIa32PaeSupport () &&
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(IsNullDetectionEnabled () ||
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(PcdGetBool (PcdSetNxForStack) &&
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IsExecuteDisableBitAvailable ())));
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if (BuildPageTablesIa32Pae) {
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PageTables = Create4GPageTablesIa32Pae (BaseOfStack, STACK_SIZE);
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EnableExecuteDisableBit ();
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if (IsExecuteDisableBitAvailable ()) {
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EnableExecuteDisableBit();
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}
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}
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//
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