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IntelFsp2WrapperPkg: SecFspWrapperPlatformSecLibSample support for X64

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3893
1.Added SecFspWrapperPlatformSecLibSample support for X64.
2.Adopted FSPT_ARCH2_UPD in SecFspWrapperPlatformSecLibSample.
3.Moved Fsp.h up one level to be shared across IA32 and X64.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Ted Kuo
2022-04-15 01:37:43 -07:00
committed by mergify[bot]
parent 86a2f3c439
commit 91a03f78ba
7 changed files with 418 additions and 16 deletions
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45
IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Fsp.h
View File

@@ -1,45 +0,0 @@
/** @file
Fsp related definitions
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __FSP_H__
#define __FSP_H__
//
// Fv Header
//
#define FVH_FV_LENGTH_OFFSET 0x20
#define FVH_SIGINATURE_OFFSET 0x28
#define FVH_SIGINATURE_VALID_VALUE 0x4856465F // valid signature:_FVH
#define FVH_HEADER_LENGTH_OFFSET 0x30
#define FVH_EXTHEADER_OFFSET_OFFSET 0x34
#define FVH_EXTHEADER_SIZE_OFFSET 0x10
//
// Ffs Header
//
#define FSP_HEADER_SIGNATURE_OFFSET 0x1C
#define FSP_HEADER_SIGNATURE 0x48505346 ; valid signature:FSPH
#define FSP_HEADER_GUID_DWORD1 0x912740BE
#define FSP_HEADER_GUID_DWORD2 0x47342284
#define FSP_HEADER_GUID_DWORD3 0xB08471B9
#define FSP_HEADER_GUID_DWORD4 0x0C3F3527
#define FFS_HEADER_SIZE_VALUE 0x18
//
// Section Header
//
#define SECTION_HEADER_TYPE_OFFSET 0x03
#define RAW_SECTION_HEADER_SIZE_VALUE 0x04
//
// Fsp Header
//
#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C
#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30
#endif

8
IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.nasm
View File

@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
@@ -22,7 +22,7 @@
global ASM_PFX(SecSwitchStack)
ASM_PFX(SecSwitchStack):
;
; Save three register: eax, ebx, ecx
; Save four register: eax, ebx, ecx, edx
;
push eax
push ebx
@@ -55,7 +55,7 @@ ASM_PFX(SecSwitchStack):
mov dword [eax + 12], edx
mov edx, dword [esp + 16] ; Update this function's return address into permanent memory
mov dword [eax + 16], edx
mov esp, eax ; From now, esp is pointed to permanent memory
mov esp, eax ; From now, esp is pointed to permanent memory
;
; Fixup the ebp point to permanent memory
@@ -63,7 +63,7 @@ ASM_PFX(SecSwitchStack):
mov eax, ebp
sub eax, ebx
add eax, ecx
mov ebp, eax ; From now, ebp is pointed to permanent memory
mov ebp, eax ; From now, ebp is pointed to permanent memory
pop edx
pop ecx