diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm index 6c330833e0..7c6e60f0d1 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm +++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm @@ -41,9 +41,8 @@ EXTERN GetFspBaseAddress:PROC EXTERN GetBootFirmwareVolumeOffset:PROC EXTERN Pei2LoaderSwitchStack:PROC EXTERN FspSelfCheck(FspSelfCheckDflt):PROC -EXTERN PlatformBasicInit(PlatformBasicInitDflt):PROC EXTERN LoadUcode(LoadUcodeDflt):PROC -EXTERN SecPlatformInit:PROC +EXTERN SecPlatformInit(SecPlatformInitDflt):PROC EXTERN SecCarInit:PROC ; @@ -101,7 +100,7 @@ exit: FspSelfCheckDflt ENDP ;------------------------------------------------------------------------------ -PlatformBasicInitDflt PROC NEAR PUBLIC +SecPlatformInitDflt PROC NEAR PUBLIC ; Inputs: ; eax -> Return address ; Outputs: @@ -116,7 +115,7 @@ PlatformBasicInitDflt PROC NEAR PUBLIC xor eax, eax exit: jmp ebp -PlatformBasicInitDflt ENDP +SecPlatformInitDflt ENDP ;------------------------------------------------------------------------------ LoadUcodeDflt PROC NEAR PUBLIC @@ -304,7 +303,6 @@ exit: LoadUcodeDflt ENDP EstablishStackFsp PROC NEAR PRIVATE - ; Following is the code copied from BYTFSP, need to figure out what it is doing.. ; ; Save parameter pointer in edx ; @@ -336,9 +334,9 @@ InvalidMicrocodeRegion: ; push DATA_LEN_OF_PER0 ; Size of the data region push 30524550h ; Signature of the data region 'PER0' - movd eax, xmm4 - push eax - movd eax, xmm5 + LOAD_EDX + push edx + LOAD_EAX push eax rdtsc push edx @@ -387,9 +385,17 @@ TempRamInitApi PROC NEAR PUBLIC ; Save timestamp into XMM4 & XMM5 ; rdtsc - movd xmm4, edx - movd xmm5, eax - + SAVE_EAX + SAVE_EDX + + ; + ; Check Parameter + ; + mov eax, dword ptr [esp + 4] + cmp eax, 0 + mov eax, 80000002h + jz NemInitExit + ; ; CPUID/DeviceID check ; @@ -400,16 +406,22 @@ TempRamInitApi PROC NEAR PUBLIC jnz NemInitExit CALL_MMX SecPlatformInit + cmp eax, 0 + jnz NemInitExit + + ; Load microcode + LOAD_ESP + CALL_MMX LoadUcode + cmp eax, 0 + jnz NemInitExit ; Call Sec CAR Init + LOAD_ESP CALL_MMX SecCarInit - - ; @todo: ESP has been modified, we need to restore here. - LOAD_REGS - SAVE_REGS - ; Load microcode - CALL_MMX LoadUcode + cmp eax, 0 + jnz NemInitExit + LOAD_ESP CALL_MMX EstablishStackFsp NemInitExit: diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s index 203efd9e42..995aef6088 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s +++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s @@ -205,7 +205,7 @@ FspSelfCheckDfltExit: #------------------------------------------------------------------------------ -# PlatformBasicInitDflt +# SecPlatformInitDflt # Inputs: # eax -> Return address # Outputs: @@ -214,15 +214,15 @@ FspSelfCheckDfltExit: # eax is cleared and ebp is used for return address. # All others reserved. #------------------------------------------------------------------------------ -ASM_GLOBAL ASM_PFX(PlatformBasicInitDflt) -ASM_PFX(PlatformBasicInitDflt): +ASM_GLOBAL ASM_PFX(SecPlatformInitDflt) +ASM_PFX(SecPlatformInitDflt): # # Save return address to EBP # movl %eax, %ebp xorl %eax, %eax -PlatformBasicInitDfltExit: +SecPlatformInitDfltExit: jmp *%ebp @@ -244,7 +244,7 @@ ASM_PFX(LoadUcode): # # Save return address to EBP # - movd %xmm7, %ebp + movd %mm7, %ebp cmpl $0x00, %esp jz ParamError @@ -451,8 +451,6 @@ LoadUcodeExit: #---------------------------------------------------------------------------- # EstablishStackFsp # -# Following is the code copied from BYTFSP, need to figure out what it is doing.. -# #---------------------------------------------------------------------------- ASM_GLOBAL ASM_PFX(EstablishStackFsp) ASM_PFX(EstablishStackFsp): @@ -487,9 +485,9 @@ EstablishStackFspExit: # pushl $DATA_LEN_OF_PER0 # Size of the data region pushl $0x30524550 # Signature of the data region 'PER0' - movd %xmm4, %eax - pushl %eax - movd %xmm5, %eax + LOAD_EDX + pushl %edx + LOAD_EAX pushl %eax rdtsc pushl %edx @@ -537,8 +535,16 @@ ASM_PFX(TempRamInitApi): # Save timestamp into XMM4 & XMM5 # rdtsc - movd %edx, %xmm4 - movd %eax, %xmm5 + SAVE_EAX + SAVE_EDX + + # + # Check Parameter + # + movl 4(%esp), %eax + cmpl $0x00, %eax + movl $0x80000002, %eax + jz NemInitExit # # CPUID/DeviceID check @@ -556,31 +562,35 @@ TempRamInitApiL0: movd %mm7, %esi jmp ASM_PFX(SecPlatformInit) TempRamInitApiL1: - - # - # Call Sec CAR Init - # - movl $TempRamInitApiL2, %esi #CALL_MMX SecCarInit - movd %mm7, %esi - jmp ASM_PFX(SecCarInit) -TempRamInitApiL2: - - # @todo: ESP has been modified, we need to restore here. - - LOAD_REGS - SAVE_REGS + cmpl $0x00, %eax + jnz NemInitExit # # Load microcode # - movl $TempRamInitApiL3, %esi #CALL_MMX LoadUcode + LOAD_ESP + movl $TempRamInitApiL2, %esi #CALL_MMX LoadUcode movd %mm7, %esi jmp ASM_PFX(LoadUcode) +TempRamInitApiL2: + cmpl $0x00, %eax + jnz NemInitExit + + # + # Call Sec CAR Init + # + LOAD_ESP + movl $TempRamInitApiL3, %esi #CALL_MMX SecCarInit + movd %mm7, %esi + jmp ASM_PFX(SecCarInit) TempRamInitApiL3: + cmpl $0x00, %eax + jnz NemInitExit # # EstablishStackFsp # + LOAD_ESP movl $TempRamInitApiL4, %esi #CALL_MMX EstablishStackFsp movd %mm7, %esi jmp ASM_PFX(EstablishStackFsp) diff --git a/IntelFspPkg/Include/Guid/GuidHobFspEas.h b/IntelFspPkg/Include/Guid/GuidHobFspEas.h index d29def3ade..45a6e25f0a 100644 --- a/IntelFspPkg/Include/Guid/GuidHobFspEas.h +++ b/IntelFspPkg/Include/Guid/GuidHobFspEas.h @@ -16,8 +16,7 @@ #ifndef __GUID_HOB_FSP_EAS_GUID__ #define __GUID_HOB_FSP_EAS_GUID__ -extern EFI_GUID gFspBootLoaderTempMemoryGuid; -extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid; // Same as gFspBootLoaderTempMemoryGuid +extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid; extern EFI_GUID gFspReservedMemoryResourceHobGuid; extern EFI_GUID gFspNonVolatileStorageHobGuid; diff --git a/IntelFspPkg/Include/Private/FspGlobalData.h b/IntelFspPkg/Include/Private/FspGlobalData.h index efbb94227b..436891af44 100644 --- a/IntelFspPkg/Include/Private/FspGlobalData.h +++ b/IntelFspPkg/Include/Private/FspGlobalData.h @@ -38,7 +38,6 @@ typedef struct { UINT8 Reserved[3]; UINT32 PerfIdx; UINT64 PerfData[32]; -// UINT64 PerfData[FixedPcdGet32(PcdFspMaxPerfEntry)]; } FSP_GLOBAL_DATA; #pragma pack() diff --git a/IntelFspPkg/Include/Private/FspPatchTable.h b/IntelFspPkg/Include/Private/FspPatchTable.h index d16a1b7b5e..7f672c66b4 100644 --- a/IntelFspPkg/Include/Private/FspPatchTable.h +++ b/IntelFspPkg/Include/Private/FspPatchTable.h @@ -25,7 +25,6 @@ typedef struct { UINT8 Reserved; UINT32 PatchEntryNum; UINT32 PatchData[FixedPcdGet32(PcdFspMaxPatchEntry)]; - UINT32 VpdBase; } FSP_PATCH_TABLE; #pragma pack() diff --git a/IntelFspPkg/IntelFspPkg.dec b/IntelFspPkg/IntelFspPkg.dec index ab934f9f54..1f286c1c7d 100644 --- a/IntelFspPkg/IntelFspPkg.dec +++ b/IntelFspPkg/IntelFspPkg.dec @@ -49,7 +49,6 @@ # Guid define in FSP EAS gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } } - gFspBootLoaderTempMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } } gFspBootLoaderTemporaryMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } } gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } } gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } } diff --git a/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf b/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf index 4e528d0e9a..1ec6e4e37f 100644 --- a/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf +++ b/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf @@ -39,7 +39,7 @@ gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES [Guids] - gFspBootLoaderTempMemoryGuid ## PRODUCES ## HOB + gFspBootLoaderTemporaryMemoryGuid ## PRODUCES ## HOB [FixedPcd] gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES diff --git a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c index 6fb4dca765..241cd284fb 100644 --- a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c +++ b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c @@ -103,10 +103,11 @@ FspMigrateTemporaryMemory ( // Build a Boot Loader Temporary Memory GUID HOB // if (ApiMode == 0) { - BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTempMemoryGuid, BootLoaderTempRamSize); + BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTemporaryMemoryGuid, BootLoaderTempRamSize); } else { - BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize); + BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize); } + ASSERT(BootLoaderTempRamHob != NULL); CopyMem (BootLoaderTempRamHob, (VOID *)BootLoaderTempRamStart, BootLoaderTempRamSize); OffsetGap = (UINT32)BootLoaderTempRamHob - BootLoaderTempRamStart; diff --git a/IntelFspPkg/Tools/GenCfgOpt.py b/IntelFspPkg/Tools/GenCfgOpt.py index 06e426aa16..7e59801879 100644 --- a/IntelFspPkg/Tools/GenCfgOpt.py +++ b/IntelFspPkg/Tools/GenCfgOpt.py @@ -254,10 +254,10 @@ EndList ElifStack[-1] = ElifStack[-1] + 1 else: if len(DscLine) > 0 and DscLine[0] == '!': - # - # Current it can only handle build switch. - # It does not support INF file in included dsc. - # + # + # Current it can only handle build switch. + # It does not support INF file in included dsc. + # else: if reduce(lambda x,y: x and y, IfStack): Handle = True @@ -619,8 +619,8 @@ EndList ImageRev = struct.unpack('TempRamInitEntryOffset != 0); + ASSERT (FspHeader->FspInitEntryOffset != 0); + ASSERT (FspHeader->NotifyPhaseEntryOffset != 0); + if ((PcdGet8 (PcdFspApiVersion) >= 2) && (FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) && - (FspHeader->ApiEntryNum >= 6) && - (FspHeader->FspMemoryInitEntryOffset != 0) && - (FspHeader->TempRamExitEntryOffset != 0) && - (FspHeader->FspSiliconInitEntryOffset != 0) ) { - PcdFspApiVersion = FSP_HEADER_REVISION_2; + (FspHeader->ApiEntryNum >= 6) ) { + ASSERT (FspHeader->FspMemoryInitEntryOffset != 0); + ASSERT (FspHeader->TempRamExitEntryOffset != 0); + ASSERT (FspHeader->FspSiliconInitEntryOffset != 0); + PcdFspApiVersion = PcdGet8 (PcdFspApiVersion); } DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion)); - if (PcdFspApiVersion == FSP_HEADER_REVISION_1) { + if (PcdFspApiVersion == 1) { PeiFspInitV1 (FspHeader); } else { PeiFspInitV2 (FspHeader); diff --git a/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c b/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c index 6ddbf7f1b3..7cad84effb 100644 --- a/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c +++ b/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c @@ -169,6 +169,7 @@ PeiFspMemoryInit ( FspMemoryInitParams.NvsBufferPtr = GetNvsBuffer (); DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n", FspMemoryInitParams.NvsBufferPtr)); FspMemoryInitParams.RtBufferPtr = (VOID *)&FspRtBuffer; + FspHobList = NULL; FspMemoryInitParams.HobListPtr = &FspHobList; DEBUG ((DEBUG_INFO, "FspMemoryInitParams - 0x%x\n", &FspMemoryInitParams)); @@ -184,6 +185,7 @@ PeiFspMemoryInit ( ASSERT_EFI_ERROR (Status); DEBUG ((DEBUG_INFO, " HobListPtr (returned) - 0x%x\n", FspHobList)); + ASSERT (FspHobList != NULL); FspHobProcessForMemoryResource (FspHobList);