UefiCpuPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739 Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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mergify[bot]
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@@ -751,7 +751,7 @@ SmmRestoreCpu (
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IA32_IDT_GATE_DESCRIPTOR IdtEntryTable[EXCEPTION_VECTOR_NUMBER];
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EFI_STATUS Status;
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DEBUG ((EFI_D_INFO, "SmmRestoreCpu()\n"));
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DEBUG ((DEBUG_INFO, "SmmRestoreCpu()\n"));
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mSmmS3Flag = TRUE;
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@@ -759,7 +759,7 @@ SmmRestoreCpu (
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// See if there is enough context to resume PEI Phase
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//
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if (mSmmS3ResumeState == NULL) {
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DEBUG ((EFI_D_ERROR, "No context to return to PEI Phase\n"));
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DEBUG ((DEBUG_ERROR, "No context to return to PEI Phase\n"));
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CpuDeadLoop ();
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}
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@@ -822,17 +822,17 @@ SmmRestoreCpu (
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//
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mRestoreSmmConfigurationInS3 = TRUE;
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DEBUG (( EFI_D_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));
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DEBUG (( EFI_D_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));
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DEBUG (( EFI_D_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));
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DEBUG (( EFI_D_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));
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DEBUG (( EFI_D_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
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DEBUG (( DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));
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DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));
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DEBUG (( DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));
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DEBUG (( DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));
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DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
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//
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// If SMM is in 32-bit mode, then use SwitchStack() to resume PEI Phase
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//
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if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
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DEBUG ((EFI_D_INFO, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));
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DEBUG ((DEBUG_INFO, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));
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SwitchStack (
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(SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->ReturnEntryPoint,
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@@ -846,7 +846,7 @@ SmmRestoreCpu (
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// If SMM is in 64-bit mode, then use AsmDisablePaging64() to resume PEI Phase
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//
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if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
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DEBUG ((EFI_D_INFO, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));
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DEBUG ((DEBUG_INFO, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));
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//
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// Disable interrupt of Debug timer, since new IDT table is for IA32 and will not work in long mode.
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//
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@@ -867,7 +867,7 @@ SmmRestoreCpu (
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//
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// Can not resume PEI Phase
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//
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DEBUG ((EFI_D_ERROR, "No context to return to PEI Phase\n"));
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DEBUG ((DEBUG_ERROR, "No context to return to PEI Phase\n"));
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CpuDeadLoop ();
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}
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@@ -904,8 +904,8 @@ InitSmmS3ResumeState (
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} else {
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SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);
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DEBUG ((EFI_D_INFO, "SMM S3 SMRAM Structure = %x\n", SmramDescriptor));
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DEBUG ((EFI_D_INFO, "SMM S3 Structure = %x\n", SmramDescriptor->CpuStart));
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DEBUG ((DEBUG_INFO, "SMM S3 SMRAM Structure = %x\n", SmramDescriptor));
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DEBUG ((DEBUG_INFO, "SMM S3 Structure = %x\n", SmramDescriptor->CpuStart));
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SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;
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ZeroMem (SmmS3ResumeState, sizeof (SMM_S3_RESUME_STATE));
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