diff --git a/MdeModulePkg/Core/Pei/Ipf/InternalSwitchStack.c b/MdeModulePkg/Core/Pei/Ipf/InternalSwitchStack.c
deleted file mode 100644
index 4e5df1a44a..0000000000
--- a/MdeModulePkg/Core/Pei/Ipf/InternalSwitchStack.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/** @file
- SwitchStack() function for IPF.
-
- Copyright (c) 2007, Intel Corporation
- All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include
-
-VOID
-EFIAPI
-IpfAsmSwitchStack (
- IN SWITCH_STACK_ENTRY_POINT EntryPoint,
- IN VOID *ConText1, OPTIONAL
- IN VOID *Context2, OPTIONAL
- IN VOID *Context3, OPTIONAL
- IN VOID *NewStack,
- IN VOID *NewBsp
- );
-
-/**
- Transfers control to a function starting with a new stack.
-
- Transfers control to the function specified by EntryPoint using the
- new stack specified by NewStack and passing in the parameters specified
- by Context1 and Context2. Context1 and Context2 are optional and may
- be NULL. The function EntryPoint must never return.
- Marker will be ignored on IA-32, x64, and EBC.
- IPF CPUs expect one additional parameter of type VOID * that specifies
- the new backing store pointer.
-
- If EntryPoint is NULL, then ASSERT().
- If NewStack is NULL, then ASSERT().
-
- @param EntryPoint A pointer to function to call with the new stack.
- @param Context1 A pointer to the context to pass into the EntryPoint
- function.
- @param Context2 A pointer to the context to pass into the EntryPoint
- function.
- @param NewStack A pointer to the new stack to use for the EntryPoint
- function.
- @param Marker VA_LIST marker for the variable argument list.
-
-**/
-VOID
-EFIAPI
-InternalSwitchStack (
- IN SWITCH_STACK_ENTRY_POINT EntryPoint,
- IN VOID *Context1, OPTIONAL
- IN VOID *Context2, OPTIONAL
- IN VOID *Context3, OPTIONAL
- IN VOID *NewStack,
- IN VA_LIST Marker
- )
-
-{
- VOID *NewBsp;
-
- //
- // Get new backing store pointer from variable list
- //
- NewBsp = VA_ARG (Marker, VOID *);
-
- //
- // Stack should be aligned with CPU_STACK_ALIGNMENT
- //
- ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);
- ASSERT (((UINTN)NewBsp & (CPU_STACK_ALIGNMENT - 1)) == 0);
-
- IpfAsmSwitchStack (EntryPoint, Context1, Context2, Context3, NewStack, NewBsp);
-}
diff --git a/MdeModulePkg/Core/Pei/Ipf/IpfCpuCore.i b/MdeModulePkg/Core/Pei/Ipf/IpfCpuCore.i
deleted file mode 100644
index c8a209debc..0000000000
--- a/MdeModulePkg/Core/Pei/Ipf/IpfCpuCore.i
+++ /dev/null
@@ -1,93 +0,0 @@
-//++
-// Copyright (c) 2006, Intel Corporation
-// All rights reserved. This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// Module Name:
-//
-// IpfCpuCore.i
-//
-// Abstract:
-// IPF CPU definitions
-//
-//--
-
-#ifndef _IPF_CPU_CORE_
-#define _IPF_CPU_CORE_
-
-#define PEI_BSP_STORE_SIZE 0x4000
-#define ResetFn 0x00
-#define MachineCheckFn 0x01
-#define InitFn 0x02
-#define RecoveryFn 0x03
-#define GuardBand 0x10
-
-//
-// Define hardware RSE Configuration Register
-//
-
-//
-// RS Configuration (RSC) bit field positions
-//
-#define RSC_MODE 0
-#define RSC_PL 2
-#define RSC_BE 4
-//
-// RSC bits 5-15 reserved
-//
-#define RSC_MBZ0 5
-#define RSC_MBZ0_V 0x3ff
-#define RSC_LOADRS 16
-#define RSC_LOADRS_LEN 14
-//
-// RSC bits 30-63 reserved
-//
-#define RSC_MBZ1 30
-#define RSC_MBZ1_V 0x3ffffffffULL
-
-//
-// RSC modes
-//
-
-//
-// Lazy
-//
-#define RSC_MODE_LY (0x0)
-//
-// Store intensive
-//
-#define RSC_MODE_SI (0x1)
-//
-// Load intensive
-//
-#define RSC_MODE_LI (0x2)
-//
-// Eager
-//
-#define RSC_MODE_EA (0x3)
-
-//
-// RSC Endian bit values
-//
-#define RSC_BE_LITTLE 0
-#define RSC_BE_BIG 1
-
-//
-// RSC while in kernel: enabled, little endian, pl = 0, eager mode
-//
-#define RSC_KERNEL ((RSC_MODE_EA<