sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

1. Added EdkPciIncompatibleDeviceSupportLib in EdkModulePkg, this library is used for PciBus driver and includes 3 Incompatible device lists.

Browse Source 
2. Used EdkPciIncompatibleDeviceSupportLib in PciBus driver. 
3. Redirect all Pci Configuration access to new APIs added in PciLib.c for PciBus driver.
4. Added one PCD PcdIncompatibleDeviceSupportMask in EdkModulePkg.spd to provide mask of PCI devices incompatibility check.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2562 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff
2007-04-12 09:07:01 +00:00
parent 0eaa1933bc
commit 98419ef4b9
18 changed files with 2226 additions and 412 deletions
Download Patch File Download Diff File Expand all files Collapse all files

82
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c
View File

@ -1,18 +1,18 @@
/*++
Copyright (c) 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PciCommand.c
Abstract:
PCI Bus Driver
@ -56,13 +56,13 @@ Returns:
PciIo = &PciIoDevice->PciIo;
if (Operation != EFI_SET_REGISTER) {
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint16,
Offset,
1,
&OldCommand
);
Status = PciIoRead (
PciIo,
EfiPciIoWidthUint16,
Offset,
1,
&OldCommand
);
if (Operation == EFI_GET_REGISTER) {
*PtrCommand = OldCommand;
@ -78,13 +78,13 @@ Returns:
OldCommand = Command;
}
return PciIo->Pci.Write (
return PciIoWrite (
PciIo,
EfiPciIoWidthUint16,
Offset,
1,
&OldCommand
);
);
}
BOOLEAN
@ -98,7 +98,7 @@ Routine Description:
Arguments:
Returns:
None
--*/
@ -131,7 +131,7 @@ Arguments:
NextRegBlock - A pointer to the next block.
Returns:
None
--*/
@ -157,22 +157,22 @@ Returns:
CapabilityPtr = 0;
if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
1,
&CapabilityPtr
);
PciIoRead (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
1,
&CapabilityPtr
);
} else {
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
EFI_PCI_CAPABILITY_PTR,
1,
&CapabilityPtr
);
PciIoRead (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
EFI_PCI_CAPABILITY_PTR,
1,
&CapabilityPtr
);
}
}
@ -181,13 +181,13 @@ Returns:
// Mask it to DWORD alignment per PCI spec
//
CapabilityPtr &= 0xFC;
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint16,
CapabilityPtr,
1,
&CapabilityEntry
);
PciIoRead (
&PciIoDevice->PciIo,
EfiPciIoWidthUint16,
CapabilityPtr,
1,
&CapabilityEntry
);
CapabilityID = (UINT8) CapabilityEntry;