Add Add ARM support

Add C inline assembly files for IA32 and X64 GCC builds.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9114 6f19259b-4bc3-4df7-8a09-765794883524

MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S

@@ -0,0 +1,36 @@
+#------------------------------------------------------------------------------ 
+#
+# CpuFlushTlb() for ARM
+#
+# Copyright (c) 2006 - 2009, Intel Corporation<BR>
+# Portions copyright (c) 2008-2009 Apple Inc.<BR>
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+.text
+.p2align 2
+.globl ASM_PFX(CpuFlushTlb)
+
+#/**
+#  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+#
+#  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+#
+#**/
+#VOID
+#EFIAPI
+#CpuFlushTlb (
+#  VOID
+#  )#
+#
+ASM_PFX(CpuFlushTlb):
+    mov r0,#0
+    mcr p15,0,r0,c8,c5,0        # Invalidate all the unlocked entried in TLB
+    bx  LR

MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm

@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------ 
+;
+; CpuFlushTlb() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation<BR>
+; Portions copyright (c) 2008-2009 Apple Inc.<BR>
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+  EXPORT CpuFlushTlb
+  AREA cpu_flush_tlb, CODE, READONLY
+
+;/**
+;  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuFlushTlb (
+;  VOID
+;  );
+;
+CpuFlushTlb 
+    MOV r0,#0
+    MCR p15,0,r0,c8,c5,0        ;Invalidate all the unlocked entried in TLB
+    BX LR
+
+  END

MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S

@@ -0,0 +1,38 @@
+#------------------------------------------------------------------------------ 
+#
+# CpuSleep() for ARM
+#
+# Copyright (c) 2006 - 2009, Intel Corporation<BR>
+# Portions copyright (c) 2008-2009 Apple Inc.<BR>
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+.text
+.p2align 2
+.globl ASM_PFX(CpuSleep)
+
+#/**
+#  Places the CPU in a sleep state until an interrupt is received.
+#
+#  Places the CPU in a sleep state until an interrupt is received. If interrupts
+#  are disabled prior to calling this function, then the CPU will be placed in a
+#  sleep state indefinitely.
+#
+#**/
+#VOID
+#EFIAPI
+#CpuSleep (
+#  VOID
+#  );
+#
+ASM_PFX(CpuSleep):
+    mov r0,#0
+    mcr p15,0,r0,c7,c0,4   ;Wait for Interrupt instruction
+    bx  lr

MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm

@@ -0,0 +1,39 @@
+;------------------------------------------------------------------------------ 
+;
+; CpuSleep() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation<BR>
+; Portions copyright (c) 2008-2009 Apple Inc.<BR>
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+  EXPORT CpuSleep
+  AREA cpu_sleep, CODE, READONLY
+
+;/**
+;  Places the CPU in a sleep state until an interrupt is received.
+;
+;  Places the CPU in a sleep state until an interrupt is received. If interrupts
+;  are disabled prior to calling this function, then the CPU will be placed in a
+;  sleep state indefinitely.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuSleep (
+;  VOID
+;  );
+;
+CpuSleep
+    MOV r0,#0
+    MCR p15,0,r0,c7,c0,4   ;Wait for Interrupt instruction
+    BX LR
+
+  END