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OvmfPkg: Handle Cloud Hypervisor host bridge

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Handle things differently when the detected host bridge matches the
Cloud Hypervisor PCI host bridge identifier.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
This commit is contained in:
Sebastien Boeuf
2021-12-10 22:41:54 +08:00
committed by mergify[bot]
parent e81a81e584
commit 9afcd48a94
10 changed files with 78 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
View File

@@ -55,6 +55,9 @@ AcpiTimerLibConstructor (
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
case CLOUDHV_DEVICE_ID:
mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;
return RETURN_SUCCESS;
default:
DEBUG ((
DEBUG_ERROR,

4
OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
View File

@@ -53,6 +53,8 @@ AcpiTimerLibConstructor (
AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
break;
case CLOUDHV_DEVICE_ID:
return RETURN_SUCCESS;
default:
DEBUG ((
DEBUG_ERROR,
@@ -111,6 +113,8 @@ InternalAcpiGetTimerTick (
case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break;
case CLOUDHV_DEVICE_ID:
return IoRead32 (CLOUDHV_ACPI_TIMER_IO_ADDRESS);
default:
DEBUG ((
DEBUG_ERROR,

3
OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
View File

@@ -50,6 +50,9 @@ AcpiTimerLibConstructor (
case INTEL_Q35_MCH_DEVICE_ID:
Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
break;
case CLOUDHV_DEVICE_ID:
mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;
return RETURN_SUCCESS;
default:
DEBUG ((
DEBUG_ERROR,

1
OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
View File

@@ -1390,6 +1390,7 @@ PciAcpiInitialization (
PciWrite8 (PCI_LIB_ADDRESS (0, 0x1f, 0, 0x6b), PciHostIrqs[3]); // H
break;
case MICROVM_PSEUDO_DEVICE_ID:
case CLOUDHV_DEVICE_ID:
return;
default:
if (XenDetected ()) {

3
OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c
View File

@@ -40,6 +40,9 @@ ResetShutdown (
case INTEL_Q35_MCH_DEVICE_ID:
AcpiPmBaseAddress = ICH9_PMBASE_VALUE;
break;
case CLOUDHV_DEVICE_ID:
IoWrite8 (CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS, 5 << 2 | 1 << 5);
CpuDeadLoop ();
default:
ASSERT (FALSE);
CpuDeadLoop ();

13
OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c
View File

@@ -16,6 +16,7 @@
#include <OvmfPlatforms.h> // PIIX4_PMBA_VALUE
STATIC UINT16 mAcpiPmBaseAddress;
STATIC UINT16 mAcpiHwReducedSleepCtl;
EFI_STATUS
EFIAPI
@@ -34,6 +35,9 @@ DxeResetInit (
case INTEL_Q35_MCH_DEVICE_ID:
mAcpiPmBaseAddress = ICH9_PMBASE_VALUE;
break;
case CLOUDHV_DEVICE_ID:
mAcpiHwReducedSleepCtl = CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS;
break;
default:
ASSERT (FALSE);
CpuDeadLoop ();
@@ -56,7 +60,12 @@ ResetShutdown (
VOID
)
{
IoBitFieldWrite16 (mAcpiPmBaseAddress + 4, 10, 13, 0);
IoOr16 (mAcpiPmBaseAddress + 4, BIT13);
if (mAcpiHwReducedSleepCtl) {
IoWrite8 (mAcpiHwReducedSleepCtl, 5 << 2 | 1 << 5);
} else {
IoBitFieldWrite16 (mAcpiPmBaseAddress + 4, 10, 13, 0);
IoOr16 (mAcpiPmBaseAddress + 4, BIT13);
}
CpuDeadLoop ();
}