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QuarkSocPkg: Add new package for Quark SoC X1000

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Changes for V4
==============
1) Remove Unicode character from C source file
2) Move delete of QuarkSocPkg\QuarkNorthCluster\Binary\QuarkMicrocode
   from QuarkPlatformPkg commit to QuarkSocPkg commit

Changes for V2
==============
1) Sync with new APIs in SmmCpuFeaturesLib class
2) Use new generic PCI serial driver PciSioSerialDxe in MdeModulePkg
3) Remove PCI serial driver from QuarkSocPkg
4) Apply optimizations to MtrrLib from MtrrLib in UefiCpuPkg
5) Convert all UNI files to utf-8
6) Replace tabs with spaces and remove trailing spaces
7) Add License.txt

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19286 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Michael Kinney
2015-12-15 19:22:23 +00:00
committed by mdkinney
parent 46ff196fde
commit 9b6bbcdbfd
176 changed files with 54761 additions and 0 deletions
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54
QuarkSocPkg/QuarkNorthCluster/Include/Protocol/PchInfo.h Normal file
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/** @file
This file defines the QNC Info Protocol.
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _PCH_INFO_H_
#define _PCH_INFO_H_
//
// Extern the GUID for protocol users.
//
extern EFI_GUID gEfiQncInfoProtocolGuid;
//
// Forward reference for ANSI C compatibility
//
typedef struct _EFI_QNC_INFO_PROTOCOL EFI_QNC_INFO_PROTOCOL;
//
// Protocol revision number
// Any backwards compatible changes to this protocol will result in an update in the revision number
// Major changes will require publication of a new protocol
//
// Revision 1: Original version
// Revision 2: Add RCVersion item to EFI_QNC_INFO_PROTOCOL
//
#define QNC_INFO_PROTOCOL_REVISION_1 1
#define QNC_INFO_PROTOCOL_REVISION_2 2
//
// RCVersion[7:0] is the release number.
//
#define QNC_RC_VERSION 0x01020000
//
// Protocol definition
//
struct _EFI_QNC_INFO_PROTOCOL {
UINT8 Revision;
UINT8 BusNumber;
UINT32 RCVersion;
};
#endif

37
QuarkSocPkg/QuarkNorthCluster/Include/Protocol/PlatformPolicy.h Normal file
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/** @file
Protocol used for Platform Policy definition.
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _PLATFORM_POLICY_H_
#define _PLATFORM_POLICY_H_
typedef struct _EFI_PLATFORM_POLICY_PROTOCOL EFI_PLATFORM_POLICY_PROTOCOL;
#define EFI_PLATFORM_POLICY_PROTOCOL_GUID \
{ \
0x2977064f, 0xab96, 0x4fa9, { 0x85, 0x45, 0xf9, 0xc4, 0x02, 0x51, 0xe0, 0x7f } \
}
//
// Protocol to describe various platform information. Add to this as needed.
//
struct _EFI_PLATFORM_POLICY_PROTOCOL {
UINT8 NumRsvdSmbusAddresses;
UINT8 *RsvdSmbusAddresses;
};
extern EFI_GUID gEfiPlatformPolicyProtocolGuid;
#endif

90
QuarkSocPkg/QuarkNorthCluster/Include/Protocol/QncS3Support.h Normal file
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/** @file
This file defines the QNC S3 support Protocol.
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _QNC_S3_SUPPORT_PROTOCOL_H_
#define _QNC_S3_SUPPORT_PROTOCOL_H_
//
// Extern the GUID for protocol users.
//
extern EFI_GUID gEfiQncS3SupportProtocolGuid;
//
// Forward reference for ANSI C compatibility
//
typedef struct _EFI_QNC_S3_SUPPORT_PROTOCOL EFI_QNC_S3_SUPPORT_PROTOCOL;
typedef enum {
QncS3ItemTypeInitPcieRootPortDownstream,
QncS3ItemTypeMax
} EFI_QNC_S3_DISPATCH_ITEM_TYPE;
//
// It's better not to use pointer here because the size of pointer in DXE is 8, but it's 4 in PEI
// plug 4 to ParameterSize in PEIM if you really need it
//
typedef struct {
UINT32 Reserved;
} EFI_QNC_S3_PARAMETER_INIT_PCIE_ROOT_PORT_DOWNSTREAM;
typedef union {
EFI_QNC_S3_PARAMETER_INIT_PCIE_ROOT_PORT_DOWNSTREAM PcieRootPortData;
} EFI_DISPATCH_CONTEXT_UNION;
typedef struct {
EFI_QNC_S3_DISPATCH_ITEM_TYPE Type;
VOID *Parameter;
} EFI_QNC_S3_DISPATCH_ITEM;
//
// Member functions
//
typedef
EFI_STATUS
(EFIAPI *EFI_QNC_S3_SUPPORT_SET_S3_DISPATCH_ITEM) (
IN EFI_QNC_S3_SUPPORT_PROTOCOL * This,
IN EFI_QNC_S3_DISPATCH_ITEM * DispatchItem,
OUT VOID **S3DispatchEntryPoint,
OUT VOID **Context
);
/*++
Routine Description:
Set an item to be dispatched at S3 resume time. At the same time, the entry point
of the QNC S3 support image is returned to be used in subsequent boot script save
call
Arguments:
This - Pointer to the protocol instance.
DispatchItem - The item to be dispatched.
S3DispatchEntryPoint - The entry point of the QNC S3 support image.
Returns:
EFI_STATUS
--*/
//
// Protocol definition
//
struct _EFI_QNC_S3_SUPPORT_PROTOCOL {
EFI_QNC_S3_SUPPORT_SET_S3_DISPATCH_ITEM SetDispatchItem;
};
#endif

121
QuarkSocPkg/QuarkNorthCluster/Include/Protocol/SmmIchnDispatch2.h Normal file
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/** @file
Intel-only SMM Child Dispatcher Protocol.
This protocol provides a parent dispatch service for a collection of
chipset-specific SMI source.
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __SMM_ICHN_DISPATCH2_H__
#define __SMM_ICHN_DISPATCH2_H__
//
// Share some common definitions with Framework SMM
//
#include <Protocol/SmmIchnDispatch.h>
#include <PiSmm.h>
//
// Global ID for the ICH SMI Protocol
//
#define EFI_SMM_ICHN_DISPATCH2_PROTOCOL_GUID \
{ \
0xadf3a128, 0x416d, 0x4060, {0x8d, 0xdf, 0x30, 0xa1, 0xd7, 0xaa, 0xb6, 0x99 } \
}
typedef struct _EFI_SMM_ICHN_DISPATCH2_PROTOCOL EFI_SMM_ICHN_DISPATCH2_PROTOCOL;
typedef struct {
EFI_SMM_ICHN_SMI_TYPE Type;
} EFI_SMM_ICHN_REGISTER_CONTEXT;
//
// Member functions
//
/**
Register a child SMI source dispatch function with a parent SMM driver
@param This Protocol instance pointer.
@param DispatchFunction Pointer to dispatch function to be invoked for
this SMI source
@param RegisterContext Pointer to the dispatch function's context.
The caller fills this context in before calling
the register function to indicate to the register
function the ICHN SMI source for which the dispatch
function should be invoked.
@param DispatchHandle Handle generated by the dispatcher to track the
function instance.
@retval EFI_SUCCESS The dispatch function has been successfully
registered and the SMI source has been enabled.
@retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
@retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
child.
@retval EFI_INVALID_PARAMETER RegisterContext is invalid. The ICHN input value
is not within valid range.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_SMM_ICHN_DISPATCH2_REGISTER) (
IN CONST EFI_SMM_ICHN_DISPATCH2_PROTOCOL *This,
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,
IN OUT EFI_SMM_ICHN_REGISTER_CONTEXT *RegisterContext,
OUT EFI_HANDLE *DispatchHandle
);
/**
Unregister a child SMI source dispatch function with a parent SMM driver
@param This Protocol instance pointer.
@param DispatchHandle Handle of dispatch function to deregister.
@retval EFI_SUCCESS The dispatch function has been successfully
unregistered and the SMI source has been disabled
if there are no other registered child dispatch
functions for this SMI source.
@retval EFI_INVALID_PARAMETER Handle is invalid.
@retval other
**/
typedef
EFI_STATUS
(EFIAPI *EFI_SMM_ICHN_DISPATCH2_UNREGISTER) (
IN EFI_SMM_ICHN_DISPATCH2_PROTOCOL *This,
IN EFI_HANDLE DispatchHandle
);
//
// Interface structure for the SMM Ich n specific SMI Dispatch Protocol
//
/**
@par Protocol Description:
Provides a parent dispatch service for ICH SMI sources.
@param Register
Installs a child service to be dispatched by this protocol.
@param UnRegister
Removes a child service dispatched by this protocol.
**/
struct _EFI_SMM_ICHN_DISPATCH2_PROTOCOL {
EFI_SMM_ICHN_DISPATCH2_REGISTER Register;
EFI_SMM_ICHN_DISPATCH2_UNREGISTER UnRegister;
};
extern EFI_GUID gEfiSmmIchnDispatch2ProtocolGuid;
#endif

351
QuarkSocPkg/QuarkNorthCluster/Include/Protocol/Spi.h Normal file
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/** @file
This file defines the EFI SPI Protocol which implements the
Intel(R) ICH SPI Host Controller Compatibility Interface.
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _SPI_H_
#define _SPI_H_
//
// Define the SPI protocol GUID
//
// EDK and EDKII have different GUID formats
//
#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
#define EFI_SPI_PROTOCOL_GUID \
{ \
0x1156efc6, 0xea32, 0x4396, 0xb5, 0xd5, 0x26, 0x93, 0x2e, 0x83, 0xc3, 0x13 \
}
#define EFI_SMM_SPI_PROTOCOL_GUID \
{ \
0xD9072C35, 0xEB8F, 0x43ad, 0xA2, 0x20, 0x34, 0xD4, 0x0E, 0x2A, 0x82, 0x85 \
}
#else
#define EFI_SPI_PROTOCOL_GUID \
{ \
0x1156efc6, 0xea32, 0x4396, \
{ \
0xb5, 0xd5, 0x26, 0x93, 0x2e, 0x83, 0xc3, 0x13 \
} \
}
#define EFI_SMM_SPI_PROTOCOL_GUID \
{ \
0xD9072C35, 0xEB8F, 0x43ad, \
{ \
0xA2, 0x20, 0x34, 0xD4, 0x0E, 0x2A, 0x82, 0x85 \
} \
}
#endif
//
// Extern the GUID for protocol users.
//
extern EFI_GUID gEfiSpiProtocolGuid;
extern EFI_GUID gEfiSmmSpiProtocolGuid;
//
// Forward reference for ANSI C compatibility
//
typedef struct _EFI_SPI_PROTOCOL EFI_SPI_PROTOCOL;
//
// SPI protocol data structures and definitions
//
//
// Number of Prefix Opcodes allowed on the SPI interface
//
#define SPI_NUM_PREFIX_OPCODE 2
//
// Number of Opcodes in the Opcode Menu
//
#define SPI_NUM_OPCODE 8
#ifdef SERVER_BIOS_FLAG
//
// SPI default opcode slots
//
#define SPI_OPCODE_JEDEC_ID_INDEX 0
#endif // SERVER_BIOS_FLAG
//
// Opcode Type
// EnumSpiOpcodeCommand: Command without address
// EnumSpiOpcodeRead: Read with address
// EnumSpiOpcodeWrite: Write with address
//
typedef enum {
EnumSpiOpcodeReadNoAddr,
EnumSpiOpcodeWriteNoAddr,
EnumSpiOpcodeRead,
EnumSpiOpcodeWrite,
EnumSpiOpcodeMax
} SPI_OPCODE_TYPE;
typedef enum {
EnumSpiCycle20MHz,
EnumSpiCycle33MHz,
EnumSpiCycle66MHz, // not supported by PCH
EnumSpiCycle50MHz,
EnumSpiCycleMax
} SPI_CYCLE_FREQUENCY;
typedef enum {
EnumSpiRegionAll,
EnumSpiRegionBios,
EnumSpiRegionMe,
EnumSpiRegionGbE,
EnumSpiRegionDescriptor,
EnumSpiRegionPlatformData,
EnumSpiRegionMax
} SPI_REGION_TYPE;
//
// Hardware Sequencing required operations (as listed in CougarPoint EDS Table 5-55: "Hardware
// Sequencing Commands and Opcode Requirements"
//
typedef enum {
EnumSpiOperationWriteStatus,
EnumSpiOperationProgramData_1_Byte,
EnumSpiOperationProgramData_64_Byte,
EnumSpiOperationReadData,
EnumSpiOperationWriteDisable,
EnumSpiOperationReadStatus,
EnumSpiOperationWriteEnable,
EnumSpiOperationFastRead,
EnumSpiOperationEnableWriteStatus,
EnumSpiOperationErase_256_Byte,
EnumSpiOperationErase_4K_Byte,
EnumSpiOperationErase_8K_Byte,
EnumSpiOperationErase_64K_Byte,
EnumSpiOperationFullChipErase,
EnumSpiOperationJedecId,
EnumSpiOperationDualOutputFastRead,
EnumSpiOperationDiscoveryParameters,
EnumSpiOperationOther,
EnumSpiOperationMax
} SPI_OPERATION;
//
// Opcode menu entries
// Type Operation Type (value to be programmed to the OPTYPE register)
// Code The opcode (value to be programmed to the OPMENU register)
// Frequency The expected frequency to be used (value to be programmed to the SSFC
// Register)
// Operation Which Hardware Sequencing required operation this opcode respoinds to.
// The required operations are listed in EDS Table 5-55: "Hardware
// Sequencing Commands and Opcode Requirements"
// If the opcode does not corresponds to any operation listed, use
// EnumSpiOperationOther
//
typedef struct _SPI_OPCODE_MENU_ENTRY {
SPI_OPCODE_TYPE Type;
UINT8 Code;
SPI_CYCLE_FREQUENCY Frequency;
SPI_OPERATION Operation;
} SPI_OPCODE_MENU_ENTRY;
//
// Initialization data table loaded to the SPI host controller
// VendorId Vendor ID of the SPI device
// DeviceId0 Device ID0 of the SPI device
// DeviceId1 Device ID1 of the SPI device
// PrefixOpcode Prefix opcodes which are loaded into the SPI host controller
// OpcodeMenu Opcodes which are loaded into the SPI host controller Opcode Menu
// BiosStartOffset The offset of the start of the BIOS image relative to the flash device.
// Please note this is a Flash Linear Address, NOT a memory space address.
// This value is platform specific and depends on the system flash map.
// This value is only used on non Descriptor mode.
// BiosSize The the BIOS Image size in flash. This value is platform specific
// and depends on the system flash map. Please note BIOS Image size may
// be smaller than BIOS Region size (in Descriptor Mode) or the flash size
// (in Non Descriptor Mode), and in this case, BIOS Image is supposed to be
// placed at the top end of the BIOS Region (in Descriptor Mode) or the flash
// (in Non Descriptor Mode)
//
typedef struct _SPI_INIT_TABLE {
UINT8 VendorId;
UINT8 DeviceId0;
UINT8 DeviceId1;
UINT8 PrefixOpcode[SPI_NUM_PREFIX_OPCODE];
SPI_OPCODE_MENU_ENTRY OpcodeMenu[SPI_NUM_OPCODE];
UINTN BiosStartOffset;
UINTN BiosSize;
} SPI_INIT_TABLE;
//
// Public Info struct to show current initialized state of the spi interface.
// OpcodeIndex must be less then SPI_NUM_OPCODE for operation to be supported.
//
typedef struct _SPI_INIT_INFO {
SPI_INIT_TABLE *InitTable;
UINT8 JedecIdOpcodeIndex;
UINT8 OtherOpcodeIndex;
UINT8 WriteStatusOpcodeIndex;
UINT8 ProgramOpcodeIndex;
UINT8 ReadOpcodeIndex;
UINT8 EraseOpcodeIndex;
UINT8 ReadStatusOpcodeIndex;
UINT8 FullChipEraseOpcodeIndex;
} SPI_INIT_INFO;
//
// Protocol member functions
//
typedef
EFI_STATUS
(EFIAPI *EFI_SPI_INIT) (
IN EFI_SPI_PROTOCOL * This,
IN SPI_INIT_TABLE * InitTable
);
/*++
Routine Description:
Initializes the host controller to execute SPI commands.
Arguments:
This Pointer to the EFI_SPI_PROTOCOL instance.
InitTable Pointer to caller-allocated buffer containing the SPI
interface initialization table.
Returns:
EFI_SUCCESS Opcode initialization on the SPI host controller completed.
EFI_ACCESS_DENIED The SPI configuration interface is locked.
EFI_OUT_OF_RESOURCES Not enough resource available to initialize the device.
EFI_DEVICE_ERROR Device error, operation failed.
--*/
typedef
EFI_STATUS
(EFIAPI *EFI_SPI_LOCK) (
IN EFI_SPI_PROTOCOL * This
);
/*++
Routine Description:
Lock the SPI Static Configuration Interface.
Once locked, the interface is no longer open for configuration changes.
The lock state automatically clears on next system reset.
Arguments:
This Pointer to the EFI_SPI_PROTOCOL instance.
Returns:
EFI_SUCCESS Lock operation succeed.
EFI_DEVICE_ERROR Device error, operation failed.
EFI_ACCESS_DENIED The interface has already been locked.
--*/
typedef
EFI_STATUS
(EFIAPI *EFI_SPI_EXECUTE) (
IN EFI_SPI_PROTOCOL * This,
IN UINT8 OpcodeIndex,
IN UINT8 PrefixOpcodeIndex,
IN BOOLEAN DataCycle,
IN BOOLEAN Atomic,
IN BOOLEAN ShiftOut,
IN UINTN Address,
IN UINT32 DataByteCount,
IN OUT UINT8 *Buffer,
IN SPI_REGION_TYPE SpiRegionType
);
/*++
Routine Description:
Execute SPI commands from the host controller.
Arguments:
This Pointer to the EFI_SPI_PROTOCOL instance.
OpcodeIndex Index of the command in the OpCode Menu.
PrefixOpcodeIndex Index of the first command to run when in an atomic cycle sequence.
DataCycle TRUE if the SPI cycle contains data
Atomic TRUE if the SPI cycle is atomic and interleave cycles are not allowed.
ShiftOut If DataByteCount is not zero, TRUE to shift data out and FALSE to shift data in.
Address In Descriptor Mode, for Descriptor Region, GbE Region, ME Region and Platform
Region, this value specifies the offset from the Region Base; for BIOS Region,
this value specifies the offset from the start of the BIOS Image. In Non
Descriptor Mode, this value specifies the offset from the start of the BIOS Image.
Please note BIOS Image size may be smaller than BIOS Region size (in Descriptor
Mode) or the flash size (in Non Descriptor Mode), and in this case, BIOS Image is
supposed to be placed at the top end of the BIOS Region (in Descriptor Mode) or
the flash (in Non Descriptor Mode)
DataByteCount Number of bytes in the data portion of the SPI cycle.
Buffer Pointer to caller-allocated buffer containing the dada received or sent during the SPI cycle.
SpiRegionType SPI Region type. Values EnumSpiRegionBios, EnumSpiRegionGbE, EnumSpiRegionMe,
EnumSpiRegionDescriptor, and EnumSpiRegionPlatformData are only applicable in
Descriptor mode. Value EnumSpiRegionAll is applicable to both Descriptor Mode
and Non Descriptor Mode, which indicates "SpiRegionOffset" is actually relative
to base of the 1st flash device (i.e., it is a Flash Linear Address).
Returns:
EFI_SUCCESS Command succeed.
EFI_INVALID_PARAMETER The parameters specified are not valid.
EFI_UNSUPPORTED Command not supported.
EFI_DEVICE_ERROR Device error, command aborts abnormally.
--*/
typedef
EFI_STATUS
(EFIAPI *EFI_SPI_INFO) (
IN EFI_SPI_PROTOCOL *This,
OUT SPI_INIT_INFO **InitInfoPtr
);
/*++
Routine Description:
Return info about SPI host controller, to help callers usage of Execute
service.
If 0xff is returned as an opcode index in init info struct
then device does not support the operation.
Arguments:
This Pointer to the EFI_SPI_PROTOCOL instance.
InitInfoPtr Pointer to init info written to this memory location.
Returns:
EFI_SUCCESS Information returned.
EFI_INVALID_PARAMETER Invalid parameter.
EFI_NOT_READY Required resources not setup.
Others Unexpected error happened.
--*/
//
// Protocol definition
//
struct _EFI_SPI_PROTOCOL {
EFI_SPI_INIT Init;
EFI_SPI_LOCK Lock;
EFI_SPI_EXECUTE Execute;
EFI_SPI_INFO Info;
};
#endif