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QuarkSocPkg: Add new package for Quark SoC X1000

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Changes for V4
==============
1) Remove Unicode character from C source file
2) Move delete of QuarkSocPkg\QuarkNorthCluster\Binary\QuarkMicrocode
   from QuarkPlatformPkg commit to QuarkSocPkg commit

Changes for V2
==============
1) Sync with new APIs in SmmCpuFeaturesLib class
2) Use new generic PCI serial driver PciSioSerialDxe in MdeModulePkg
3) Remove PCI serial driver from QuarkSocPkg
4) Apply optimizations to MtrrLib from MtrrLib in UefiCpuPkg
5) Convert all UNI files to utf-8
6) Replace tabs with spaces and remove trailing spaces
7) Add License.txt

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19286 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Michael Kinney
2015-12-15 19:22:23 +00:00
committed by mdkinney
parent 46ff196fde
commit 9b6bbcdbfd
176 changed files with 54761 additions and 0 deletions
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54
QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf Normal file
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## @file
# Component description file for SmmAccess module
#
# Copyright (c) 2013-2015 Intel Corporation.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = SmmAccess
FILE_GUID = 274F0C8F-9E57-41d8-9966-29CCD48D31C2
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = SmmAccessDriverEntryPoint
[Sources]
SmmAccessDriver.h
SmmAccessDriver.c
[Packages]
MdePkg/MdePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
QuarkSocPkg/QuarkSocPkg.dec
[LibraryClasses]
HobLib
DebugLib
UefiLib
BaseLib
BaseMemoryLib
S3BootScriptLib
UefiDriverEntryPoint
UefiBootServicesTableLib
PcdLib
SmmLib
[Protocols]
gEfiPciRootBridgeIoProtocolGuid
gEfiSmmAccess2ProtocolGuid
[Guids]
gEfiSmmPeiSmramMemoryReserveGuid
[Depex]
gEfiPciRootBridgeIoProtocolGuid

395
QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccessDriver.c Normal file
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/** @file
This is the driver that publishes the SMM Access Protocol
instance for the Tylersburg chipset.
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "SmmAccessDriver.h"
SMM_ACCESS_PRIVATE_DATA mSmmAccess;
VOID
SmmAccessOnBoot (
IN EFI_EVENT Event,
IN VOID *Context
);
EFI_STATUS
EFIAPI
SmmAccessDriverEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
/*++
Routine Description:
Installs an SMM Access Protocol.
Arguments:
ImageHandle - Handle for the image of this driver.
SystemTable - Pointer to the EFI System Table.
Returns:
EFI_SUCCESS - Protocol successfully started and installed.
EFI_UNSUPPORTED - Protocol can't be started.
EFI_NOT_FOUND - Protocol not found.
--*/
{
EFI_STATUS Status;
EFI_EVENT BootEvent;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
UINTN Index;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock;
EFI_HOB_GUID_TYPE *GuidHob;
//
// Initialize private data
//
ZeroMem (&mSmmAccess, sizeof (mSmmAccess));
Status = gBS->LocateProtocol (
&gEfiPciRootBridgeIoProtocolGuid,
NULL,
(VOID **) &PciRootBridgeIo
);
ASSERT_EFI_ERROR (Status);
//
// Build SMM related information
//
mSmmAccess.Signature = SMM_ACCESS_PRIVATE_DATA_SIGNATURE;
mSmmAccess.Handle = NULL;
mSmmAccess.PciRootBridgeIo = PciRootBridgeIo;
//
// Get Hob list
//
GuidHob = GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid);
DescriptorBlock = GET_GUID_HOB_DATA (GuidHob);
ASSERT (DescriptorBlock);
//
// Get CPU Max bus number
//
mSmmAccess.MaxBusNumber = PCI_BUS_NUMBER_QNC;
for (Index = 0; Index < MAX_CPU_SOCKET; Index++) {
mSmmAccess.SocketPopulated[Index] = TRUE;
}
//
// Use the hob to publish SMRAM capabilities
//
ASSERT (DescriptorBlock->NumberOfSmmReservedRegions <= MAX_SMRAM_RANGES);
for (Index = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) {
mSmmAccess.SmramDesc[Index].PhysicalStart = DescriptorBlock->Descriptor[Index].PhysicalStart;
mSmmAccess.SmramDesc[Index].CpuStart = DescriptorBlock->Descriptor[Index].CpuStart;
mSmmAccess.SmramDesc[Index].PhysicalSize = DescriptorBlock->Descriptor[Index].PhysicalSize;
mSmmAccess.SmramDesc[Index].RegionState = DescriptorBlock->Descriptor[Index].RegionState;
DEBUG ((EFI_D_INFO, "SM RAM index[%d] startaddr:%08X Size :%08X\n", Index, mSmmAccess.SmramDesc[Index].CpuStart,
mSmmAccess.SmramDesc[Index].PhysicalSize));
}
mSmmAccess.NumberRegions = Index;
mSmmAccess.SmmAccess.Open = Open;
mSmmAccess.SmmAccess.Close = Close;
mSmmAccess.SmmAccess.Lock = Lock;
mSmmAccess.SmmAccess.GetCapabilities = GetCapabilities;
mSmmAccess.SmmAccess.LockState = FALSE;
mSmmAccess.SmmAccess.OpenState = FALSE;
mSmmAccess.SMMRegionState = EFI_SMRAM_CLOSED;
//
// Install our protocol interfaces on the device's handle
//
Status = gBS->InstallMultipleProtocolInterfaces (
&mSmmAccess.Handle,
&gEfiSmmAccess2ProtocolGuid,
&mSmmAccess.SmmAccess,
NULL
);
ASSERT_EFI_ERROR (Status);
DEBUG ((EFI_D_INFO, "SMM Base: %08X\n", (UINT32)(mSmmAccess.SmramDesc[mSmmAccess.NumberRegions-1].PhysicalStart)));
DEBUG ((EFI_D_INFO, "SMM Size: %08X\n", (UINT32)(mSmmAccess.SmramDesc[mSmmAccess.NumberRegions-1].PhysicalSize)));
mSmmAccess.TsegSize = (UINT8)(mSmmAccess.SmramDesc[mSmmAccess.NumberRegions-1].PhysicalSize);
//
// T Seg setting done in QPI RC
//
//
// Prior ReadyToBoot, lock CSEG
//
Status = EfiCreateEventReadyToBootEx(
TPL_NOTIFY,
SmmAccessOnBoot,
NULL,
&BootEvent );
ASSERT (!EFI_ERROR (Status));
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
Open (
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
/*++
Routine Description:
This routine accepts a request to "open" a region of SMRAM. The
region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
The use of "open" means that the memory is visible from all boot-service
and SMM agents.
Arguments:
This - Pointer to the SMM Access Interface.
DescriptorIndex - Region of SMRAM to Open.
Returns:
EFI_SUCCESS - The region was successfully opened.
EFI_DEVICE_ERROR - The region could not be opened because locked by
chipset.
EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
--*/
{
SMM_ACCESS_PRIVATE_DATA *SmmAccess;
SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
if (mSmmAccess.SMMRegionState & EFI_SMRAM_LOCKED) {
DEBUG ((EFI_D_ERROR, "Cannot open a locked SMRAM region\n"));
return EFI_DEVICE_ERROR;
}
//
// Open TSEG
//
if (!QNCOpenSmramRegion ()) {
mSmmAccess.SMMRegionState |= EFI_SMRAM_LOCKED;
return EFI_DEVICE_ERROR;
}
mSmmAccess.SMMRegionState &= ~(EFI_SMRAM_CLOSED | EFI_ALLOCATED);
SyncRegionState2SmramDesc(FALSE, (UINT64)(UINTN)(~(EFI_SMRAM_CLOSED | EFI_ALLOCATED)));
mSmmAccess.SMMRegionState |= EFI_SMRAM_OPEN;
SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_OPEN);
SmmAccess->SmmAccess.OpenState = TRUE;
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
Close (
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
/*++
Routine Description:
This routine accepts a request to "close" a region of SMRAM. This is valid for
compatible SMRAM region.
Arguments:
This - Pointer to the SMM Access Interface.
DescriptorIndex - Region of SMRAM to Close.
Returns:
EFI_SUCCESS - The region was successfully closed.
EFI_DEVICE_ERROR - The region could not be closed because locked by
chipset.
EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
--*/
{
SMM_ACCESS_PRIVATE_DATA *SmmAccess;
BOOLEAN OpenState;
UINTN Index;
SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
if (mSmmAccess.SMMRegionState & EFI_SMRAM_LOCKED) {
//
// Cannot close a "locked" region
//
DEBUG ((EFI_D_WARN, "Cannot close the locked SMRAM Region\n"));
return EFI_DEVICE_ERROR;
}
if (mSmmAccess.SMMRegionState & EFI_SMRAM_CLOSED) {
return EFI_DEVICE_ERROR;
}
//
// Close TSEG
//
if (!QNCCloseSmramRegion ()) {
mSmmAccess.SMMRegionState |= EFI_SMRAM_LOCKED;
return EFI_DEVICE_ERROR;
}
mSmmAccess.SMMRegionState &= ~EFI_SMRAM_OPEN;
SyncRegionState2SmramDesc(FALSE, (UINT64)(UINTN)(~EFI_SMRAM_OPEN));
mSmmAccess.SMMRegionState |= (EFI_SMRAM_CLOSED | EFI_ALLOCATED);
SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_CLOSED | EFI_ALLOCATED);
//
// Find out if any regions are still open
//
OpenState = FALSE;
for (Index = 0; Index < mSmmAccess.NumberRegions; Index++) {
if ((SmmAccess->SmramDesc[Index].RegionState & EFI_SMRAM_OPEN) == EFI_SMRAM_OPEN) {
OpenState = TRUE;
}
}
SmmAccess->SmmAccess.OpenState = OpenState;
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
Lock (
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
/*++
Routine Description:
This routine accepts a request to "lock" SMRAM. The
region could be legacy AB or TSEG near top of physical memory.
The use of "lock" means that the memory can no longer be opened
to BS state..
Arguments:
This - Pointer to the SMM Access Interface.
DescriptorIndex - Region of SMRAM to Lock.
Returns:
EFI_SUCCESS - The region was successfully locked.
EFI_DEVICE_ERROR - The region could not be locked because at least
one range is still open.
EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
--*/
{
SMM_ACCESS_PRIVATE_DATA *SmmAccess;
SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
if (SmmAccess->SmmAccess.OpenState) {
return EFI_DEVICE_ERROR;
}
mSmmAccess.SMMRegionState |= EFI_SMRAM_LOCKED;
SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_LOCKED);
SmmAccess->SmmAccess.LockState = TRUE;
//
// Lock TSEG
//
QNCLockSmramRegion ();
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
GetCapabilities (
IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,
IN OUT UINTN *SmramMapSize,
IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
)
/*++
Routine Description:
This routine services a user request to discover the SMRAM
capabilities of this platform. This will report the possible
ranges that are possible for SMRAM access, based upon the
memory controller capabilities.
Arguments:
This - Pointer to the SMRAM Access Interface.
SmramMapSize - Pointer to the variable containing size of the
buffer to contain the description information.
SmramMap - Buffer containing the data describing the Smram
region descriptors.
Returns:
EFI_BUFFER_TOO_SMALL - The user did not provide a sufficient buffer.
EFI_SUCCESS - The user provided a sufficiently-sized buffer.
--*/
{
EFI_STATUS Status;
SMM_ACCESS_PRIVATE_DATA *SmmAccess;
UINTN BufferSize;
SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
BufferSize = SmmAccess->NumberRegions * sizeof (EFI_SMRAM_DESCRIPTOR);
if (*SmramMapSize < BufferSize) {
Status = EFI_BUFFER_TOO_SMALL;
} else {
CopyMem (SmramMap, SmmAccess->SmramDesc, *SmramMapSize);
Status = EFI_SUCCESS;
}
*SmramMapSize = BufferSize;
return Status;
}
VOID
SmmAccessOnBoot (
IN EFI_EVENT Event,
IN VOID *Context
)
{
}
VOID
SyncRegionState2SmramDesc(
IN BOOLEAN OrAnd,
IN UINT64 Value
)
{
UINT32 Index;
for (Index = 0; Index < mSmmAccess.NumberRegions; Index++) {
if (OrAnd) {
mSmmAccess.SmramDesc[Index].RegionState |= Value;
} else {
mSmmAccess.SmramDesc[Index].RegionState &= Value;
}
}
}

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QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccessDriver.h Normal file
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/** @file
Header file for SMM Access Driver.
This file includes package header files, library classes and protocol, PPI & GUID definitions.
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _SMM_ACCESS_DRIVER_H
#define _SMM_ACCESS_DRIVER_H
#include <PiDxe.h>
#include <IndustryStandard/Pci.h>
#include <Library/HobLib.h>
#include <Library/BaseLib.h>
#include <Library/UefiLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/PcdLib.h>
//
// Driver Consumed Protocol Prototypes
//
#include <Protocol/PciRootBridgeIo.h>
//
// Driver Consumed GUID Prototypes
//
#include <Guid/SmramMemoryReserve.h>
//
// Driver produced protocol
//
#include <Protocol/SmmAccess2.h>
#include <Library/QNCSmmLib.h>
#include <QNCAccess.h>
#define MAX_CPU_SOCKET 1
#define MAX_SMRAM_RANGES 4
//
// Private data structure
//
#define SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('i', 's', 'm', 'a')
typedef struct {
UINTN Signature;
EFI_HANDLE Handle;
EFI_SMM_ACCESS2_PROTOCOL SmmAccess;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
UINTN NumberRegions;
EFI_SMRAM_DESCRIPTOR SmramDesc[MAX_SMRAM_RANGES];
UINT8 TsegSize;
UINT8 MaxBusNumber;
UINT8 SocketPopulated[MAX_CPU_SOCKET];
UINT64 SMMRegionState;
UINT8 ActualNLIioBusNumber;
} SMM_ACCESS_PRIVATE_DATA;
#define SMM_ACCESS_PRIVATE_DATA_FROM_THIS(a) \
CR ( \
a, \
SMM_ACCESS_PRIVATE_DATA, \
SmmAccess, \
SMM_ACCESS_PRIVATE_DATA_SIGNATURE \
)
//
// Prototypes
// Driver model protocol interface
//
EFI_STATUS
EFIAPI
SmmAccessDriverEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
/*++
Routine Description:
This is the standard EFI driver point that detects
whether there is an proper chipset in the system
and if so, installs an SMM Access Protocol.
Arguments:
ImageHandle - Handle for the image of this driver.
SystemTable - Pointer to the EFI System Table.
Returns:
EFI_SUCCESS - Protocol successfully started and installed.
EFI_UNSUPPORTED - Protocol can't be started.
--*/
;
EFI_STATUS
EFIAPI
Open (
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
/*++
Routine Description:
This routine accepts a request to "open" a region of SMRAM. The
region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
The use of "open" means that the memory is visible from all boot-service
and SMM agents.
Arguments:
This - Pointer to the SMM Access Interface.
DescriptorIndex - Region of SMRAM to Open.
Returns:
EFI_SUCCESS - The region was successfully opened.
EFI_DEVICE_ERROR - The region could not be opened because locked by
chipset.
EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
--*/
;
EFI_STATUS
EFIAPI
Close (
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
/*++
Routine Description:
This routine accepts a request to "close" a region of SMRAM. This is valid for
compatible SMRAM region.
Arguments:
This - Pointer to the SMM Access Interface.
DescriptorIndex - Region of SMRAM to Close.
Returns:
EFI_SUCCESS - The region was successfully closed.
EFI_DEVICE_ERROR - The region could not be closed because locked by
chipset.
EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
--*/
;
EFI_STATUS
EFIAPI
Lock (
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
/*++
Routine Description:
This routine accepts a request to "lock" SMRAM. The
region could be legacy AB or TSEG near top of physical memory.
The use of "lock" means that the memory can no longer be opened
to BS state..
Arguments:
This - Pointer to the SMM Access Interface.
DescriptorIndex - Region of SMRAM to Lock.
Returns:
EFI_SUCCESS - The region was successfully locked.
EFI_DEVICE_ERROR - The region could not be locked because at least
one range is still open.
EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
--*/
;
EFI_STATUS
EFIAPI
GetCapabilities (
IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,
IN OUT UINTN *SmramMapSize,
IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
)
/*++
Routine Description:
This routine services a user request to discover the SMRAM
capabilities of this platform. This will report the possible
ranges that are possible for SMRAM access, based upon the
memory controller capabilities.
Arguments:
This - Pointer to the SMRAM Access Interface.
SmramMapSize - Pointer to the variable containing size of the
buffer to contain the description information.
SmramMap - Buffer containing the data describing the Smram
region descriptors.
Returns:
EFI_BUFFER_TOO_SMALL - The user did not provide a sufficient buffer.
EFI_SUCCESS - The user provided a sufficiently-sized buffer.
--*/
;
VOID
SyncRegionState2SmramDesc(
IN BOOLEAN OrAnd,
IN UINT64 Value
);
#endif

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QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDriver.c Normal file
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/** @file
This module produces the SMM COntrol2 Protocol for QNC
Copyright (c) 2013-2015 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiDxe.h>
#include <Protocol/SmmControl2.h>
#include <IndustryStandard/Pci.h>
#include <Library/DebugLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
#include <Library/PciLib.h>
#include <IntelQNCDxe.h>
#include <Library/QNCAccessLib.h>
#include <Uefi/UefiBaseType.h>
#define EFI_INTERNAL_POINTER 0x00000004
extern EFI_GUID gEfiEventVirtualAddressChangeGuid;
/**
Generates an SMI using the parameters passed in.
@param This A pointer to an instance of
EFI_SMM_CONTROL2_PROTOCOL
@param ArgumentBuffer The argument buffer
@param ArgumentBufferSize The size of the argument buffer
@param Periodic TRUE to indicate a periodical SMI
@param ActivationInterval Interval of the periodical SMI
@retval EFI_INVALID_PARAMETER Periodic is TRUE or ArgumentBufferSize > 1
@return Return value from SmmTrigger().
**/
EFI_STATUS
EFIAPI
Activate (
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN OUT UINT8 *CommandPort OPTIONAL,
IN OUT UINT8 *DataPort OPTIONAL,
IN BOOLEAN Periodic OPTIONAL,
IN EFI_SMM_PERIOD ActivationInterval OPTIONAL
);
/**
Clears an SMI.
@param This Pointer to an instance of EFI_SMM_CONTROL2_PROTOCOL
@param Periodic TRUE to indicate a periodical SMI
@return Return value from SmmClear()
**/
EFI_STATUS
EFIAPI
Deactivate (
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN BOOLEAN Periodic OPTIONAL
);
///
/// Handle for the SMM Control2 Protocol
///
EFI_HANDLE mSmmControl2Handle = NULL;
///
/// SMM COntrol2 Protocol instance
///
EFI_SMM_CONTROL2_PROTOCOL mSmmControl2 = {
Activate,
Deactivate,
0
};
VOID
EFIAPI
SmmControlVirtualddressChangeEvent (
IN EFI_EVENT Event,
IN VOID *Context
)
/*++
Routine Description:
Fixup internal data pointers so that the services can be called in virtual mode.
Arguments:
Event The event registered.
Context Event context.
Returns:
None.
--*/
{
gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mSmmControl2.Trigger));
gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mSmmControl2.Clear));
}
/**
Clear SMI related chipset status and re-enable SMI by setting the EOS bit.
@retval EFI_SUCCESS The requested operation has been carried out successfully
@retval EFI_DEVICE_ERROR The EOS bit could not be set.
**/
EFI_STATUS
SmmClear (
VOID
)
{
UINT16 PM1BLK_Base;
UINT16 GPE0BLK_Base;
//
// Get PM1BLK_Base & GPE0BLK_Base
//
PM1BLK_Base = PcdGet16 (PcdPm1blkIoBaseAddress);
GPE0BLK_Base = PcdGet16 (PcdGpe0blkIoBaseAddress);
//
// Clear the Power Button Override Status Bit, it gates EOS from being set.
// In QuarkNcSocId - Bit is read only. Handled by external SMC, do nothing.
//
//
// Clear the APM SMI Status Bit
//
IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_APM);
//
// Set the EOS Bit
//
IoOr32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), B_QNC_GPE0BLK_SMIS_EOS);
return EFI_SUCCESS;
}
/**
Generates an SMI using the parameters passed in.
@param This A pointer to an instance of
EFI_SMM_CONTROL_PROTOCOL
@param ArgumentBuffer The argument buffer
@param ArgumentBufferSize The size of the argument buffer
@param Periodic TRUE to indicate a periodical SMI
@param ActivationInterval Interval of the periodical SMI
@retval EFI_INVALID_PARAMETER Periodic is TRUE or ArgumentBufferSize > 1
@retval EFI_SUCCESS SMI generated
**/
EFI_STATUS
EFIAPI
Activate (
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN OUT UINT8 *CommandPort OPTIONAL,
IN OUT UINT8 *DataPort OPTIONAL,
IN BOOLEAN Periodic OPTIONAL,
IN EFI_SMM_PERIOD ActivationInterval OPTIONAL
)
{
UINT16 GPE0BLK_Base;
UINT32 NewValue;
//
// Get GPE0BLK_Base
//
GPE0BLK_Base = PcdGet16 (PcdGpe0blkIoBaseAddress);
if (Periodic) {
return EFI_INVALID_PARAMETER;
}
//
// Clear any pending the APM SMI
//
if (EFI_ERROR (SmmClear())) {
return EFI_DEVICE_ERROR;
}
//
// Enable the APMC SMI
//
IoOr32 (GPE0BLK_Base + R_QNC_GPE0BLK_SMIE, B_QNC_GPE0BLK_SMIE_APM);
//
// Enable SMI globally
//
NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);
NewValue |= SMI_EN;
QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);
//
// Set APMC_STS
//
if (DataPort == NULL) {
IoWrite8 (PcdGet16 (PcdSmmDataPort), 0xFF);
} else {
IoWrite8 (PcdGet16 (PcdSmmDataPort), *DataPort);
}
//
// Generate the APMC SMI
//
if (CommandPort == NULL) {
IoWrite8 (PcdGet16 (PcdSmmActivationPort), 0xFF);
} else {
IoWrite8 (PcdGet16 (PcdSmmActivationPort), *CommandPort);
}
return EFI_SUCCESS;
}
/**
Clears an SMI.
@param This Pointer to an instance of EFI_SMM_CONTROL_PROTOCOL
@param Periodic TRUE to indicate a periodical SMI
@return Return value from SmmClear()
**/
EFI_STATUS
EFIAPI
Deactivate (
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN BOOLEAN Periodic
)
{
if (Periodic) {
return EFI_INVALID_PARAMETER;
}
return SmmClear();
}
/**
This is the constructor for the SMM Control protocol.
This function installs EFI_SMM_CONTROL2_PROTOCOL.
@param ImageHandle Handle for the image of this driver
@param SystemTable Pointer to the EFI System Table
@retval EFI_UNSUPPORTED There's no Intel ICH on this platform
@return The status returned from InstallProtocolInterface().
--*/
EFI_STATUS
SmmControl2Init (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_EVENT Event;
UINT16 PM1BLK_Base;
UINT16 GPE0BLK_Base;
BOOLEAN SciEn;
UINT32 NewValue;
//
// Get PM1BLK_Base & GPE0BLK_Base
//
PM1BLK_Base = PcdGet16 (PcdPm1blkIoBaseAddress);
GPE0BLK_Base = PcdGet16 (PcdGpe0blkIoBaseAddress);
//
// Install our protocol interfaces on the device's handle
//
Status = gBS->InstallMultipleProtocolInterfaces (
&mSmmControl2Handle,
&gEfiSmmControl2ProtocolGuid, &mSmmControl2,
NULL
);
ASSERT_EFI_ERROR (Status);
//
// Determine whether an ACPI OS is present (via the SCI_EN bit)
//
SciEn = (BOOLEAN)((IoRead16 (PM1BLK_Base + R_QNC_PM1BLK_PM1C) & B_QNC_PM1BLK_PM1C_SCIEN) != 0);
if (!SciEn) {
//
// Clear any SMIs that double as SCIs (when SCI_EN==0)
//
IoWrite16 ((PM1BLK_Base + R_QNC_PM1BLK_PM1S), B_QNC_PM1BLK_PM1S_ALL);
IoWrite16 ((PM1BLK_Base + R_QNC_PM1BLK_PM1E), 0x00000000);
IoWrite32 ((PM1BLK_Base + R_QNC_PM1BLK_PM1C), 0x00000000);
IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_GPE0S), B_QNC_GPE0BLK_GPE0S_ALL);
IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_GPE0E), 0x00000000);
}
//
// Clear and disable all SMIs that are unaffected by SCI_EN
// Set EOS
//
IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIE), 0x00000000);
IoWrite32 ((GPE0BLK_Base + R_QNC_GPE0BLK_SMIS), (B_QNC_GPE0BLK_SMIS_EOS + B_QNC_GPE0BLK_SMIS_ALL));
//
// Enable SMI globally
//
NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);
NewValue |= SMI_EN;
QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);
//
// Make sure to write this register last -- EOS re-enables SMIs for the QNC
//
IoAndThenOr32 (
GPE0BLK_Base + R_QNC_GPE0BLK_SMIE,
(UINT32)(~B_QNC_GPE0BLK_SMIE_ALL),
B_QNC_GPE0BLK_SMIE_APM
);
//
// Make sure EOS bit cleared
//
DEBUG_CODE_BEGIN ();
if (IoRead32 (GPE0BLK_Base + R_QNC_GPE0BLK_SMIS) & B_QNC_GPE0BLK_SMIS_EOS) {
DEBUG ((
EFI_D_ERROR,
"******************************************************************************\n"
"BIG ERROR: SmmControl constructor couldn't properly initialize the ACPI table.\n"
" SmmControl->Clear will probably hang. \n"
" NOTE: SCI_EN = %d \n"
"******************************************************************************\n",
SciEn
));
//
// If we want the system to stop, then keep the ASSERT(FALSE).
// Otherwise, comment it out.
//
ASSERT (FALSE);
}
DEBUG_CODE_END ();
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_NOTIFY,
SmmControlVirtualddressChangeEvent,
NULL,
&gEfiEventVirtualAddressChangeGuid,
&Event
);
ASSERT_EFI_ERROR (Status);
return Status;
}

61
QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf Normal file
View File

@@ -0,0 +1,61 @@
## @file
# QNC SmmControl driver to install EFI_SMM_CONTROL_PROTOCOL.
#
# Copyright (c) 2013-2015 Intel Corporation.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = SmmControlDxe
FILE_GUID = A03A9429-C570-4ef9-9E00-C7A673976E5F
MODULE_TYPE = DXE_RUNTIME_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = SmmControl2Init
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
[Sources]
SmmControlDriver.c
[Packages]
MdePkg/MdePkg.dec
QuarkSocPkg/QuarkSocPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
DebugLib
UefiBootServicesTableLib
UefiRuntimeServicesTableLib
PcdLib
IoLib
PciLib
QNCAccessLib
[Protocols]
gEfiSmmControl2ProtocolGuid # PROTOCOL ALWAYS_PRODUCED
[Pcd]
gEfiQuarkNcSocIdTokenSpaceGuid.PcdPm1blkIoBaseAddress
gEfiQuarkNcSocIdTokenSpaceGuid.PcdGpe0blkIoBaseAddress
gEfiQuarkNcSocIdTokenSpaceGuid.PcdSmmDataPort
gEfiQuarkNcSocIdTokenSpaceGuid.PcdSmmActivationPort
gEfiQuarkNcSocIdTokenSpaceGuid.PcdGbaIoBaseAddress
[Guids]
gEfiEventVirtualAddressChangeGuid
[Depex]
TRUE