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Pkg-Module: CorebootPayloadPkg

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Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot.

CorebootPayloadPkg is source code package of coreboot Payload Modules, Provides definitions of payload image's layout and lists the modules required in DSC file.

It supports the following features:
  - Support Unified Extensible Firmware Interface (UEFI) specification 2.4.
  - Support Platform Initialization(PI) specification 1.3.
  - Support execution as a coreboot payload.
  - Support USB 3.0
  - Support SATA/ATA devices.
  - Support EFI aware OS boot.

The following features are not supported currently and have not been validated:
  - GCC Tool Chains
  - SMM Execution Environment
  - Security Boot

It was tested on a Intel Bay Trail CRB platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17081 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Maurice Ma
2015-03-31 00:56:01 +00:00
committed by mauricema
parent c6d2972645
commit 9c228fb031
21 changed files with 6082 additions and 0 deletions
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276
CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c Normal file
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/** @file
ACPI Timer implements one instance of Timer Library.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are
licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/TimerLib.h>
#include <Library/BaseLib.h>
#include <Library/IoLib.h>
#include <Library/HobLib.h>
#include <Library/DebugLib.h>
#include <Guid/AcpiBoardInfoGuid.h>
#include <IndustryStandard/Acpi.h>
#define ACPI_TIMER_COUNT_SIZE BIT24
UINTN mPmTimerReg = 0;
/**
The constructor function enables ACPI IO space.
If ACPI I/O space not enabled, this function will enable it.
It will always return RETURN_SUCCESS.
@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
**/
RETURN_STATUS
EFIAPI
AcpiTimerLibConstructor (
VOID
)
{
EFI_HOB_GUID_TYPE *GuidHob;
ACPI_BOARD_INFO *pAcpiBoardInfo;
//
// Find the acpi board information guid hob
//
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
ASSERT (GuidHob != NULL);
pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
mPmTimerReg = (UINTN)pAcpiBoardInfo->PmTimerRegBase;
return EFI_SUCCESS;
}
/**
Internal function to read the current tick counter of ACPI.
Internal function to read the current tick counter of ACPI.
@return The tick counter read.
**/
UINT32
InternalAcpiGetTimerTick (
VOID
)
{
if (mPmTimerReg == 0)
AcpiTimerLibConstructor ();
return IoRead32 (mPmTimerReg);
}
/**
Stalls the CPU for at least the given number of ticks.
Stalls the CPU for at least the given number of ticks. It's invoked by
MicroSecondDelay() and NanoSecondDelay().
@param Delay A period of time to delay in ticks.
**/
VOID
InternalAcpiDelay (
IN UINT32 Delay
)
{
UINT32 Ticks;
UINT32 Times;
Times = Delay >> 22;
Delay &= BIT22 - 1;
do {
//
// The target timer count is calculated here
//
Ticks = InternalAcpiGetTimerTick () + Delay;
Delay = BIT22;
//
// Wait until time out
// Delay >= 2^23 could not be handled by this function
// Timer wrap-arounds are handled correctly by this function
//
while (((Ticks - InternalAcpiGetTimerTick ()) & BIT23) == 0) {
CpuPause ();
}
} while (Times-- > 0);
}
/**
Stalls the CPU for at least the given number of microseconds.
Stalls the CPU for the number of microseconds specified by MicroSeconds.
@param MicroSeconds The minimum number of microseconds to delay.
@return MicroSeconds
**/
UINTN
EFIAPI
MicroSecondDelay (
IN UINTN MicroSeconds
)
{
InternalAcpiDelay (
(UINT32)DivU64x32 (
MultU64x32 (
MicroSeconds,
ACPI_TIMER_FREQUENCY
),
1000000u
)
);
return MicroSeconds;
}
/**
Stalls the CPU for at least the given number of nanoseconds.
Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
@param NanoSeconds The minimum number of nanoseconds to delay.
@return NanoSeconds
**/
UINTN
EFIAPI
NanoSecondDelay (
IN UINTN NanoSeconds
)
{
InternalAcpiDelay (
(UINT32)DivU64x32 (
MultU64x32 (
NanoSeconds,
ACPI_TIMER_FREQUENCY
),
1000000000u
)
);
return NanoSeconds;
}
/**
Retrieves the current value of a 64-bit free running performance counter.
Retrieves the current value of a 64-bit free running performance counter. The
counter can either count up by 1 or count down by 1. If the physical
performance counter counts by a larger increment, then the counter values
must be translated. The properties of the counter can be retrieved from
GetPerformanceCounterProperties().
@return The current value of the free running performance counter.
**/
UINT64
EFIAPI
GetPerformanceCounter (
VOID
)
{
return (UINT64)InternalAcpiGetTimerTick ();
}
/**
Retrieves the 64-bit frequency in Hz and the range of performance counter
values.
If StartValue is not NULL, then the value that the performance counter starts
with immediately after is it rolls over is returned in StartValue. If
EndValue is not NULL, then the value that the performance counter end with
immediately before it rolls over is returned in EndValue. The 64-bit
frequency of the performance counter in Hz is always returned. If StartValue
is less than EndValue, then the performance counter counts up. If StartValue
is greater than EndValue, then the performance counter counts down. For
example, a 64-bit free running counter that counts up would have a StartValue
of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
@param StartValue The value the performance counter starts with when it
rolls over.
@param EndValue The value that the performance counter ends with before
it rolls over.
@return The frequency in Hz.
**/
UINT64
EFIAPI
GetPerformanceCounterProperties (
OUT UINT64 *StartValue, OPTIONAL
OUT UINT64 *EndValue OPTIONAL
)
{
if (StartValue != NULL) {
*StartValue = 0;
}
if (EndValue != NULL) {
*EndValue = ACPI_TIMER_COUNT_SIZE - 1;
}
return ACPI_TIMER_FREQUENCY;
}
/**
Converts elapsed ticks of performance counter to time in nanoseconds.
This function converts the elapsed ticks of running performance counter to
time value in unit of nanoseconds.
@param Ticks The number of elapsed ticks of running performance counter.
@return The elapsed time in nanoseconds.
**/
UINT64
EFIAPI
GetTimeInNanoSecond (
IN UINT64 Ticks
)
{
UINT64 Frequency;
UINT64 NanoSeconds;
UINT64 Remainder;
INTN Shift;
Frequency = GetPerformanceCounterProperties (NULL, NULL);
//
// Ticks
// Time = --------- x 1,000,000,000
// Frequency
//
NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
//
// Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
// Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
// i.e. highest bit set in Remainder should <= 33.
//
Shift = MAX (0, HighBitSet64 (Remainder) - 33);
Remainder = RShiftU64 (Remainder, (UINTN) Shift);
Frequency = RShiftU64 (Frequency, (UINTN) Shift);
NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
return NanoSeconds;
}

46
CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.inf Normal file
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## @file
# ACPI Timer Library Instance.
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = AcpiTimerLib
FILE_GUID = A41BF616-EF77-4658-9992-D813071C34CF
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = TimerLib
CONSTRUCTOR = AcpiTimerLibConstructor
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
#
[Sources]
AcpiTimerLib.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
CorebootModulePkg/CorebootModulePkg.dec
[LibraryClasses]
BaseLib
IoLib
HobLib
DebugLib
[Guids]
gUefiAcpiBoardInfoGuid

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CorebootPayloadPkg/Library/PlatformBdsLib/BdsPlatform.c Normal file
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CorebootPayloadPkg/Library/PlatformBdsLib/BdsPlatform.h Normal file
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/** @file
Head file for BDS Platform specific code
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
#define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
#include <PiDxe.h>
#include <IndustryStandard/Pci.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/BaseLib.h>
#include <Library/PcdLib.h>
#include <Library/GenericBdsLib.h>
#include <Library/PlatformBdsLib.h>
#include <Library/UefiLib.h>
#include <Library/DevicePathLib.h>
#include <Protocol/PciIo.h>
#include <Protocol/SerialIo.h>
#include <Guid/GlobalVariable.h>
extern BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole[];
extern EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[];
extern EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption[];
extern EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[];
extern ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode;
extern UART_DEVICE_PATH gUartDeviceNode;
extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;
extern VENDOR_DEVICE_PATH gUartDeviceVenderNode;
//
//
//
#define VarConsoleInpDev L"ConInDev"
#define VarConsoleInp L"ConIn"
#define VarConsoleOutDev L"ConOutDev"
#define VarConsoleOut L"ConOut"
#define VarErrorOutDev L"ErrOutDev"
#define VarErrorOut L"ErrOut"
#define PCI_DEVICE_PATH_NODE(Func, Dev) \
{ \
{ \
HARDWARE_DEVICE_PATH, \
HW_PCI_DP, \
{ \
(UINT8) (sizeof (PCI_DEVICE_PATH)), \
(UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \
} \
}, \
(Func), \
(Dev) \
}
#define PNPID_DEVICE_PATH_NODE(PnpId) \
{ \
{ \
ACPI_DEVICE_PATH, \
ACPI_DP, \
{ \
(UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \
(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \
}, \
}, \
EISA_PNP_ID((PnpId)), \
0 \
}
#define gPciRootBridge \
PNPID_DEVICE_PATH_NODE(0x0A03)
#define gPnp16550ComPort \
PNPID_DEVICE_PATH_NODE(0x0501)
#define gUartVender \
{ \
{ \
HARDWARE_DEVICE_PATH, \
HW_VENDOR_DP, \
{ \
(UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
(UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
} \
}, \
EFI_SERIAL_IO_PROTOCOL_GUID \
}
#define gUart \
{ \
{ \
MESSAGING_DEVICE_PATH, \
MSG_UART_DP, \
{ \
(UINT8) (sizeof (UART_DEVICE_PATH)), \
(UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \
} \
}, \
0, \
115200, \
8, \
1, \
1 \
}
#define gPcAnsiTerminal \
{ \
{ \
MESSAGING_DEVICE_PATH, \
MSG_VENDOR_DP, \
{ \
(UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
(UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
} \
}, \
DEVICE_PATH_MESSAGING_PC_ANSI \
}
#define gEndEntire \
{ \
END_DEVICE_PATH_TYPE, \
END_ENTIRE_DEVICE_PATH_SUBTYPE, \
{ \
END_DEVICE_PATH_LENGTH, \
0 \
} \
}
#define PCI_CLASS_SCC 0x07
#define PCI_SUBCLASS_SERIAL 0x00
#define PCI_IF_16550 0x02
#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
//
// Platform Root Bridge
//
typedef struct {
ACPI_HID_DEVICE_PATH PciRootBridge;
EFI_DEVICE_PATH_PROTOCOL End;
} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;
EFI_STATUS
PlatformBdsNoConsoleAction (
VOID
);
VOID
PlatformBdsEnterFrontPage (
IN UINT16 TimeoutDefault,
IN BOOLEAN ConnectAllHappened
);
#endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_

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CorebootPayloadPkg/Library/PlatformBdsLib/PlatformBdsLib.inf Normal file
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## @file
# Platform BDS customizations library.
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PlatformBdsLib
FILE_GUID = CE70284F-9D7A-4c22-8769-E199387F40FC
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
LIBRARY_CLASS = PlatformBdsLib|DXE_DRIVER
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
#
[Sources]
BdsPlatform.c
PlatformData.c
BdsPlatform.h
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
CorebootPayloadPkg/CorebootPayloadPkg.dec
[LibraryClasses]
BaseLib
MemoryAllocationLib
UefiBootServicesTableLib
BaseMemoryLib
DebugLib
PcdLib
GenericBdsLib
[Pcd]
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPlatformBootTimeOut
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile

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CorebootPayloadPkg/Library/PlatformBdsLib/PlatformData.c Normal file
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/** @file
Defined the platform specific device path which will be used by
platform Bbd to perform the platform policy connect.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BdsPlatform.h"
//
// Predefined platform default time out value
//
UINT16 gPlatformBootTimeOutDefault = 5;
ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;
UART_DEVICE_PATH gUartDeviceNode = gUart;
VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;
VENDOR_DEVICE_PATH gUartDeviceVenderNode = gUartVender;
//
// Predefined platform root bridge
//
PLATFORM_ROOT_BRIDGE_DEVICE_PATH gPlatformRootBridge0 = {
gPciRootBridge,
gEndEntire
};
EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {
(EFI_DEVICE_PATH_PROTOCOL *) &gPlatformRootBridge0,
NULL
};
//
// Platform specific keyboard device path
//
///
/// Predefined platform default console device path
///
BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {
{
NULL,
0
}
};
///
/// Predefined platform specific driver option
///
EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption[] = { NULL };
///
/// Predefined platform connect sequence
///
EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[] = { NULL };

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CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c Normal file
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/** @file
Reset System Library functions for coreboot
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiDxe.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/HobLib.h>
#include <Guid/AcpiBoardInfoGuid.h>
VOID
AcpiPmControl (
UINTN SuspendType
)
{
EFI_HOB_GUID_TYPE *GuidHob;
ACPI_BOARD_INFO *pAcpiBoardInfo;
UINTN PmCtrlReg = 0;
ASSERT (SuspendType <= 7);
//
// Find the acpi board information guid hob
//
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
ASSERT (GuidHob != NULL);
pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
PmCtrlReg = (UINTN)pAcpiBoardInfo->PmCtrlRegBase;
IoAndThenOr16 (PmCtrlReg, (UINT16) ~0x3c00, (UINT16) (SuspendType << 10));
IoOr16 (PmCtrlReg, BIT13);
CpuDeadLoop ();
}
/**
Calling this function causes a system-wide reset. This sets
all circuitry within the system to its initial state. This type of reset
is asynchronous to system operation and operates without regard to
cycle boundaries.
System reset should not return, if it returns, it means the system does
not support cold reset.
**/
VOID
EFIAPI
ResetCold (
VOID
)
{
EFI_HOB_GUID_TYPE *GuidHob;
ACPI_BOARD_INFO *pAcpiBoardInfo;
//
// Find the acpi board information guid hob
//
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
ASSERT (GuidHob != NULL);
pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
IoWrite8 ((UINTN)pAcpiBoardInfo->ResetRegAddress, pAcpiBoardInfo->ResetValue);
CpuDeadLoop ();
}
/**
Calling this function causes a system-wide initialization. The processors
are set to their initial state, and pending cycles are not corrupted.
System reset should not return, if it returns, it means the system does
not support warm reset.
**/
VOID
EFIAPI
ResetWarm (
VOID
)
{
EFI_HOB_GUID_TYPE *GuidHob;
ACPI_BOARD_INFO *pAcpiBoardInfo;
//
// Find the acpi board information guid hob
//
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
ASSERT (GuidHob != NULL);
pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
IoWrite8 ((UINTN)pAcpiBoardInfo->ResetRegAddress, pAcpiBoardInfo->ResetValue);
CpuDeadLoop ();
}
/**
Calling this function causes the system to enter a power state equivalent
to the ACPI G2/S5 or G3 states.
System shutdown should not return, if it returns, it means the system does
not support shut down reset.
**/
VOID
EFIAPI
ResetShutdown (
VOID
)
{
AcpiPmControl (7);
ASSERT (FALSE);
}
/**
Calling this function causes the system to enter a power state for capsule
update.
Reset update should not return, if it returns, it means the system does
not support capsule update.
**/
VOID
EFIAPI
EnterS3WithImmediateWake (
VOID
)
{
AcpiPmControl (5);
ASSERT (FALSE);
}

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CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.inf Normal file
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## @file
# Library instance for ResetSystem library class for coreboot
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ResetSystemLib
FILE_GUID = C5CD4EEE-527F-47df-9C92-B41414AF7479
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = ResetSystemLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64 IPF
#
[Sources]
ResetSystemLib.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
CorebootModulePkg/CorebootModulePkg.dec
[LibraryClasses]
DebugLib
IoLib
HobLib
[Guids]
gUefiAcpiBoardInfoGuid

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CorebootPayloadPkg/Library/SerialPortLib/SerialPortLib.c Normal file
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/** @file
SerialPortLib instance for UART device upon coreboot
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Uefi/UefiBaseType.h>
#include <Library/SerialPortLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
#include <Library/CbParseLib.h>
//
// 16550 UART register offsets and bitfields
//
#define R_UART_RXBUF 0
#define R_UART_TXBUF 0
#define R_UART_BAUD_LOW 0
#define R_UART_BAUD_HIGH 1
#define R_UART_FCR 2
#define B_UART_FCR_FIFOE BIT0
#define B_UART_FCR_FIFO64 BIT5
#define R_UART_LCR 3
#define B_UART_LCR_DLAB BIT7
#define R_UART_MCR 4
#define B_UART_MCR_RTS BIT1
#define R_UART_LSR 5
#define B_UART_LSR_RXRDY BIT0
#define B_UART_LSR_TXRDY BIT5
#define B_UART_LSR_TEMT BIT6
#define R_UART_MSR 6
#define B_UART_MSR_CTS BIT4
#define B_UART_MSR_DSR BIT5
UINT32 mSerialRegBase = 0;
UINT32 mSerialRegAccessType = 0;
/**
Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from
MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The
parameter Offset is added to the base address of the 16550 registers that is specified
by PcdSerialRegisterBase.
@param Offset The offset of the 16550 register to read.
@return The value read from the 16550 register.
**/
UINT8
SerialPortReadRegister (
UINTN Offset
)
{
if (mSerialRegAccessType == 2) { //MMIO
return MmioRead8 (mSerialRegBase + Offset);
} else { //IO
return IoRead8 ((UINT16)mSerialRegBase + Offset);
}
}
/**
Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to
MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The
parameter Offset is added to the base address of the 16550 registers that is specified
by PcdSerialRegisterBase.
@param Offset The offset of the 16550 register to write.
@param Value The value to write to the 16550 register specified by Offset.
@return The value written to the 16550 register.
**/
UINT8
SerialPortWriteRegister (
UINTN Offset,
UINT8 Value
)
{
if (mSerialRegAccessType == 2) { //MMIO
return MmioWrite8 (mSerialRegBase + Offset, Value);
} else {// IO
return IoWrite8 ((UINT16)mSerialRegBase + Offset, Value);
}
}
/**
Initialize the serial device hardware.
If no initialization is required, then return RETURN_SUCCESS.
If the serial device was successfully initialized, then return RETURN_SUCCESS.
If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.
@retval RETURN_SUCCESS The serial device was initialized.
@retval RETURN_DEVICE_ERROR The serial device could not be initialized.
**/
RETURN_STATUS
EFIAPI
SerialPortInitialize (
VOID
)
{
RETURN_STATUS Status;
UINTN Divisor;
BOOLEAN Initialized;
Status = CbParseSerialInfo (&mSerialRegBase, &mSerialRegAccessType, NULL);
if (RETURN_ERROR (Status)) {
return Status;
}
//
// See if the serial port is already initialized
//
Initialized = TRUE;
if ((SerialPortReadRegister (R_UART_FCR) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)) !=
(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)) ) {
Initialized = FALSE;
}
if ((SerialPortReadRegister (R_UART_LCR) & 0x3F) != (PcdGet8 (PcdSerialLineControl) & 0x3F)) {
Initialized = FALSE;
}
SerialPortWriteRegister (R_UART_LCR, (UINT8)(SerialPortReadRegister (R_UART_LCR) | B_UART_LCR_DLAB));
Divisor = SerialPortReadRegister (R_UART_BAUD_HIGH) << 8;
Divisor |= SerialPortReadRegister (R_UART_BAUD_LOW);
SerialPortWriteRegister (R_UART_LCR, (UINT8)(SerialPortReadRegister (R_UART_LCR) & ~B_UART_LCR_DLAB));
if (Divisor != 115200 / PcdGet32 (PcdSerialBaudRate)) {
Initialized = FALSE;
}
if (Initialized) {
return RETURN_SUCCESS;
}
//
// Configure baud rate
//
Divisor = 115200 / PcdGet32 (PcdSerialBaudRate);
SerialPortWriteRegister (R_UART_LCR, B_UART_LCR_DLAB);
SerialPortWriteRegister (R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8));
SerialPortWriteRegister (R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff));
//
// Clear DLAB and configure Data Bits, Parity, and Stop Bits.
// Strip reserved bits from PcdSerialLineControl
//
SerialPortWriteRegister (R_UART_LCR, (UINT8)(PcdGet8 (PcdSerialLineControl) & 0x3F));
//
// Enable and reset FIFOs
// Strip reserved bits from PcdSerialFifoControl
//
SerialPortWriteRegister (R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & 0x27));
//
// Put Modem Control Register(MCR) into its reset state of 0x00.
//
SerialPortWriteRegister (R_UART_MCR, 0x00);
return RETURN_SUCCESS;
}
/**
Write data from buffer to serial device.
Writes NumberOfBytes data bytes from Buffer to the serial device.
The number of bytes actually written to the serial device is returned.
If the return value is less than NumberOfBytes, then the write operation failed.
If Buffer is NULL, then ASSERT().
If NumberOfBytes is zero, then return 0.
@param Buffer Pointer to the data buffer to be written.
@param NumberOfBytes Number of bytes to written to the serial device.
@retval 0 NumberOfBytes is 0.
@retval >0 The number of bytes written to the serial device.
If this value is less than NumberOfBytes, then the read operation failed.
**/
UINTN
EFIAPI
SerialPortWrite (
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
UINTN Result;
UINTN Index;
UINTN FifoSize;
if (Buffer == NULL) {
return 0;
}
if (NumberOfBytes == 0) {
//
// Flush the hardware
//
//
// Wait for both the transmit FIFO and shift register empty.
//
while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_TEMT) == 0);
return 0;
}
//
// Compute the maximum size of the Tx FIFO
//
FifoSize = 1;
if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFOE) != 0) {
if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFO64) == 0) {
FifoSize = 16;
} else {
FifoSize = 64;
}
}
Result = NumberOfBytes;
while (NumberOfBytes != 0) {
//
// Wait for the serial port to be ready, to make sure both the transmit FIFO
// and shift register empty.
//
while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_TEMT) == 0);
//
// Fill then entire Tx FIFO
//
for (Index = 0; Index < FifoSize && NumberOfBytes != 0; Index++, NumberOfBytes--, Buffer++) {
//
// Write byte to the transmit buffer.
//
SerialPortWriteRegister (R_UART_TXBUF, *Buffer);
}
}
return Result;
}
/**
Reads data from a serial device into a buffer.
@param Buffer Pointer to the data buffer to store the data read from the serial device.
@param NumberOfBytes Number of bytes to read from the serial device.
@retval 0 NumberOfBytes is 0.
@retval >0 The number of bytes read from the serial device.
If this value is less than NumberOfBytes, then the read operation failed.
**/
UINTN
EFIAPI
SerialPortRead (
OUT UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
UINTN Result;
if (NULL == Buffer) {
return 0;
}
for (Result = 0; NumberOfBytes-- != 0; Result++, Buffer++) {
//
// Wait for the serial port to have some data.
//
while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_RXRDY) == 0);
//
// Read byte from the receive buffer.
//
*Buffer = SerialPortReadRegister (R_UART_RXBUF);
}
return Result;
}
/**
Polls a serial device to see if there is any data waiting to be read.
Polls aserial device to see if there is any data waiting to be read.
If there is data waiting to be read from the serial device, then TRUE is returned.
If there is no data waiting to be read from the serial device, then FALSE is returned.
@retval TRUE Data is waiting to be read from the serial device.
@retval FALSE There is no data waiting to be read from the serial device.
**/
BOOLEAN
EFIAPI
SerialPortPoll (
VOID
)
{
//
// Read the serial port status
//
if ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_RXRDY) != 0) {
return TRUE;
}
return FALSE;
}

42
CorebootPayloadPkg/Library/SerialPortLib/SerialPortLib.inf Normal file
View File

@@ -0,0 +1,42 @@
## @file
# SerialPortLib instance for UART device upon coreboot
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = SerialPortLib
FILE_GUID = 40A2CBC6-CFB8-447b-A90E-198E88FD345E
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerialPortLib
CONSTRUCTOR = SerialPortInitialize
[Sources]
SerialPortLib.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
CorebootModulePkg/CorebootModulePkg.dec
[LibraryClasses]
BaseLib
PcdLib
IoLib
CbParseLib
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl