Add EnableCache() and DisableCache() implementations for IA32 and X64 to the BaseLib

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6705 6f19259b-4bc3-4df7-8a09-765794883524

MdePkg/Library/BaseLib/Ia32/DisableCache.c

@@ -0,0 +1,36 @@
+/** @file
+  AsmDisableCache function
+
+  Copyright (c) 2006 - 2008, Intel Corporation<BR>
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+  Disables caches.
+
+  Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
+  WBINVD instruction.
+
+**/
+VOID
+EFIAPI
+AsmDisableCache (
+  VOID
+  )
+{
+  _asm {
+    mov     eax, cr0
+    bts     eax, 30
+    btr     eax, 29
+    mov     cr0, eax
+    wbinvd
+  }
+}
+