Add EnableCache() and DisableCache() implementations for IA32 and X64 to the BaseLib

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6705 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
mdkinney
2008-11-24 08:30:58 +00:00
parent 298f0688f7
commit 9f4f2f0e15
11 changed files with 414 additions and 0 deletions

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;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; DisableCache.Asm
;
; Abstract:
;
; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
; WBINVD instruction.
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmDisableCache (
; VOID
; );
;------------------------------------------------------------------------------
AsmDisableCache PROC
mov rax, cr0
bts rax, 30
btr rax, 29
mov cr0, rax
wbinvd
ret
AsmDisableCache ENDP
END