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Clean up code.

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Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Eric Dong <eric.dong@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15743 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jyao1
2014-08-04 06:34:41 +00:00
committed by jyao1
parent 4e07e87fe4
commit a0e0fb6d9f
5 changed files with 15 additions and 4 deletions
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6
IntelFspPkg/FspSecCore/SecMain.c
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@ -41,6 +41,7 @@ UINT64 mIdtEntryTemplate = 0xffff8e000008ffe4ULL;
@param[in] SizeOfRam Size of the temporary memory available for use. @param[in] SizeOfRam Size of the temporary memory available for use.
@param[in] TempRamBase Base address of tempory ram @param[in] TempRamBase Base address of tempory ram
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume. @param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.
@param[in] PeiCoreEntry Pei Core entrypoint.
@return This function never returns. @return This function never returns.
@ -50,7 +51,8 @@ EFIAPI
SecStartup ( SecStartup (
IN UINT32 SizeOfRam, IN UINT32 SizeOfRam,
IN UINT32 TempRamBase, IN UINT32 TempRamBase,
IN VOID *BootFirmwareVolume IN VOID *BootFirmwareVolume,
IN UINTN PeiCoreEntry
) )
{ {
EFI_SEC_PEI_HAND_OFF SecCoreData; EFI_SEC_PEI_HAND_OFF SecCoreData;
@ -119,7 +121,7 @@ SecStartup (
// //
// Call PeiCore Entry // Call PeiCore Entry
// //
PeiCore = (PEI_CORE_ENTRY)(*(UINTN *)((&BootFirmwareVolume) + 1)); PeiCore = (PEI_CORE_ENTRY)(PeiCoreEntry);
PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi); PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);
// //

4
IntelFspPkg/FspSecCore/SecMain.h
View File

@ -107,6 +107,7 @@ InitializeFloatingPointUnits (
@param[in] SizeOfRam Size of the temporary memory available for use. @param[in] SizeOfRam Size of the temporary memory available for use.
@param[in] TempRamBase Base address of tempory ram @param[in] TempRamBase Base address of tempory ram
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume. @param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.
@param[in] PeiCoreEntry Pei Core entrypoint.
@return This function never returns. @return This function never returns.
@ -116,7 +117,8 @@ EFIAPI
SecStartup ( SecStartup (
IN UINT32 SizeOfRam, IN UINT32 SizeOfRam,
IN UINT32 TempRamBase, IN UINT32 TempRamBase,
IN VOID *BootFirmwareVolume IN VOID *BootFirmwareVolume,
IN UINTN PeiCoreEntry
); );
/** /**

2
IntelFspWrapperPkg/Library/PeiFspHobProcessLibSample/FspHobProcessLibSample.c
View File

@ -244,6 +244,8 @@ FspHobProcess (
LowMemorySize LowMemorySize
); );
S3PeiMemBase = 0;
S3PeiMemSize = 0;
Status = GetS3MemoryInfo (&S3PeiMemBase, &S3PeiMemSize); Status = GetS3MemoryInfo (&S3PeiMemBase, &S3PeiMemSize);
ASSERT_EFI_ERROR (Status); ASSERT_EFI_ERROR (Status);
DEBUG((DEBUG_INFO, "S3 memory %Xh - %Xh bytes\n", S3PeiMemBase, S3PeiMemSize)); DEBUG((DEBUG_INFO, "S3 memory %Xh - %Xh bytes\n", S3PeiMemBase, S3PeiMemSize));

5
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h
View File

@ -12,6 +12,9 @@
**/ **/
#ifndef __FSP_H__
#define __FSP_H__
// //
// Fv Header // Fv Header
// //
@ -41,3 +44,5 @@
// //
#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C #define FSP_HEADER_IMAGEBASE_OFFSET 0x1C
#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30 #define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30
#endif

2
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf
View File

@ -52,7 +52,7 @@
Ia32/PeiCoreEntry.asm Ia32/PeiCoreEntry.asm
Ia32/AsmSaveSecContext.asm Ia32/AsmSaveSecContext.asm
Ia32/Stack.asm Ia32/Stack.asm
Ia32/Fsp.h
Ia32/SecEntry.S Ia32/SecEntry.S
Ia32/PeiCoreEntry.S Ia32/PeiCoreEntry.S
Ia32/AsmSaveSecContext.S Ia32/AsmSaveSecContext.S