1. refine the comments
2. use BITx git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6695 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -141,9 +141,9 @@ typedef struct {
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UINT8 additional_sense_bytes_18_253[253 - 18 + 1];
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} ATAPI_REQUEST_SENSE_DATA;
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///
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/// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)
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///
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//
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// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)
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//
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///
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/// READ CAPACITY Data
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@@ -342,7 +342,6 @@ typedef union {
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#define ATA_CMD_READ_LONG_WITH_RETRY 0x23 ///< defined in ATA-5
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#define ATA_CMD_READ_SECTORS_EXT 0x24 ///< defined in ATA-6
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//
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// Class 2: PIO Data-Out Commands
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//
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@@ -382,28 +381,25 @@ typedef union {
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#define ATA_CMD_STANDBY_ALIAS 0xe2 ///< defined in ATA-6
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#define ATA_CMD_STANDBY_IMMEDIATE 0x94 ///< defined in ATA-3
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#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0 ///< defined in ATA-6
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///
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/// S.M.A.R.T
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///
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//
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// S.M.A.R.T
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//
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#define ATA_CMD_SMART 0xb0
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#define ATA_CONSTANT_C2 0xc2
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#define ATA_CONSTANT_4F 0x4f
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#define ATA_SMART_ENABLE_OPERATION 0xd8
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#define ATA_SMART_RETURN_STATUS 0xda
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///
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/// Class 4: DMA Command
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///
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//
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// Class 4: DMA Command
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//
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#define ATA_CMD_READ_DMA 0xc8 ///< defined in ATA-6
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#define ATA_CMD_READ_DMA_WITH_RETRY 0xc9 ///< defined in ATA-4
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#define ATA_CMD_READ_DMA_EXT 0x25 ///< defined in ATA-6
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#define ATA_CMD_WRITE_DMA 0xca ///< defined in ATA-6
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#define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb ///< defined in ATA-4
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#define ATA_CMD_WRITE_DMA_EXT 0x35 ///< defined in ATA-6
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///
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/// default content of device control register, disable INT,
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/// Bit3 is set to 1 according ATA-1
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@@ -419,12 +415,12 @@ typedef union {
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#define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i
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///
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/// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier
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/// defined in MultiMedia Commands (MMC, MMC-2)
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///
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/// Sense Key
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///
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//
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// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier
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// defined in MultiMedia Commands (MMC, MMC-2)
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//
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// Sense Key
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//
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#define ATA_SK_NO_SENSE (0x0)
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#define ATA_SK_RECOVERY_ERROR (0x1)
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#define ATA_SK_NOT_READY (0x2)
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@@ -442,9 +438,9 @@ typedef union {
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#define ATA_SK_MISCOMPARE (0xE)
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#define ATA_SK_RESERVED_F (0xF)
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///
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/// Additional Sense Codes
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///
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//
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// Additional Sense Codes
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//
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#define ATA_ASC_NOT_READY (0x04)
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#define ATA_ASC_MEDIA_ERR1 (0x10)
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#define ATA_ASC_MEDIA_ERR2 (0x11)
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@@ -466,9 +462,9 @@ typedef union {
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//
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#define ATA_ASCQ_IN_PROGRESS (0x01)
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///
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/// Error Register
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///
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//
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// Error Register
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//
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#define ATA_ERRREG_BBK BIT7 ///< Bad block detected defined in ATA-1
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#define ATA_ERRREG_UNC BIT6 ///< Uncorrectable Data defined in ATA-3
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#define ATA_ERRREG_MC BIT5 ///< Media Change defined in ATA-3
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@@ -478,9 +474,9 @@ typedef union {
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#define ATA_ERRREG_TK0NF BIT1 ///< Track 0 Not Found defined in ATA-3
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#define ATA_ERRREG_AMNF BIT0 ///< Address Mark Not Found defined in ATA-3
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///
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/// Status Register
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///
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//
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// Status Register
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//
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#define ATA_STSREG_BSY BIT7 ///< Controller Busy defined in ATA-6
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#define ATA_STSREG_DRDY BIT6 ///< Drive Ready defined in ATA-6
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#define ATA_STSREG_DWF BIT5 ///< Drive Write Fault defined in ATA-6
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@@ -490,9 +486,9 @@ typedef union {
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#define ATA_STSREG_IDX BIT1 ///< Index defined in ATA-3
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#define ATA_STSREG_ERR BIT0 ///< Error defined in ATA-6
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///
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/// Device Control Register
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///
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//
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// Device Control Register
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//
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#define ATA_CTLREG_SRST BIT2 ///< Software Reset
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#define ATA_CTLREG_IEN_L BIT1 ///< Interrupt Enable #
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