PrmPkg: Apply uncrustify changes

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in PrmPkg.

Cc: Andrew Fish <afish@apple.com>
Cc: Kang Gao <kang.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Benjamin You <benjamin.you@intel.com>
Cc: Liu Yun <yun.y.liu@intel.com>
Cc: Ankit Sinha <ankit.sinha@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Ankit Sinha <ankit.sinha@intel.com>
This commit is contained in:
Michael Kubacki
2022-03-15 14:46:34 -04:00
committed by mergify[bot]
parent f3c11224b5
commit a298a84478
40 changed files with 1501 additions and 1431 deletions

View File

@ -15,8 +15,8 @@
#ifndef HPET_REGISTER_H_
#define HPET_REGISTER_H_
#define HPET_BASE_ADDRESS 0xFED00000
#define HPET_RANGE_LENGTH 0x1000
#define HPET_BASE_ADDRESS 0xFED00000
#define HPET_RANGE_LENGTH 0x1000
///
/// HPET General Register Offsets
@ -28,15 +28,15 @@
///
/// HPET Timer Register Offsets
///
#define HPET_MAIN_COUNTER_OFFSET 0x0F0
#define HPET_TIMER_CONFIGURATION_OFFSET 0x100
#define HPET_TIMER_COMPARATOR_OFFSET 0x108
#define HPET_TIMER_MSI_ROUTE_OFFSET 0x110
#define HPET_MAIN_COUNTER_OFFSET 0x0F0
#define HPET_TIMER_CONFIGURATION_OFFSET 0x100
#define HPET_TIMER_COMPARATOR_OFFSET 0x108
#define HPET_TIMER_MSI_ROUTE_OFFSET 0x110
///
/// Stride between sets of HPET Timer Registers
///
#define HPET_TIMER_STRIDE 0x20
#define HPET_TIMER_STRIDE 0x20
#pragma pack(1)
@ -45,15 +45,15 @@
///
typedef union {
struct {
UINT32 Revision:8;
UINT32 NumberOfTimers:5;
UINT32 CounterSize:1;
UINT32 Reserved0:1;
UINT32 LegacyRoute:1;
UINT32 VendorId:16;
UINT32 CounterClockPeriod:32;
UINT32 Revision : 8;
UINT32 NumberOfTimers : 5;
UINT32 CounterSize : 1;
UINT32 Reserved0 : 1;
UINT32 LegacyRoute : 1;
UINT32 VendorId : 16;
UINT32 CounterClockPeriod : 32;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} HPET_GENERAL_CAPABILITIES_ID_REGISTER;
///
@ -61,12 +61,12 @@ typedef union {
///
typedef union {
struct {
UINT32 MainCounterEnable:1;
UINT32 LegacyRouteEnable:1;
UINT32 Reserved0:30;
UINT32 Reserved1:32;
UINT32 MainCounterEnable : 1;
UINT32 LegacyRouteEnable : 1;
UINT32 Reserved0 : 30;
UINT32 Reserved1 : 32;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} HPET_GENERAL_CONFIGURATION_REGISTER;
///
@ -74,22 +74,22 @@ typedef union {
///
typedef union {
struct {
UINT32 Reserved0:1;
UINT32 LevelTriggeredInterrupt:1;
UINT32 InterruptEnable:1;
UINT32 PeriodicInterruptEnable:1;
UINT32 PeriodicInterruptCapability:1;
UINT32 CounterSizeCapability:1;
UINT32 ValueSetEnable:1;
UINT32 Reserved1:1;
UINT32 CounterSizeEnable:1;
UINT32 InterruptRoute:5;
UINT32 MsiInterruptEnable:1;
UINT32 MsiInterruptCapability:1;
UINT32 Reserved2:16;
UINT32 InterruptRouteCapability;
UINT32 Reserved0 : 1;
UINT32 LevelTriggeredInterrupt : 1;
UINT32 InterruptEnable : 1;
UINT32 PeriodicInterruptEnable : 1;
UINT32 PeriodicInterruptCapability : 1;
UINT32 CounterSizeCapability : 1;
UINT32 ValueSetEnable : 1;
UINT32 Reserved1 : 1;
UINT32 CounterSizeEnable : 1;
UINT32 InterruptRoute : 5;
UINT32 MsiInterruptEnable : 1;
UINT32 MsiInterruptCapability : 1;
UINT32 Reserved2 : 16;
UINT32 InterruptRouteCapability;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} HPET_TIMER_CONFIGURATION_REGISTER;
///
@ -97,10 +97,10 @@ typedef union {
///
typedef union {
struct {
UINT32 Value:32;
UINT32 Address:32;
UINT32 Value : 32;
UINT32 Address : 32;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} HPET_TIMER_MSI_ROUTE_REGISTER;
#pragma pack()