Add IntelFspWrapper to support boot EDKII on FSP bin.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Ravi Rangarajan <ravi.p.rangarajan@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15676 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jyao1
jyao1
66
IntelFspWrapperPkg/Library/BaseFspApiLib/BaseFspApiLib.inf
Normal file
66
IntelFspWrapperPkg/Library/BaseFspApiLib/BaseFspApiLib.inf
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@@ -0,0 +1,66 @@
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## @file
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# Provide FSP API related function.
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#
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# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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#
|
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# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php.
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
##
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################################################################################
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#
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# Defines Section - statements that will be processed to create a Makefile.
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#
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################################################################################
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = BaseFspApiLib
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FILE_GUID = 6E4CB8C5-6144-4ae3-BA52-B6AFBCB2B2F5
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = FspApiLib
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64
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#
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################################################################################
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#
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# Sources Section - list of files that are required for the build to succeed.
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#
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################################################################################
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[Sources]
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FspApiLib.c
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[Sources.IA32]
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IA32/DispatchExecute.c
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[Sources.X64]
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X64/DispatchExecute.c
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X64/Thunk64To32.asm
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X64/Thunk64To32.S
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################################################################################
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#
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# Package Dependency Section - list of Package files that are required for
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||||
# this module.
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#
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################################################################################
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[Packages]
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MdePkg/MdePkg.dec
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IntelFspPkg/IntelFspPkg.dec
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IntelFspWrapperPkg/IntelFspWrapperPkg.dec
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[LibraryClasses]
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[Guids]
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gFspHeaderFileGuid
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127
IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
Normal file
127
IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
Normal file
@@ -0,0 +1,127 @@
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/** @file
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Provide FSP API related function.
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|
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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||||
|
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**/
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#include <PiPei.h>
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#include <Guid/FspHeaderFile.h>
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#include <Library/FspApiLib.h>
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#include <Library/BaseMemoryLib.h>
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/**
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Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
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long mode.
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@param[in] Function The 32bit code entry to be executed.
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@param[in] Param1 The first parameter to pass to 32bit code.
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@return FSP_STATUS.
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**/
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FSP_STATUS
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Execute32BitCode (
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IN UINT64 Function,
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IN UINT64 Param1
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);
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/**
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Find FSP header pointer.
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@param[in] FlashFvFspBase Flash address of FSP FV.
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@return FSP header pointer.
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**/
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FSP_INFO_HEADER *
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EFIAPI
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FspFindFspHeader (
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IN EFI_PHYSICAL_ADDRESS FlashFvFspBase
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)
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{
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UINT8 *CheckPointer;
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CheckPointer = (UINT8 *) (UINTN) FlashFvFspBase;
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if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->Signature != EFI_FVH_SIGNATURE) {
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return NULL;
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}
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if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset != 0) {
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CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset;
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CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)CheckPointer)->ExtHeaderSize;
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CheckPointer = (UINT8 *) ALIGN_POINTER (CheckPointer, 8);
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} else {
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CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->HeaderLength;
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}
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if (!CompareGuid (&((EFI_FFS_FILE_HEADER *)CheckPointer)->Name, &gFspHeaderFileGuid)) {
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return NULL;
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}
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CheckPointer = CheckPointer + sizeof (EFI_FFS_FILE_HEADER);
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if (((EFI_RAW_SECTION *)CheckPointer)->Type != EFI_SECTION_RAW) {
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return NULL;
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}
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CheckPointer = CheckPointer + sizeof (EFI_RAW_SECTION);
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return (FSP_INFO_HEADER *)CheckPointer;
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}
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/**
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Call FSP API - FspInit.
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@param[in] FspHeader FSP header pointer.
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@param[in] FspInitParams Address pointer to the FSP_INIT_PARAMS structure.
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@return FSP status returned by FspInit API.
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**/
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FSP_STATUS
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EFIAPI
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CallFspInit (
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IN FSP_INFO_HEADER *FspHeader,
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IN FSP_INIT_PARAMS *FspInitParams
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)
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{
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FSP_FSP_INIT FspInitApi;
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FSP_STATUS FspStatus;
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FspInitApi = (FSP_FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);
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FspStatus = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);
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return FspStatus;
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}
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/**
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Call FSP API - FspNotifyPhase.
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@param[in] FspHeader FSP header pointer.
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@param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.
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@return FSP status returned by FspNotifyPhase API.
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**/
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FSP_STATUS
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EFIAPI
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CallFspNotifyPhase (
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IN FSP_INFO_HEADER *FspHeader,
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IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams
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)
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{
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FSP_NOTFY_PHASE NotifyPhaseApi;
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FSP_STATUS FspStatus;
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NotifyPhaseApi = (FSP_NOTFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);
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FspStatus = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);
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return FspStatus;
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}
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@@ -0,0 +1,47 @@
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/** @file
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Execute 32-bit code in Protected Mode.
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
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**/
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#include <Uefi.h>
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#include <FspApi.h>
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typedef
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FSP_STATUS
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(FSPAPI *FSP_FUNCTION) (
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IN VOID *Param1
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);
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/**
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Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
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long mode.
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@param[in] Function The 32bit code entry to be executed.
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@param[in] Param1 The first parameter to pass to 32bit code.
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@return FSP_STATUS.
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**/
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FSP_STATUS
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Execute32BitCode (
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IN UINT64 Function,
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IN UINT64 Param1
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)
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{
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FSP_FUNCTION EntryFunc;
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FSP_STATUS Status;
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EntryFunc = (FSP_FUNCTION) (UINTN) (Function);
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Status = EntryFunc ((VOID *)(UINTN)Param1);
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return Status;
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}
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@@ -0,0 +1,94 @@
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/** @file
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Execute 32-bit code in Long Mode.
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Provide a thunk function to transition from long mode to compatibility mode to execute 32-bit code and then transit
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back to long mode.
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
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**/
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#include <Uefi.h>
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#include <Library/BaseLib.h>
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#include <FspApi.h>
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#pragma pack(1)
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typedef union {
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struct {
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UINT32 LimitLow : 16;
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UINT32 BaseLow : 16;
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UINT32 BaseMid : 8;
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UINT32 Type : 4;
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UINT32 System : 1;
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UINT32 Dpl : 2;
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UINT32 Present : 1;
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UINT32 LimitHigh : 4;
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UINT32 Software : 1;
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UINT32 Reserved : 1;
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UINT32 DefaultSize : 1;
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UINT32 Granularity : 1;
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UINT32 BaseHigh : 8;
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} Bits;
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UINT64 Uint64;
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} IA32_GDT;
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#pragma pack()
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GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
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{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, /* 0x0: reserve */
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{{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}}, /* 0x8: compatibility mode */
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{{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}}, /* 0x10: for long mode */
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{{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}}, /* 0x18: data */
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{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, /* 0x20: reserve */
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};
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//
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// IA32 Gdt register
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//
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GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
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sizeof (mGdtEntries) - 1,
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(UINTN) mGdtEntries
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};
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/**
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Assembly function to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
|
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long mode.
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@param[in] Function The 32bit code entry to be executed.
|
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@param[in] Param1 The first parameter to pass to 32bit code
|
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@param[in] Param2 The second parameter to pass to 32bit code
|
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@param[in] InternalGdtr The GDT and GDT descriptor used by this library
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|
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@return status.
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**/
|
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UINT32
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AsmExecute32BitCode (
|
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IN UINT64 Function,
|
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IN UINT64 Param1,
|
||||
IN UINT64 Param2,
|
||||
IN IA32_DESCRIPTOR *InternalGdtr
|
||||
);
|
||||
|
||||
/**
|
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Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
|
||||
long mode.
|
||||
|
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@param[in] Function The 32bit code entry to be executed.
|
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@param[in] Param1 The first parameter to pass to 32bit code.
|
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|
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@return FSP_STATUS.
|
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**/
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FSP_STATUS
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Execute32BitCode (
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IN UINT64 Function,
|
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IN UINT64 Param1
|
||||
)
|
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{
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return AsmExecute32BitCode (Function, Param1, 0, &mGdt);
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}
|
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|
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230
IntelFspWrapperPkg/Library/BaseFspApiLib/X64/Thunk64To32.S
Normal file
230
IntelFspWrapperPkg/Library/BaseFspApiLib/X64/Thunk64To32.S
Normal file
@@ -0,0 +1,230 @@
|
||||
#
|
||||
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php.
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#
|
||||
# Module Name:
|
||||
#
|
||||
# Thunk64To32.asm
|
||||
#
|
||||
# Abstract:
|
||||
#
|
||||
# This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then
|
||||
# transit back to long mode.
|
||||
#
|
||||
#-------------------------------------------------------------------------------
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# Procedure: AsmExecute32BitCode
|
||||
#
|
||||
# Input: None
|
||||
#
|
||||
# Output: None
|
||||
#
|
||||
# Prototype: UINT32
|
||||
# AsmExecute32BitCode (
|
||||
# IN UINT64 Function,
|
||||
# IN UINT64 Param1,
|
||||
# IN UINT64 Param2,
|
||||
# IN IA32_DESCRIPTOR *InternalGdtr
|
||||
# );
|
||||
#
|
||||
#
|
||||
# Description: A thunk function to execute 32-bit code in long mode.
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
ASM_GLOBAL ASM_PFX(AsmExecute32BitCode)
|
||||
ASM_PFX(AsmExecute32BitCode):
|
||||
#
|
||||
# save IFLAG and disable it
|
||||
#
|
||||
pushfq
|
||||
cli
|
||||
|
||||
#
|
||||
# save orignal GDTR and CS
|
||||
#
|
||||
movl %ds, %eax
|
||||
push %rax
|
||||
movl %cs, %eax
|
||||
push %rax
|
||||
subq $0x10, %rsp
|
||||
sgdt (%rsp)
|
||||
#
|
||||
# load internal GDT
|
||||
#
|
||||
lgdt (%r9)
|
||||
#
|
||||
# Save general purpose register and rflag register
|
||||
#
|
||||
pushfq
|
||||
push %rdi
|
||||
push %rsi
|
||||
push %rbp
|
||||
push %rbx
|
||||
|
||||
#
|
||||
# save CR3
|
||||
#
|
||||
movq %cr3, %rax
|
||||
movq %rax, %rbp
|
||||
|
||||
#
|
||||
# Prepare the CS and return address for the transition from 32-bit to 64-bit mode
|
||||
#
|
||||
movq $0x10, %rax # load long mode selector
|
||||
shl $32, %rax
|
||||
lea ReloadCS(%rip), %r9 #Assume the ReloadCS is under 4G
|
||||
orq %r9, %rax
|
||||
push %rax
|
||||
#
|
||||
# Save parameters for 32-bit function call
|
||||
#
|
||||
movq %r8, %rax
|
||||
shl $32, %rax
|
||||
orq %rdx, %rax
|
||||
push %rax
|
||||
#
|
||||
# save the 32-bit function entry and the return address into stack which will be
|
||||
# retrieve in compatibility mode.
|
||||
#
|
||||
lea ReturnBack(%rip), %rax #Assume the ReloadCS is under 4G
|
||||
shl $32, %rax
|
||||
orq %rcx, %rax
|
||||
push %rax
|
||||
|
||||
#
|
||||
# let rax save DS
|
||||
#
|
||||
movq $0x18, %rax
|
||||
|
||||
#
|
||||
# Change to Compatible Segment
|
||||
#
|
||||
movq $8, %rcx # load compatible mode selector
|
||||
shl $32, %rcx
|
||||
lea Compatible(%rip), %rdx # assume address < 4G
|
||||
orq %rdx, %rcx
|
||||
push %rcx
|
||||
.byte 0xcb # retf
|
||||
|
||||
Compatible:
|
||||
# reload DS/ES/SS to make sure they are correct referred to current GDT
|
||||
movw %ax, %ds
|
||||
movw %ax, %es
|
||||
movw %ax, %ss
|
||||
|
||||
#
|
||||
# Disable paging
|
||||
#
|
||||
movq %cr0, %rcx
|
||||
btc $31, %ecx
|
||||
movq %rcx, %cr0
|
||||
#
|
||||
# Clear EFER.LME
|
||||
#
|
||||
movl $0xC0000080, %ecx
|
||||
rdmsr
|
||||
btc $8, %eax
|
||||
wrmsr
|
||||
|
||||
# Now we are in protected mode
|
||||
#
|
||||
# Call 32-bit function. Assume the function entry address and parameter value is less than 4G
|
||||
#
|
||||
pop %rax # Here is the function entry
|
||||
#
|
||||
# Now the parameter is at the bottom of the stack, then call in to IA32 function.
|
||||
#
|
||||
jmp *%rax
|
||||
ReturnBack:
|
||||
movl %eax, %ebx # save return status
|
||||
pop %rcx # drop param1
|
||||
pop %rcx # drop param2
|
||||
|
||||
#
|
||||
# restore CR4
|
||||
#
|
||||
movq %cr4, %rax
|
||||
bts $5, %eax
|
||||
movq %rax, %cr4
|
||||
|
||||
#
|
||||
# restore CR3
|
||||
#
|
||||
movl %ebp, %eax
|
||||
movq %rax, %cr3
|
||||
|
||||
#
|
||||
# Set EFER.LME to re-enable ia32-e
|
||||
#
|
||||
movl $0xC0000080, %ecx
|
||||
rdmsr
|
||||
bts $8, %eax
|
||||
wrmsr
|
||||
#
|
||||
# Enable paging
|
||||
#
|
||||
movq %cr0, %rax
|
||||
bts $31, %eax
|
||||
mov %rax, %cr0
|
||||
# Now we are in compatible mode
|
||||
|
||||
#
|
||||
# Reload cs register
|
||||
#
|
||||
.byte 0xcb # retf
|
||||
ReloadCS:
|
||||
#
|
||||
# Now we're in Long Mode
|
||||
#
|
||||
#
|
||||
# Restore C register and eax hold the return status from 32-bit function.
|
||||
# Note: Do not touch rax from now which hold the return value from IA32 function
|
||||
#
|
||||
movl %ebx, %eax # put return status to EAX
|
||||
pop %rbx
|
||||
pop %rbp
|
||||
pop %rsi
|
||||
pop %rdi
|
||||
popfq
|
||||
#
|
||||
# Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor.
|
||||
#
|
||||
lgdt (%rsp)
|
||||
#
|
||||
# drop GDT descriptor in stack
|
||||
#
|
||||
addq $0x10, %rsp
|
||||
#
|
||||
# switch to orignal CS and GDTR
|
||||
#
|
||||
pop %r9 # get CS
|
||||
shl $32, %r9 # rcx[32..47] <- Cs
|
||||
lea ReturnToLongMode(%rip), %rcx
|
||||
orq %r9, %rcx
|
||||
push %rcx
|
||||
.byte 0xcb # retf
|
||||
ReturnToLongMode:
|
||||
#
|
||||
# Reload original DS/ES/SS
|
||||
#
|
||||
pop %rcx
|
||||
movl %ecx, %ds
|
||||
movl %ecx, %es
|
||||
movl %ecx, %ss
|
||||
|
||||
#
|
||||
# Restore IFLAG
|
||||
#
|
||||
popfq
|
||||
|
||||
ret
|
||||
|
||||
230
IntelFspWrapperPkg/Library/BaseFspApiLib/X64/Thunk64To32.asm
Normal file
230
IntelFspWrapperPkg/Library/BaseFspApiLib/X64/Thunk64To32.asm
Normal file
@@ -0,0 +1,230 @@
|
||||
;
|
||||
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;
|
||||
; Module Name:
|
||||
;
|
||||
; Thunk64To32.asm
|
||||
;
|
||||
; Abstract:
|
||||
;
|
||||
; This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then
|
||||
; transit back to long mode.
|
||||
;
|
||||
;-------------------------------------------------------------------------------
|
||||
.code
|
||||
;----------------------------------------------------------------------------
|
||||
; Procedure: AsmExecute32BitCode
|
||||
;
|
||||
; Input: None
|
||||
;
|
||||
; Output: None
|
||||
;
|
||||
; Prototype: UINT32
|
||||
; AsmExecute32BitCode (
|
||||
; IN UINT64 Function,
|
||||
; IN UINT64 Param1,
|
||||
; IN UINT64 Param2,
|
||||
; IN IA32_DESCRIPTOR *InternalGdtr
|
||||
; );
|
||||
;
|
||||
;
|
||||
; Description: A thunk function to execute 32-bit code in long mode.
|
||||
;
|
||||
;----------------------------------------------------------------------------
|
||||
AsmExecute32BitCode PROC
|
||||
;
|
||||
; save IFLAG and disable it
|
||||
;
|
||||
pushfq
|
||||
cli
|
||||
|
||||
;
|
||||
; save orignal GDTR and CS
|
||||
;
|
||||
mov rax, ds
|
||||
push rax
|
||||
mov rax, cs
|
||||
push rax
|
||||
sub rsp, 10h
|
||||
sgdt fword ptr [rsp]
|
||||
;
|
||||
; load internal GDT
|
||||
;
|
||||
lgdt fword ptr [r9]
|
||||
;
|
||||
; Save general purpose register and rflag register
|
||||
;
|
||||
pushfq
|
||||
push rdi
|
||||
push rsi
|
||||
push rbp
|
||||
push rbx
|
||||
|
||||
;
|
||||
; save CR3
|
||||
;
|
||||
mov rax, cr3
|
||||
mov rbp, rax
|
||||
|
||||
;
|
||||
; Prepare the CS and return address for the transition from 32-bit to 64-bit mode
|
||||
;
|
||||
mov rax, 10h ; load long mode selector
|
||||
shl rax, 32
|
||||
mov r9, OFFSET ReloadCS ;Assume the ReloadCS is under 4G
|
||||
or rax, r9
|
||||
push rax
|
||||
;
|
||||
; Save parameters for 32-bit function call
|
||||
;
|
||||
mov rax, r8
|
||||
shl rax, 32
|
||||
or rax, rdx
|
||||
push rax
|
||||
;
|
||||
; save the 32-bit function entry and the return address into stack which will be
|
||||
; retrieve in compatibility mode.
|
||||
;
|
||||
mov rax, OFFSET ReturnBack ;Assume the ReloadCS is under 4G
|
||||
shl rax, 32
|
||||
or rax, rcx
|
||||
push rax
|
||||
|
||||
;
|
||||
; let rax save DS
|
||||
;
|
||||
mov rax, 018h
|
||||
|
||||
;
|
||||
; Change to Compatible Segment
|
||||
;
|
||||
mov rcx, 08h ; load compatible mode selector
|
||||
shl rcx, 32
|
||||
mov rdx, OFFSET Compatible ; assume address < 4G
|
||||
or rcx, rdx
|
||||
push rcx
|
||||
retf
|
||||
|
||||
Compatible:
|
||||
; reload DS/ES/SS to make sure they are correct referred to current GDT
|
||||
mov ds, ax
|
||||
mov es, ax
|
||||
mov ss, ax
|
||||
|
||||
;
|
||||
; Disable paging
|
||||
;
|
||||
mov rcx, cr0
|
||||
btc ecx, 31
|
||||
mov cr0, rcx
|
||||
;
|
||||
; Clear EFER.LME
|
||||
;
|
||||
mov ecx, 0C0000080h
|
||||
rdmsr
|
||||
btc eax, 8
|
||||
wrmsr
|
||||
|
||||
; Now we are in protected mode
|
||||
;
|
||||
; Call 32-bit function. Assume the function entry address and parameter value is less than 4G
|
||||
;
|
||||
pop rax ; Here is the function entry
|
||||
;
|
||||
; Now the parameter is at the bottom of the stack, then call in to IA32 function.
|
||||
;
|
||||
jmp rax
|
||||
ReturnBack:
|
||||
mov ebx, eax ; save return status
|
||||
pop rcx ; drop param1
|
||||
pop rcx ; drop param2
|
||||
|
||||
;
|
||||
; restore CR4
|
||||
;
|
||||
mov rax, cr4
|
||||
bts eax, 5
|
||||
mov cr4, rax
|
||||
|
||||
;
|
||||
; restore CR3
|
||||
;
|
||||
mov eax, ebp
|
||||
mov cr3, rax
|
||||
|
||||
;
|
||||
; Set EFER.LME to re-enable ia32-e
|
||||
;
|
||||
mov ecx, 0C0000080h
|
||||
rdmsr
|
||||
bts eax, 8
|
||||
wrmsr
|
||||
;
|
||||
; Enable paging
|
||||
;
|
||||
mov rax, cr0
|
||||
bts eax, 31
|
||||
mov cr0, rax
|
||||
; Now we are in compatible mode
|
||||
|
||||
;
|
||||
; Reload cs register
|
||||
;
|
||||
retf
|
||||
ReloadCS:
|
||||
;
|
||||
; Now we're in Long Mode
|
||||
;
|
||||
;
|
||||
; Restore C register and eax hold the return status from 32-bit function.
|
||||
; Note: Do not touch rax from now which hold the return value from IA32 function
|
||||
;
|
||||
mov eax, ebx ; put return status to EAX
|
||||
pop rbx
|
||||
pop rbp
|
||||
pop rsi
|
||||
pop rdi
|
||||
popfq
|
||||
;
|
||||
; Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor.
|
||||
;
|
||||
lgdt fword ptr[rsp]
|
||||
;
|
||||
; drop GDT descriptor in stack
|
||||
;
|
||||
add rsp, 10h
|
||||
;
|
||||
; switch to orignal CS and GDTR
|
||||
;
|
||||
pop r9 ; get CS
|
||||
shl r9, 32 ; rcx[32..47] <- Cs
|
||||
mov rcx, OFFSET @F
|
||||
or rcx, r9
|
||||
push rcx
|
||||
retf
|
||||
@@:
|
||||
;
|
||||
; Reload original DS/ES/SS
|
||||
;
|
||||
pop rcx
|
||||
mov ds, rcx
|
||||
mov es, rcx
|
||||
mov ss, rcx
|
||||
|
||||
;
|
||||
; Restore IFLAG
|
||||
;
|
||||
popfq
|
||||
|
||||
ret
|
||||
AsmExecute32BitCode ENDP
|
||||
|
||||
END
|
||||
Reference in New Issue
Block a user