SecurityPkg/OpalPassword: Remove HW init codes and consume SSC PPI
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1409 For the current implementation of OpalPassword drivers, it has a feature to support devices being automatically unlocked in the S3 resume. For this feature, two types of devices are supported: * ATA hard disks working under AHCI mode * NVM Express devices The support of this feature requires the above 2 types of device to be initialized at the PEI phase during S3 resume, which is done by the co-work of the OpalPasswordDxe driver and the OpalPasswordPei driver. More specifically, the OpalPasswordDxe will handle: * Pre-allocate MMIO resource and save it in a driver internal LockBox for OpalPasswordPei to retrieve; * Save the PCI configuration space of ATA controllers into boot script. Meanwhile, the OpalPasswordPei will handle: * Rely on the boot script for the PCI configuration space program of ATA controllers; * Restore the driver internal LockBox to get the MMIO resource; * Complete the PCI configuration space program for ATA and NVME controllers; * Initialize ATA and NVME controllers and devices. This commit will remove these hardware initialization related codes from the OpalPassword drivers. The hardware initialization will be covered by PEI storage device drivers (e.g. NvmExpressPei & AhciPei in the MdeModulePkg). After such codes removal, the OpalPasswordDxe will only handle: * Construct/update the S3StorageDeviceInitList LockBox with the managing ATA and NVME devices. And the OpalPasswordPei will only handle: * Locate Storage Security Command PPI instances to perform the device automatic unlock during the S3 resume. Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
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@@ -1,7 +1,7 @@
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/** @file
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Opal Password PEI driver which is used to unlock Opal Password for S3.
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Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@@ -16,8 +16,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#define _OPAL_PASSWORD_PEI_H_
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#include <PiPei.h>
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#include <IndustryStandard/Atapi.h>
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#include <IndustryStandard/Pci.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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@@ -27,107 +25,42 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/HobLib.h>
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#include <Library/TimerLib.h>
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#include <Library/LockBoxLib.h>
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#include <Library/TcgStorageOpalLib.h>
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#include <Library/Tcg2PhysicalPresenceLib.h>
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#include <Library/PeiServicesTablePointerLib.h>
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#include <Protocol/StorageSecurityCommand.h>
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#include <Ppi/IoMmu.h>
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#include <Ppi/StorageSecurityCommand.h>
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#include "OpalPasswordCommon.h"
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#include "OpalAhciMode.h"
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#include "OpalNvmeMode.h"
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//
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// Time out Value for ATA pass through protocol
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// The generic command timeout value (unit in us) for Storage Security Command
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// PPI ReceiveData/SendData services
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//
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#define ATA_TIMEOUT 30000000
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//
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// The payload Length of HDD related ATA commands
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//
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#define HDD_PAYLOAD 512
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//
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// According to ATA spec, the max Length of hdd password is 32 bytes
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//
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#define OPAL_PASSWORD_MAX_LENGTH 32
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#define SSC_PPI_GENERIC_TIMEOUT 30000000
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#pragma pack(1)
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/**
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* Opal I/O Type utilized by the Trusted IO callback
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*
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* The type indicates if the I/O is a send or receive
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*/
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typedef enum {
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//
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// I/O is a TCG Trusted Send command
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//
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OpalSend,
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//
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// I/O is a TCG Trusted Receive command
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//
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OpalRecv
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} OPAL_IO_TYPE;
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#define OPAL_PEI_DEVICE_SIGNATURE SIGNATURE_32 ('o', 'p', 'd', 's')
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#define OPAL_PEI_DEVICE_SIGNATURE SIGNATURE_32 ('o', 'p', 'd', 's')
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typedef struct {
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UINTN Signature;
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EFI_STORAGE_SECURITY_COMMAND_PROTOCOL Sscp;
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UINT8 DeviceType;
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OPAL_DEVICE_COMMON *Device;
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VOID *Context;
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UINTN Signature;
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EFI_STORAGE_SECURITY_COMMAND_PROTOCOL Sscp;
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OPAL_DEVICE_LOCKBOX_DATA *Device;
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VOID *Context;
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EDKII_PEI_STORAGE_SECURITY_CMD_PPI *SscPpi;
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UINTN DeviceIndex;
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} OPAL_PEI_DEVICE;
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#define OPAL_PEI_DEVICE_FROM_THIS(a) CR (a, OPAL_PEI_DEVICE, Sscp, OPAL_PEI_DEVICE_SIGNATURE)
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#define OPAL_PEI_DEVICE_FROM_THIS(a) \
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CR (a, OPAL_PEI_DEVICE, Sscp, OPAL_PEI_DEVICE_SIGNATURE)
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#pragma pack()
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/**
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Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
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OperationBusMasterCommonBuffer64 mapping.
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@param Pages The number of pages to allocate.
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@param HostAddress A pointer to store the base system memory address of the
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allocated range.
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@param DeviceAddress The resulting map address for the bus master PCI controller to use to
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access the hosts HostAddress.
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@param Mapping A resulting value to pass to Unmap().
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@retval EFI_SUCCESS The requested memory pages were allocated.
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@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
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MEMORY_WRITE_COMBINE and MEMORY_CACHED.
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
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**/
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EFI_STATUS
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IoMmuAllocateBuffer (
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IN UINTN Pages,
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OUT VOID **HostAddress,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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);
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/**
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Frees memory that was allocated with AllocateBuffer().
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@param Pages The number of pages to free.
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@param HostAddress The base system memory address of the allocated range.
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@param Mapping The mapping value returned from Map().
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**/
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VOID
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IoMmuFreeBuffer (
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IN UINTN Pages,
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IN VOID *HostAddress,
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IN VOID *Mapping
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);
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#endif // _OPAL_PASSWORD_PEI_H_
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