Add CPU DXE driver for IA32 & X64 processor architectures.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8395 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten
395
UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S
Executable file
395
UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S
Executable file
@@ -0,0 +1,395 @@
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#
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# ConvertAsm.py: Automatically generated from CpuAsm.asm
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#
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# TITLE CpuAsm.asm:
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#------------------------------------------------------------------------------
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#*
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#* Copyright 2006 - 2009, Intel Corporation
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#* All rights reserved. This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
|
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#* which accompanies this distribution. The full text of the license may be found at
|
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#* http://opensource.org/licenses/bsd-license.php
|
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* CpuAsm.S
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#*
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#* Abstract:
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#*
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#------------------------------------------------------------------------------
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#.MMX
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#.XMM
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#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
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#
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# point to the external interrupt vector table
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#
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ExternalVectorTablePtr:
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.byte 0, 0, 0, 0
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.intel_syntax
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ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)
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ASM_PFX(InitializeExternalVectorTablePtr):
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mov eax, [esp+4]
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mov ExternalVectorTablePtr, eax
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ret
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#------------------------------------------------------------------------------
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# VOID
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# SetCodeSelector (
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# UINT16 Selector
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# );
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#------------------------------------------------------------------------------
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.intel_syntax
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ASM_GLOBAL ASM_PFX(SetCodeSelector)
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ASM_PFX(SetCodeSelector):
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mov %ecx, [%esp+4]
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sub %esp, 0x10
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lea %eax, setCodeSelectorLongJump
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mov [%esp], %eax
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mov [%esp+4], %cx
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jmp fword ptr [%esp]
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setCodeSelectorLongJump:
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add %esp, 0x10
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ret
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#------------------------------------------------------------------------------
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# VOID
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# SetDataSelectors (
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# UINT16 Selector
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# );
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#------------------------------------------------------------------------------
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.intel_syntax
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ASM_GLOBAL ASM_PFX(SetDataSelectors)
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ASM_PFX(SetDataSelectors):
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mov %ecx, [%esp+4]
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mov %ss, %cx
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mov %ds, %cx
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mov %es, %cx
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mov %fs, %cx
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mov %gs, %cx
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ret
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#---------------------------------------;
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# CommonInterruptEntry ;
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#---------------------------------------;
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# The follow algorithm is used for the common interrupt routine.
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.intel_syntax
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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ASM_PFX(CommonInterruptEntry):
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cli
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#
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# All interrupt handlers are invoked through interrupt gates, so
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# IF flag automatically cleared at the entry point
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#
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#
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# Calculate vector number
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#
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# Get the return address of call, actually, it is the
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# address of vector number.
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#
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xchg ecx, [esp]
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mov cx, [ecx]
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and ecx, 0x0FFFF
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cmp ecx, 32 # Intel reserved vector for exceptions?
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jae NoErrorCode
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bt ASM_PFX(mErrorCodeFlag), ecx
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jc HasErrorCode
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NoErrorCode:
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + ECX +
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# +---------------------+ <-- ESP
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#
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# Registers:
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# ECX - Vector Number
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#
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#
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# Put Vector Number on stack
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#
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push ecx
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#
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# Put 0 (dummy) error code on stack, and restore ECX
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#
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xor ecx, ecx # ECX = 0
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xchg ecx, [esp+4]
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jmp ErrorCodeAndVectorOnStack
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HasErrorCode:
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + ECX +
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# +---------------------+ <-- ESP
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#
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# Registers:
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# ECX - Vector Number
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#
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#
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# Put Vector Number on stack and restore ECX
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#
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xchg ecx, [esp]
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#
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# Fall through to join main routine code
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# at ErrorCodeAndVectorOnStack
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#
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CommonInterruptEntry_al_0000:
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jmp CommonInterruptEntry_al_0000
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ErrorCodeAndVectorOnStack:
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push ebp
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mov ebp, esp
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + Vector Number +
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# +---------------------+
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# + EBP +
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# +---------------------+ <-- EBP
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#
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#
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# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
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# is 16-byte aligned
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#
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and esp, 0x0fffffff0
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sub esp, 12
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#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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push eax
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push ecx
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push edx
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push ebx
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lea ecx, [ebp + 6 * 4]
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push ecx # ESP
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push dword ptr [ebp] # EBP
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push esi
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push edi
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#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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mov eax, ss
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push eax
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movzx eax, word ptr [ebp + 4 * 4]
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push eax
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mov eax, ds
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push eax
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mov eax, es
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push eax
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mov eax, fs
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push eax
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mov eax, gs
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push eax
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#; UINT32 Eip;
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mov eax, [ebp + 3 * 4]
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push eax
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#; UINT32 Gdtr[2], Idtr[2];
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sub esp, 8
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sidt [esp]
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mov eax, [esp + 2]
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xchg eax, [esp]
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and eax, 0x0FFFF
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mov [esp+4], eax
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sub esp, 8
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sgdt [esp]
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mov eax, [esp + 2]
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xchg eax, [esp]
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and eax, 0x0FFFF
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mov [esp+4], eax
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#; UINT32 Ldtr, Tr;
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xor eax, eax
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str ax
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push eax
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sldt ax
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push eax
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#; UINT32 EFlags;
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mov eax, [ebp + 5 * 4]
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push eax
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#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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mov eax, cr4
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or eax, 0x208
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mov cr4, eax
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push eax
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mov eax, cr3
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push eax
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mov eax, cr2
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push eax
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xor eax, eax
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push eax
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mov eax, cr0
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push eax
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#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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mov eax, dr7
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push eax
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#; clear Dr7 while executing debugger itself
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xor eax, eax
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mov dr7, eax
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mov eax, dr6
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push eax
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#; insure all status bits in dr6 are clear...
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xor eax, eax
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mov dr6, eax
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mov eax, dr3
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push eax
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mov eax, dr2
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push eax
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mov eax, dr1
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push eax
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mov eax, dr0
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push eax
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#; FX_SAVE_STATE_IA32 FxSaveState;
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sub esp, 512
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mov edi, esp
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.byte 0x0f, 0x0ae, 0x07 #fxsave [edi]
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#; UINT32 ExceptionData;
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push dword ptr [ebp + 2 * 4]
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#; call into exception handler
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mov eax, ExternalVectorTablePtr # get the interrupt vectors base
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or eax, eax # NULL?
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jz nullExternalExceptionHandler
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mov ecx, [ebp + 4]
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mov eax, [eax + ecx * 4]
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or eax, eax # NULL?
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jz nullExternalExceptionHandler
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#; Prepare parameter and call
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mov edx, esp
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push edx
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mov edx, dword ptr [ebp + 1 * 4]
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push edx
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#
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# Call External Exception Handler
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#
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call eax
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add esp, 8
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nullExternalExceptionHandler:
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cli
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#; UINT32 ExceptionData;
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add esp, 4
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#; FX_SAVE_STATE_IA32 FxSaveState;
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mov esi, esp
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.byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]
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add esp, 512
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#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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pop eax
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mov dr0, eax
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pop eax
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mov dr1, eax
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pop eax
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mov dr2, eax
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pop eax
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mov dr3, eax
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#; skip restore of dr6. We cleared dr6 during the context save.
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add esp, 4
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pop eax
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mov dr7, eax
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#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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pop eax
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mov cr0, eax
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add esp, 4 # not for Cr1
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pop eax
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mov cr2, eax
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pop eax
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mov cr3, eax
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pop eax
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mov cr4, eax
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#; UINT32 EFlags;
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pop dword ptr [ebp + 5 * 4]
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#; UINT32 Ldtr, Tr;
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#; UINT32 Gdtr[2], Idtr[2];
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#; Best not let anyone mess with these particular registers...
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add esp, 24
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#; UINT32 Eip;
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pop dword ptr [ebp + 3 * 4]
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#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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#; NOTE - modified segment registers could hang the debugger... We
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#; could attempt to insulate ourselves against this possibility,
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#; but that poses risks as well.
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#;
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pop gs
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pop fs
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pop es
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pop ds
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pop dword ptr [ebp + 4 * 4]
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pop ss
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#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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pop edi
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pop esi
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add esp, 4 # not for ebp
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add esp, 4 # not for esp
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pop ebx
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pop edx
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pop ecx
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pop eax
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mov esp, ebp
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pop ebp
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add esp, 8
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iretd
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#END
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384
UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm
Executable file
384
UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm
Executable file
@@ -0,0 +1,384 @@
|
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TITLE CpuAsm.asm:
|
||||
;------------------------------------------------------------------------------
|
||||
;*
|
||||
;* Copyright 2006 - 2009, Intel Corporation
|
||||
;* All rights reserved. This program and the accompanying materials
|
||||
;* are licensed and made available under the terms and conditions of the BSD License
|
||||
;* which accompanies this distribution. The full text of the license may be found at
|
||||
;* http://opensource.org/licenses/bsd-license.php
|
||||
;*
|
||||
;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;*
|
||||
;* CpuAsm.asm
|
||||
;*
|
||||
;* Abstract:
|
||||
;*
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.686
|
||||
.model flat,C
|
||||
.code
|
||||
|
||||
EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
|
||||
|
||||
;
|
||||
; point to the external interrupt vector table
|
||||
;
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||||
ExternalVectorTablePtr DWORD 0
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||||
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InitializeExternalVectorTablePtr PROC PUBLIC
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mov eax, [esp+4]
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mov ExternalVectorTablePtr, eax
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ret
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InitializeExternalVectorTablePtr ENDP
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||||
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||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; SetCodeSelector (
|
||||
; UINT16 Selector
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
SetCodeSelector PROC PUBLIC
|
||||
mov ecx, [esp+4]
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||||
sub esp, 0x10
|
||||
lea eax, setCodeSelectorLongJump
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||||
mov [esp], eax
|
||||
mov [esp+4], cx
|
||||
jmp fword ptr [esp]
|
||||
setCodeSelectorLongJump:
|
||||
add esp, 0x10
|
||||
ret
|
||||
SetCodeSelector ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; SetDataSelectors (
|
||||
; UINT16 Selector
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
SetDataSelectors PROC PUBLIC
|
||||
mov ecx, [esp+4]
|
||||
mov ss, cx
|
||||
mov ds, cx
|
||||
mov es, cx
|
||||
mov fs, cx
|
||||
mov gs, cx
|
||||
ret
|
||||
SetDataSelectors ENDP
|
||||
|
||||
;---------------------------------------;
|
||||
; CommonInterruptEntry ;
|
||||
;---------------------------------------;
|
||||
; The follow algorithm is used for the common interrupt routine.
|
||||
|
||||
CommonInterruptEntry PROC PUBLIC
|
||||
cli
|
||||
;
|
||||
; All interrupt handlers are invoked through interrupt gates, so
|
||||
; IF flag automatically cleared at the entry point
|
||||
;
|
||||
|
||||
;
|
||||
; Calculate vector number
|
||||
;
|
||||
; Get the return address of call, actually, it is the
|
||||
; address of vector number.
|
||||
;
|
||||
xchg ecx, [esp]
|
||||
mov cx, [ecx]
|
||||
and ecx, 0FFFFh
|
||||
cmp ecx, 32 ; Intel reserved vector for exceptions?
|
||||
jae NoErrorCode
|
||||
bt mErrorCodeFlag, ecx
|
||||
jc HasErrorCode
|
||||
|
||||
NoErrorCode:
|
||||
|
||||
;
|
||||
; Stack:
|
||||
; +---------------------+
|
||||
; + EFlags +
|
||||
; +---------------------+
|
||||
; + CS +
|
||||
; +---------------------+
|
||||
; + EIP +
|
||||
; +---------------------+
|
||||
; + ECX +
|
||||
; +---------------------+ <-- ESP
|
||||
;
|
||||
; Registers:
|
||||
; ECX - Vector Number
|
||||
;
|
||||
|
||||
;
|
||||
; Put Vector Number on stack
|
||||
;
|
||||
push ecx
|
||||
|
||||
;
|
||||
; Put 0 (dummy) error code on stack, and restore ECX
|
||||
;
|
||||
xor ecx, ecx ; ECX = 0
|
||||
xchg ecx, [esp+4]
|
||||
|
||||
jmp ErrorCodeAndVectorOnStack
|
||||
|
||||
HasErrorCode:
|
||||
|
||||
;
|
||||
; Stack:
|
||||
; +---------------------+
|
||||
; + EFlags +
|
||||
; +---------------------+
|
||||
; + CS +
|
||||
; +---------------------+
|
||||
; + EIP +
|
||||
; +---------------------+
|
||||
; + Error Code +
|
||||
; +---------------------+
|
||||
; + ECX +
|
||||
; +---------------------+ <-- ESP
|
||||
;
|
||||
; Registers:
|
||||
; ECX - Vector Number
|
||||
;
|
||||
|
||||
;
|
||||
; Put Vector Number on stack and restore ECX
|
||||
;
|
||||
xchg ecx, [esp]
|
||||
|
||||
;
|
||||
; Fall through to join main routine code
|
||||
; at ErrorCodeAndVectorOnStack
|
||||
;
|
||||
@@:
|
||||
jmp @B
|
||||
|
||||
ErrorCodeAndVectorOnStack:
|
||||
push ebp
|
||||
mov ebp, esp
|
||||
|
||||
;
|
||||
; Stack:
|
||||
; +---------------------+
|
||||
; + EFlags +
|
||||
; +---------------------+
|
||||
; + CS +
|
||||
; +---------------------+
|
||||
; + EIP +
|
||||
; +---------------------+
|
||||
; + Error Code +
|
||||
; +---------------------+
|
||||
; + Vector Number +
|
||||
; +---------------------+
|
||||
; + EBP +
|
||||
; +---------------------+ <-- EBP
|
||||
;
|
||||
|
||||
;
|
||||
; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
|
||||
; is 16-byte aligned
|
||||
;
|
||||
and esp, 0fffffff0h
|
||||
sub esp, 12
|
||||
|
||||
;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
|
||||
push eax
|
||||
push ecx
|
||||
push edx
|
||||
push ebx
|
||||
lea ecx, [ebp + 6 * 4]
|
||||
push ecx ; ESP
|
||||
push dword ptr [ebp] ; EBP
|
||||
push esi
|
||||
push edi
|
||||
|
||||
;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
mov eax, ss
|
||||
push eax
|
||||
movzx eax, word ptr [ebp + 4 * 4]
|
||||
push eax
|
||||
mov eax, ds
|
||||
push eax
|
||||
mov eax, es
|
||||
push eax
|
||||
mov eax, fs
|
||||
push eax
|
||||
mov eax, gs
|
||||
push eax
|
||||
|
||||
;; UINT32 Eip;
|
||||
mov eax, [ebp + 3 * 4]
|
||||
push eax
|
||||
|
||||
;; UINT32 Gdtr[2], Idtr[2];
|
||||
sub esp, 8
|
||||
sidt [esp]
|
||||
mov eax, [esp + 2]
|
||||
xchg eax, [esp]
|
||||
and eax, 0FFFFh
|
||||
mov [esp+4], eax
|
||||
|
||||
sub esp, 8
|
||||
sgdt [esp]
|
||||
mov eax, [esp + 2]
|
||||
xchg eax, [esp]
|
||||
and eax, 0FFFFh
|
||||
mov [esp+4], eax
|
||||
|
||||
;; UINT32 Ldtr, Tr;
|
||||
xor eax, eax
|
||||
str ax
|
||||
push eax
|
||||
sldt ax
|
||||
push eax
|
||||
|
||||
;; UINT32 EFlags;
|
||||
mov eax, [ebp + 5 * 4]
|
||||
push eax
|
||||
|
||||
;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
||||
mov eax, cr4
|
||||
or eax, 208h
|
||||
mov cr4, eax
|
||||
push eax
|
||||
mov eax, cr3
|
||||
push eax
|
||||
mov eax, cr2
|
||||
push eax
|
||||
xor eax, eax
|
||||
push eax
|
||||
mov eax, cr0
|
||||
push eax
|
||||
|
||||
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
mov eax, dr7
|
||||
push eax
|
||||
;; clear Dr7 while executing debugger itself
|
||||
xor eax, eax
|
||||
mov dr7, eax
|
||||
|
||||
mov eax, dr6
|
||||
push eax
|
||||
;; insure all status bits in dr6 are clear...
|
||||
xor eax, eax
|
||||
mov dr6, eax
|
||||
|
||||
mov eax, dr3
|
||||
push eax
|
||||
mov eax, dr2
|
||||
push eax
|
||||
mov eax, dr1
|
||||
push eax
|
||||
mov eax, dr0
|
||||
push eax
|
||||
|
||||
;; FX_SAVE_STATE_IA32 FxSaveState;
|
||||
sub esp, 512
|
||||
mov edi, esp
|
||||
db 0fh, 0aeh, 07h ;fxsave [edi]
|
||||
|
||||
;; UINT32 ExceptionData;
|
||||
push dword ptr [ebp + 2 * 4]
|
||||
|
||||
;; call into exception handler
|
||||
mov eax, ExternalVectorTablePtr ; get the interrupt vectors base
|
||||
or eax, eax ; NULL?
|
||||
jz nullExternalExceptionHandler
|
||||
|
||||
mov ecx, [ebp + 4]
|
||||
mov eax, [eax + ecx * 4]
|
||||
or eax, eax ; NULL?
|
||||
jz nullExternalExceptionHandler
|
||||
|
||||
;; Prepare parameter and call
|
||||
mov edx, esp
|
||||
push edx
|
||||
mov edx, dword ptr [ebp + 1 * 4]
|
||||
push edx
|
||||
|
||||
;
|
||||
; Call External Exception Handler
|
||||
;
|
||||
call eax
|
||||
add esp, 8
|
||||
|
||||
nullExternalExceptionHandler:
|
||||
|
||||
cli
|
||||
;; UINT32 ExceptionData;
|
||||
add esp, 4
|
||||
|
||||
;; FX_SAVE_STATE_IA32 FxSaveState;
|
||||
mov esi, esp
|
||||
db 0fh, 0aeh, 0eh ; fxrstor [esi]
|
||||
add esp, 512
|
||||
|
||||
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
pop eax
|
||||
mov dr0, eax
|
||||
pop eax
|
||||
mov dr1, eax
|
||||
pop eax
|
||||
mov dr2, eax
|
||||
pop eax
|
||||
mov dr3, eax
|
||||
;; skip restore of dr6. We cleared dr6 during the context save.
|
||||
add esp, 4
|
||||
pop eax
|
||||
mov dr7, eax
|
||||
|
||||
;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
||||
pop eax
|
||||
mov cr0, eax
|
||||
add esp, 4 ; not for Cr1
|
||||
pop eax
|
||||
mov cr2, eax
|
||||
pop eax
|
||||
mov cr3, eax
|
||||
pop eax
|
||||
mov cr4, eax
|
||||
|
||||
;; UINT32 EFlags;
|
||||
pop dword ptr [ebp + 5 * 4]
|
||||
|
||||
;; UINT32 Ldtr, Tr;
|
||||
;; UINT32 Gdtr[2], Idtr[2];
|
||||
;; Best not let anyone mess with these particular registers...
|
||||
add esp, 24
|
||||
|
||||
;; UINT32 Eip;
|
||||
pop dword ptr [ebp + 3 * 4]
|
||||
|
||||
;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
;; NOTE - modified segment registers could hang the debugger... We
|
||||
;; could attempt to insulate ourselves against this possibility,
|
||||
;; but that poses risks as well.
|
||||
;;
|
||||
pop gs
|
||||
pop fs
|
||||
pop es
|
||||
pop ds
|
||||
pop dword ptr [ebp + 4 * 4]
|
||||
pop ss
|
||||
|
||||
;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
|
||||
pop edi
|
||||
pop esi
|
||||
add esp, 4 ; not for ebp
|
||||
add esp, 4 ; not for esp
|
||||
pop ebx
|
||||
pop edx
|
||||
pop ecx
|
||||
pop eax
|
||||
|
||||
mov esp, ebp
|
||||
pop ebp
|
||||
add esp, 8
|
||||
iretd
|
||||
|
||||
CommonInterruptEntry ENDP
|
||||
|
||||
END
|
||||
66
UefiCpuPkg/CpuDxe/Ia32/IvtAsm.S
Executable file
66
UefiCpuPkg/CpuDxe/Ia32/IvtAsm.S
Executable file
@@ -0,0 +1,66 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2006 - 2009, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
# Module Name:
|
||||
#
|
||||
# IvtAsm.S
|
||||
#
|
||||
# Abstract:
|
||||
#
|
||||
# Interrupt Vector Table
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#
|
||||
# Interrupt Vector Table
|
||||
#
|
||||
|
||||
.macro SingleIdtVectorMacro vectorNum
|
||||
.intel_syntax
|
||||
call ASM_PFX(CommonInterruptEntry)
|
||||
.short \vectorNum
|
||||
nop
|
||||
.endm
|
||||
|
||||
.macro EightIdtVectors firstVectorNum
|
||||
SingleIdtVectorMacro \firstVectorNum
|
||||
SingleIdtVectorMacro "(\firstVectorNum+1)"
|
||||
SingleIdtVectorMacro "(\firstVectorNum+2)"
|
||||
SingleIdtVectorMacro "(\firstVectorNum+3)"
|
||||
SingleIdtVectorMacro "(\firstVectorNum+4)"
|
||||
SingleIdtVectorMacro "(\firstVectorNum+5)"
|
||||
SingleIdtVectorMacro "(\firstVectorNum+6)"
|
||||
SingleIdtVectorMacro "(\firstVectorNum+7)"
|
||||
.endm
|
||||
|
||||
.macro SixtyFourIdtVectors firstVectorNum
|
||||
EightIdtVectors \firstVectorNum
|
||||
EightIdtVectors "(\firstVectorNum+0x08)"
|
||||
EightIdtVectors "(\firstVectorNum+0x10)"
|
||||
EightIdtVectors "(\firstVectorNum+0x18)"
|
||||
EightIdtVectors "(\firstVectorNum+0x20)"
|
||||
EightIdtVectors "(\firstVectorNum+0x28)"
|
||||
EightIdtVectors "(\firstVectorNum+0x30)"
|
||||
EightIdtVectors "(\firstVectorNum+0x38)"
|
||||
.endm
|
||||
|
||||
ASM_GLOBAL ASM_PFX(AsmIdtVector00)
|
||||
.align 8
|
||||
ASM_PFX(AsmIdtVector00):
|
||||
SixtyFourIdtVectors 0x00
|
||||
SixtyFourIdtVectors 0x40
|
||||
SixtyFourIdtVectors 0x80
|
||||
SixtyFourIdtVectors 0xC0
|
||||
ASM_GLOBAL ASM_PFX(AsmCommonIdtEnd)
|
||||
ASM_PFX(AsmCommonIdtEnd):
|
||||
.byte 0
|
||||
|
||||
|
||||
51
UefiCpuPkg/CpuDxe/Ia32/IvtAsm.asm
Executable file
51
UefiCpuPkg/CpuDxe/Ia32/IvtAsm.asm
Executable file
@@ -0,0 +1,51 @@
|
||||
TITLE IvtAsm.asm:
|
||||
;------------------------------------------------------------------------------
|
||||
;*
|
||||
;* Copyright 2008 - 2009, Intel Corporation
|
||||
;* All rights reserved. This program and the accompanying materials
|
||||
;* are licensed and made available under the terms and conditions of the BSD License
|
||||
;* which accompanies this distribution. The full text of the license may be found at
|
||||
;* http://opensource.org/licenses/bsd-license.php
|
||||
;*
|
||||
;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;*
|
||||
;* IvtAsm.asm
|
||||
;*
|
||||
;* Abstract:
|
||||
;*
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
#include <Base.h>
|
||||
|
||||
#ifdef MDE_CPU_IA32
|
||||
.686
|
||||
.model flat,C
|
||||
#endif
|
||||
.code
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; Generic IDT Vector Handlers for the Host. They are all the same so they
|
||||
; will compress really well.
|
||||
;
|
||||
; By knowing the return address for Vector 00 you can can calculate the
|
||||
; vector number by looking at the call CommonInterruptEntry return address.
|
||||
; (return address - (AsmIdtVector00 + 5))/8 == IDT index
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
EXTRN CommonInterruptEntry:PROC
|
||||
|
||||
ALIGN 8
|
||||
|
||||
PUBLIC AsmIdtVector00
|
||||
|
||||
AsmIdtVector00 LABEL BYTE
|
||||
REPEAT 256
|
||||
call CommonInterruptEntry
|
||||
dw ($ - AsmIdtVector00 - 5) / 8 ; vector number
|
||||
nop
|
||||
ENDM
|
||||
|
||||
END
|
||||
|
||||
Reference in New Issue
Block a user