1) remove wrong global variable usage because it will bring data corrupt if there are multiple XHCI host controllers.
2) coding style clean up. Signed-off-by: erictian Reviewed-by: ydong10 Reviewed-by: jshi19 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12351 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
@@ -18,7 +18,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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/**
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Read 1-byte width XHCI capability register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 1-byte width capability register.
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@return The register content read.
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@@ -27,7 +27,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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UINT8
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XhcReadCapReg8 (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset
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)
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{
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@@ -54,7 +54,7 @@ XhcReadCapReg8 (
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/**
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Read 4-bytes width XHCI capability register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 4-bytes width capability register.
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@return The register content read.
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@@ -63,7 +63,7 @@ XhcReadCapReg8 (
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**/
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UINT32
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XhcReadCapReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset
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)
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{
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@@ -90,7 +90,7 @@ XhcReadCapReg (
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/**
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Read 4-bytes width XHCI Operational register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 4-bytes width operational register.
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@return The register content read.
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@@ -99,7 +99,7 @@ XhcReadCapReg (
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**/
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UINT32
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XhcReadOpReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset
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)
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{
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@@ -128,14 +128,14 @@ XhcReadOpReg (
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/**
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Write the data to the 4-bytes width XHCI operational register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 4-bytes width operational register.
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@param Data The data to write.
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**/
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VOID
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XhcWriteOpReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Data
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)
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@@ -161,14 +161,14 @@ XhcWriteOpReg (
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/**
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Write the data to the 2-bytes width XHCI operational register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 2-bytes width operational register.
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@param Data The data to write.
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**/
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VOID
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XhcWriteOpReg16 (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT16 Data
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)
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@@ -194,14 +194,14 @@ XhcWriteOpReg16 (
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/**
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Write the data to the 8-bytes width XHCI operational register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 8-bytes width operational register.
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@param Data The data to write.
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**/
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VOID
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XhcWriteOpReg64 (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT64 Data
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)
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@@ -227,7 +227,7 @@ XhcWriteOpReg64 (
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/**
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Read XHCI door bell register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the door bell register.
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@return The register content read
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@@ -235,7 +235,7 @@ XhcWriteOpReg64 (
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**/
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UINT32
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XhcReadDoorBellReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset
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)
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{
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@@ -264,14 +264,14 @@ XhcReadDoorBellReg (
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/**
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Write the data to the XHCI door bell register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the door bell register.
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@param Data The data to write.
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**/
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VOID
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XhcWriteDoorBellReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Data
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)
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@@ -297,7 +297,7 @@ XhcWriteDoorBellReg (
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/**
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Read XHCI runtime register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the runtime register.
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@return The register content read
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@@ -305,7 +305,7 @@ XhcWriteDoorBellReg (
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**/
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UINT32
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XhcReadRuntimeReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset
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)
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{
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@@ -334,7 +334,7 @@ XhcReadRuntimeReg (
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/**
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Read 8-bytes width XHCI runtime register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 8-bytes width runtime register.
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@return The register content read
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@@ -342,7 +342,7 @@ XhcReadRuntimeReg (
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**/
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UINT64
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XhcReadRuntimeReg64 (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset
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)
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{
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@@ -371,14 +371,14 @@ XhcReadRuntimeReg64 (
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/**
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Write the data to the XHCI runtime register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the runtime register.
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@param Data The data to write.
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**/
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VOID
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XhcWriteRuntimeReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Data
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)
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@@ -404,14 +404,14 @@ XhcWriteRuntimeReg (
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/**
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Write the data to the 8-bytes width XHCI runtime register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the 8-bytes width runtime register.
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@param Data The data to write.
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**/
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VOID
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XhcWriteRuntimeReg64 (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT64 Data
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)
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@@ -437,7 +437,7 @@ XhcWriteRuntimeReg64 (
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/**
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Read XHCI extended capability register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the extended capability register.
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@return The register content read
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@@ -445,7 +445,7 @@ XhcWriteRuntimeReg64 (
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**/
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UINT32
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XhcReadExtCapReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset
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)
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{
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@@ -474,14 +474,14 @@ XhcReadExtCapReg (
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/**
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Write the data to the XHCI extended capability register.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the extended capability register.
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@param Data The data to write.
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**/
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VOID
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XhcWriteExtCapReg (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Data
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)
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@@ -508,14 +508,14 @@ XhcWriteExtCapReg (
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/**
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Set one bit of the runtime register while keeping other bits.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the runtime register.
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@param Bit The bit mask of the register to set.
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**/
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VOID
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XhcSetRuntimeRegBit (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Bit
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)
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@@ -530,14 +530,14 @@ XhcSetRuntimeRegBit (
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/**
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Clear one bit of the runtime register while keeping other bits.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the runtime register.
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@param Bit The bit mask of the register to set.
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**/
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VOID
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XhcClearRuntimeRegBit (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Bit
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)
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@@ -552,14 +552,14 @@ XhcClearRuntimeRegBit (
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/**
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Set one bit of the operational register while keeping other bits.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the operational register.
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@param Bit The bit mask of the register to set.
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**/
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VOID
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XhcSetOpRegBit (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Bit
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)
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@@ -575,14 +575,14 @@ XhcSetOpRegBit (
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/**
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Clear one bit of the operational register while keeping other bits.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the operational register.
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@param Bit The bit mask of the register to clear.
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**/
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VOID
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XhcClearOpRegBit (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Bit
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)
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@@ -598,7 +598,7 @@ XhcClearOpRegBit (
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Wait the operation register's bit as specified by Bit
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to become set (or clear).
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Offset The offset of the operation register.
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@param Bit The bit of the register to wait for.
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@param WaitToSet Wait the bit to set or clear.
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@@ -610,7 +610,7 @@ XhcClearOpRegBit (
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**/
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EFI_STATUS
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XhcWaitOpRegBit (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Offset,
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IN UINT32 Bit,
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IN BOOLEAN WaitToSet,
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@@ -618,13 +618,16 @@ XhcWaitOpRegBit (
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)
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{
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UINT32 Index;
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UINTN Loop;
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for (Index = 0; Index < Timeout / XHC_SYNC_POLL_INTERVAL + 1; Index++) {
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Loop = (Timeout * XHC_1_MILLISECOND / XHC_POLL_DELAY) + 1;
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for (Index = 0; Index < Loop; Index++) {
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if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
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return EFI_SUCCESS;
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}
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gBS->Stall (XHC_SYNC_POLL_INTERVAL);
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gBS->Stall (XHC_POLL_DELAY);
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}
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return EFI_TIMEOUT;
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@@ -633,12 +636,12 @@ XhcWaitOpRegBit (
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/**
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Set Bios Ownership
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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**/
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VOID
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XhcSetBiosOwnership (
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IN USB_XHCI_DEV *Xhc
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IN USB_XHCI_INSTANCE *Xhc
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)
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{
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UINT32 Buffer;
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@@ -653,12 +656,12 @@ XhcSetBiosOwnership (
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/**
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Clear Bios Ownership
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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**/
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VOID
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XhcClearBiosOwnership (
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IN USB_XHCI_DEV *Xhc
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IN USB_XHCI_INSTANCE *Xhc
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)
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{
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UINT32 Buffer;
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@@ -673,14 +676,14 @@ XhcClearBiosOwnership (
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/**
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Calculate the XHCI legacy support capability register offset.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@return The offset of XHCI legacy support capability register.
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**/
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UINT32
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XhcGetLegSupCapAddr (
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IN USB_XHCI_DEV *Xhc
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IN USB_XHCI_INSTANCE *Xhc
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)
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{
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UINT32 ExtCapOffset;
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@@ -710,7 +713,7 @@ XhcGetLegSupCapAddr (
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/**
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Whether the XHCI host controller is halted.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@retval TRUE The controller is halted.
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@retval FALSE It isn't halted.
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@@ -718,7 +721,7 @@ XhcGetLegSupCapAddr (
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**/
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BOOLEAN
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XhcIsHalt (
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IN USB_XHCI_DEV *Xhc
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IN USB_XHCI_INSTANCE *Xhc
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)
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{
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return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT);
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@@ -728,7 +731,7 @@ XhcIsHalt (
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/**
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Whether system error occurred.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@retval TRUE System error happened.
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@retval FALSE No system error.
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@@ -736,7 +739,7 @@ XhcIsHalt (
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**/
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BOOLEAN
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XhcIsSysError (
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IN USB_XHCI_DEV *Xhc
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IN USB_XHCI_INSTANCE *Xhc
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)
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{
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return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE);
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@@ -745,7 +748,7 @@ XhcIsSysError (
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/**
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Reset the XHCI host controller.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Timeout Time to wait before abort (in millisecond, ms).
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@retval EFI_SUCCESS The XHCI host controller is reset.
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@@ -754,7 +757,7 @@ XhcIsSysError (
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**/
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EFI_STATUS
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XhcResetHC (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Timeout
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)
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{
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@@ -781,7 +784,7 @@ XhcResetHC (
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/**
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Halt the XHCI host controller.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Timeout Time to wait before abort (in millisecond, ms).
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@return EFI_SUCCESS The XHCI host controller is halt.
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@@ -790,7 +793,7 @@ XhcResetHC (
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**/
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EFI_STATUS
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XhcHaltHC (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Timeout
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)
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{
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@@ -805,7 +808,7 @@ XhcHaltHC (
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/**
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Set the XHCI host controller to run.
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@param Xhc The XHCI device.
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@param Xhc The XHCI Instance.
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@param Timeout Time to wait before abort (in millisecond, ms).
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@return EFI_SUCCESS The XHCI host controller is running.
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@@ -814,7 +817,7 @@ XhcHaltHC (
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**/
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EFI_STATUS
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XhcRunHC (
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IN USB_XHCI_DEV *Xhc,
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT32 Timeout
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)
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{
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|
Reference in New Issue
Block a user