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1. Added comments to ASM files

Browse Source 
2. Fixed a bug in 64-bit AsmDisablePaging64(), which may cause a #GP exception.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2206 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
bxing
2007-01-10 06:57:04 +00:00
parent 741fb36417
commit a9a812a0ed
45 changed files with 184 additions and 77 deletions
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19
MdePkg/Library/BaseLib/X64/DisablePaging64.asm
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@@ -36,15 +36,14 @@
;------------------------------------------------------------------------------
InternalX86DisablePaging64 PROC
cli
shl rcx, 32
shl rcx, 32 ; rcx[32..47] <- Cs
lea eax, @F
mov ecx, eax
push rcx
mov ebx, edx
mov esi, r8d
or rcx, rax ; rcx[0..47] <- Cs:@F
mov edi, r9d
mov eax, [rsp + 28h]
retf
mov eax, [rsp + 28h] ; eax <- New Stack
push rcx
retf ; switch to compatibility mode
@@:
mov esp, eax ; set up new stack
mov rax, cr0
@@ -57,10 +56,10 @@ InternalX86DisablePaging64 PROC
mov rax, cr4
and al, NOT (1 SHL 5) ; clear PAE
mov cr4, rax
push rdi
push rsi
call rbx
jmp $
push rdi ; push Context2
push rsi ; push Context1
call rdx ; transfer control to EntryPoint
hlt ; no one should get here
InternalX86DisablePaging64 ENDP
END

4
MdePkg/Library/BaseLib/X64/EnablePaging64.asm
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@@ -36,7 +36,7 @@
;------------------------------------------------------------------------------
InternalX86EnablePaging64 PROC
cli
pop rax
pop rax ; skip the return address
call @Base
@Base:
add dword ptr [rsp], @F - @Base ; offset for far retf, seg is the 1st arg
@@ -58,7 +58,7 @@ InternalX86EnablePaging64 PROC
mov rsp, [esp + 18h]
add rsp, -20h
call rbx
jmp $ ; halt processor if EntryPoint() returned
hlt ; halt processor if EntryPoint() returned
InternalX86EnablePaging64 ENDP
END

2
MdePkg/Library/BaseLib/X64/LongJump.asm
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@@ -39,7 +39,7 @@ InternalLongJump PROC
mov r13, [rcx + 30h]
mov r14, [rcx + 38h]
mov r15, [rcx + 40h]
mov rax, rdx
mov rax, rdx ; set return value
jmp qword ptr [rcx + 48h]
InternalLongJump ENDP

2
MdePkg/Library/BaseLib/X64/Monitor.asm
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@@ -36,7 +36,7 @@ AsmMonitor PROC
mov eax, ecx
mov ecx, edx
mov edx, r8d
DB 0fh, 1, 0c8h
DB 0fh, 1, 0c8h ; monitor
ret
AsmMonitor ENDP

2
MdePkg/Library/BaseLib/X64/Mwait.asm
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@@ -34,7 +34,7 @@
AsmMwait PROC
mov eax, ecx
mov ecx, edx
DB 0fh, 1, 0c9h
DB 0fh, 1, 0c9h ; mwait
ret
AsmMwait ENDP

4
MdePkg/Library/BaseLib/X64/ReadDr4.asm
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@@ -31,6 +31,10 @@
; );
;------------------------------------------------------------------------------
AsmReadDr4 PROC
;
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0fh, 21h, 0e0h
ret
AsmReadDr4 ENDP

4
MdePkg/Library/BaseLib/X64/ReadDr5.asm
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@@ -31,6 +31,10 @@
; );
;------------------------------------------------------------------------------
AsmReadDr5 PROC
;
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0fh, 21h, 0e8h
ret
AsmReadDr5 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm0.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm0 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0c0h
ret
AsmReadMm0 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm1.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm1 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0c8h
ret
AsmReadMm1 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm2.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm2 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0d0h
ret
AsmReadMm2 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm3.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm3 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0d8h
ret
AsmReadMm3 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm4.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm4 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0e0h
ret
AsmReadMm4 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm5.asm
View File

@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm5 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0e8h
ret
AsmReadMm5 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm6.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm6 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0f0h
ret
AsmReadMm6 ENDP

3
MdePkg/Library/BaseLib/X64/ReadMm7.asm
View File

@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmReadMm7 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0f8h
ret
AsmReadMm7 ENDP

34
MdePkg/Library/BaseLib/X64/Thunk16.asm
View File

@@ -66,6 +66,14 @@ SavedGdt LABEL FWORD
; by user code. It will be shadowed to somewhere in memory below 1MB.
;------------------------------------------------------------------------------
_BackFromUserCode PROC
;
; The order of saved registers on the stack matches the order they appears
; in IA32_REGS structure. This facilitates wrapper function to extract them
; into that structure.
;
; Some instructions for manipulation of segment registers have to be written
; in opcode since 64-bit MASM prevents accesses to those registers.
;
DB 16h ; push ss
DB 0eh ; push cs
DB 66h
@@ -115,7 +123,7 @@ SavedCr4 DD ?
;
; rdi in the instruction below is indeed bx in 16-bit code
;
DB 66h, 2eh
DB 66h, 2eh ; 2eh is "cs:" segment override
lgdt fword ptr [rdi + (SavedGdt - @Base)]
DB 66h
mov ecx, 0c0000080h
@@ -129,9 +137,8 @@ SavedCr0 DD ?
@64Eip DD ?
SavedCs DW ?
@64BitCode:
DB 48h, 0b8h ; mov rax, imm64
SavedRip DQ ?
jmp rax ; return to caller
mov rsp, r8 ; restore stack
ret
_BackFromUserCode ENDP
_EntryPoint DD _ToUserCode - m16Start
@@ -160,14 +167,14 @@ _ToUserCode PROC
mov cr4, rbp
mov ss, esi ; set up 16-bit stack segment
mov sp, bx ; set up 16-bit stack pointer
DB 66h
DB 66h ; make the following call 32-bit
call @Base ; push eip
@Base:
pop bp ; ebp <- address of @Base
push [esp + sizeof (IA32_REGS) + 2]
lea eax, [rsi + (@RealMode - @Base)]
lea eax, [rsi + (@RealMode - @Base)] ; rsi is "bp" in 16-bit code
push rax
retf
retf ; execution begins at next instruction
@RealMode:
DB 66h, 2eh ; CS and operand size override
lidt fword ptr [rsi + (_16Idtr - @Base)]
@@ -178,7 +185,7 @@ _ToUserCode PROC
pop gs
popf ; popfd
lea sp, [esp + 4] ; skip high order 32 bits of EFlags
DB 66h
DB 66h ; make the following retf 32-bit
retf ; transfer control to user code
_ToUserCode ENDP
@@ -220,8 +227,8 @@ GDT_SIZE = $ - _NullSeg
; );
;------------------------------------------------------------------------------
InternalAsmThunk16 PROC USES rbp rbx rsi rdi
mov r10d, ds
mov r11d, es
mov r10d, ds ; r9 ~ r11 are not accessible in 16-bit
mov r11d, es ; so use them for saving seg registers
mov r9d, ss
push fs
push gs
@@ -238,8 +245,8 @@ InternalAsmThunk16 PROC USES rbp rbx rsi rdi
lea ecx, [rdx + (SavedCr4 - m16Start)]
mov eax, edx ; eax <- transition code address
and edx, 0fh
shl eax, 12
lea ax, [rdx + (_BackFromUserCode - m16Start)]
shl eax, 12 ; segment address in high order 16 bits
lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address
stosd ; [edi] <- return address of user code
sgdt fword ptr [rcx + (SavedGdt - SavedCr4)]
sidt fword ptr [rsp + 38h] ; save IDT stack in argument space
@@ -257,13 +264,12 @@ InternalAsmThunk16 PROC USES rbp rbx rsi rdi
pushfq
lea edx, [rdx + DATA16 - DATA32]
lea r8, @RetFromRealMode
mov [rcx + (SavedRip - SavedCr4)], r8
push r8
mov r8d, cs
mov [rcx + (SavedCs - SavedCr4)], r8w
mov r8, rsp
jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]
@RetFromRealMode:
mov rsp, r8
popfq
lidt fword ptr [rsp + 38h] ; restore protected mode IDTR
lea eax, [rbp - sizeof (IA32_REGS)]

4
MdePkg/Library/BaseLib/X64/WriteDr4.asm
View File

@@ -31,6 +31,10 @@
; );
;------------------------------------------------------------------------------
AsmWriteDr4 PROC
;
; There's no obvious reason to access this register, since it's aliased to
; DR6 when DE=0 or an exception generated when DE=1
;
DB 0fh, 23h, 0e1h
mov rax, rcx
ret

4
MdePkg/Library/BaseLib/X64/WriteDr5.asm
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@@ -31,6 +31,10 @@
; );
;------------------------------------------------------------------------------
AsmWriteDr5 PROC
;
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0fh, 23h, 0e9h
mov rax, rcx
ret

3
MdePkg/Library/BaseLib/X64/WriteMm0.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm0 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0c1h
ret
AsmWriteMm0 ENDP

3
MdePkg/Library/BaseLib/X64/WriteMm1.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm1 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0c9h
ret
AsmWriteMm1 ENDP

3
MdePkg/Library/BaseLib/X64/WriteMm2.asm
View File

@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm2 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0d1h
ret
AsmWriteMm2 ENDP

3
MdePkg/Library/BaseLib/X64/WriteMm3.asm
View File

@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm3 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0d9h
ret
AsmWriteMm3 ENDP

3
MdePkg/Library/BaseLib/X64/WriteMm4.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm4 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0e1h
ret
AsmWriteMm4 ENDP

3
MdePkg/Library/BaseLib/X64/WriteMm5.asm
View File

@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm5 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0e9h
ret
AsmWriteMm5 ENDP

3
MdePkg/Library/BaseLib/X64/WriteMm6.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm6 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0f1h
ret
AsmWriteMm6 ENDP

3
MdePkg/Library/BaseLib/X64/WriteMm7.asm
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@@ -31,6 +31,9 @@
; );
;------------------------------------------------------------------------------
AsmWriteMm7 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 6eh, 0f9h
ret
AsmWriteMm7 ENDP

4
MdePkg/Library/BaseLib/X64/WriteMsr64.asm
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@@ -32,8 +32,8 @@
; );
;------------------------------------------------------------------------------
AsmWriteMsr64 PROC
mov rax, rdx
shr rdx, 20h
mov rax, rdx ; meanwhile, rax <- return value
shr rdx, 20h ; edx:eax contains the value to write
wrmsr
ret
AsmWriteMsr64 ENDP