ArmPlatformPkg: Moved ARMv7 specific files to a 'Arm' subdirectory

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14182 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/PrePeiCore/Arm/ArchPrePeiCore.c

@@ -0,0 +1,62 @@
+/** @file
+*  Main file supporting the transition to PEI Core in Normal World for Versatile Express
+*
+*  Copyright (c) 2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/PrintLib.h>
+#include <Library/SerialPortLib.h>
+
+#include "PrePeiCore.h"
+
+VOID
+PeiCommonExceptionEntry (
+  IN UINT32 Entry,
+  IN UINTN LR
+  )
+{
+  CHAR8           Buffer[100];
+  UINTN           CharCount;
+
+  switch (Entry) {
+  case 0:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);
+    break;
+  case 1:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);
+    break;
+  case 2:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);
+    break;
+  case 3:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);
+    break;
+  case 4:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);
+    break;
+  case 5:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);
+    break;
+  case 6:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);
+    break;
+  case 7:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);
+    break;
+  default:
+    CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);
+    break;
+  }
+  SerialPortWrite ((UINT8 *) Buffer, CharCount);
+  while(1);
+}
+

ArmPlatformPkg/PrePeiCore/Arm/Exception.S

@@ -0,0 +1,102 @@
+//
+//  Copyright (c) 2011, ARM Limited. All rights reserved.
+//  
+# This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <AutoGen.h>
+
+#start of the code section
+.text
+.align 5
+
+# IMPORT
+GCC_ASM_IMPORT(PeiCommonExceptionEntry)
+
+# EXPORT
+GCC_ASM_EXPORT(PeiVectorTable)
+
+//============================================================
+//Default Exception Handlers
+//============================================================
+  
+  
+ASM_PFX(PeiVectorTable):
+  b _DefaultResetHandler
+  b _DefaultUndefined
+  b _DefaultSWI
+  b _DefaultPrefetchAbort
+  b _DefaultDataAbort
+  b _DefaultReserved
+  b _DefaultIrq
+  b _DefaultFiq
+
+//
+// Default Exception handlers: There is no plan to return from any of these exceptions.
+// No context saving at all.
+//
+_DefaultResetHandler:
+  mov  r1, lr
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #0
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+
+_DefaultUndefined:
+  sub  r1, LR, #4
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #1
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+
+_DefaultSWI:
+  sub  r1, LR, #4
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #2
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+
+_DefaultPrefetchAbort:
+  sub  r1, LR, #4
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #3
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+
+_DefaultDataAbort:
+  sub  r1, LR, #8
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #4
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+
+_DefaultReserved:
+  mov  r1, lr
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #5
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+
+_DefaultIrq:
+  sub  r1, LR, #4
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #6
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+
+_DefaultFiq:
+  sub  r1, LR, #4
+  # Switch to SVC for common stack
+  cps  #0x13
+  mov  r0, #7
+  blx  ASM_PFX(PeiCommonExceptionEntry)
+

ArmPlatformPkg/PrePeiCore/Arm/Exception.asm

@@ -0,0 +1,91 @@
+//
+//  Copyright (c) 2011, ARM Limited. All rights reserved.
+//  
+//  This program and the accompanying materials                          
+//  are licensed and made available under the terms and conditions of the BSD License         
+//  which accompanies this distribution.  The full text of the license may be found at        
+//  http://opensource.org/licenses/bsd-license.php                                            
+//
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <AutoGen.h>
+
+  IMPORT  PeiCommonExceptionEntry
+  EXPORT  PeiVectorTable
+  
+  PRESERVE8
+  AREA    PrePeiCoreException, CODE, READONLY, CODEALIGN, ALIGN=5
+
+//============================================================
+//Default Exception Handlers
+//============================================================
+  
+  
+PeiVectorTable
+  b _DefaultResetHandler
+  b _DefaultUndefined
+  b _DefaultSWI
+  b _DefaultPrefetchAbort
+  b _DefaultDataAbort
+  b _DefaultReserved
+  b _DefaultIrq
+  b _DefaultFiq
+
+//
+// Default Exception handlers: There is no plan to return from any of these exceptions.
+// No context saving at all.
+//
+_DefaultResetHandler
+   mov  r1, lr
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #0
+   blx   PeiCommonExceptionEntry
+
+_DefaultUndefined
+   sub  r1, LR, #4
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #1
+   blx   PeiCommonExceptionEntry
+
+_DefaultSWI
+   sub  r1, LR, #4
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #2
+   blx   PeiCommonExceptionEntry
+
+_DefaultPrefetchAbort
+   sub  r1, LR, #4
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #3
+   blx   PeiCommonExceptionEntry
+
+_DefaultDataAbort
+   sub  r1, LR, #8
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #4
+   blx   PeiCommonExceptionEntry
+
+_DefaultReserved
+   mov  r1, lr
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #5
+   blx   PeiCommonExceptionEntry
+   
+_DefaultIrq
+   sub  r1, LR, #4
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #6
+   blx   PeiCommonExceptionEntry
+
+_DefaultFiq
+   sub  r1, LR, #4
+   cps       #0x13                     ; Switch to SVC for common stack
+   mov  r0, #7
+   blx   PeiCommonExceptionEntry
+
+  END

ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S

@@ -0,0 +1,85 @@
+//
+//  Copyright (c) 2011, ARM Limited. All rights reserved.
+//  
+//  This program and the accompanying materials                          
+//  are licensed and made available under the terms and conditions of the BSD License         
+//  which accompanies this distribution.  The full text of the license may be found at        
+//  http://opensource.org/licenses/bsd-license.php                                            
+//
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <AutoGen.h>
+
+.text
+.align 3
+
+GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_IMPORT(ArmReadMpidr)
+GCC_ASM_EXPORT(_ModuleEntryPoint)
+
+StartupAddr: .word    CEntryPoint
+
+ASM_PFX(_ModuleEntryPoint):
+  // Identify CPU ID
+  bl    ASM_PFX(ArmReadMpidr)
+  // Get ID of this CPU in Multicore system
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
+  and   r5, r0, r1
+  
+  // Get the top of the primary stacks (and the base of the secondary stacks)
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
+  add   r1, r1, r2
+
+  // Is it the Primary Core ?
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
+  cmp   r5, r3
+  beq   _SetupPrimaryCoreStack
+
+_SetupSecondaryCoreStack:
+  // r1 contains the base of the secondary stacks
+
+  // Get the Core Position (ClusterId * 4) + CoreId
+  GetCorePositionFromMpId(r0, r5, r2)
+  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
+  add   r0, r0, #1
+
+  // StackOffset = CorePos * StackSize
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
+  mul   r0, r0, r2
+  // SP = StackBase + StackOffset
+  add   sp, r1, r0
+
+_PrepareArguments:
+  // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
+  LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
+  add   r2, r2, #4
+  ldr   r1, [r2]
+
+  // Move sec startup address into a data register
+  // Ensure we're jumping to FV version of the code (not boot remapped alias)
+  ldr   r3, StartupAddr
+  
+  // Jump to PrePeiCore C code
+  //    r0 = mp_id
+  //    r1 = pei_core_address
+  mov   r0, r5
+  blx   r3
+
+_SetupPrimaryCoreStack:
+  // r1 contains the top of the primary stack
+  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)
+
+  // The reserved space for global variable must be 8-bytes aligned for pushing
+  // 64-bit variable on the stack
+  SetPrimaryStack (r1, r2, r3)
+  b     _PrepareArguments
+
+_NeverReturn:
+  b _NeverReturn

ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm

@@ -0,0 +1,89 @@
+//
+//  Copyright (c) 2011, ARM Limited. All rights reserved.
+//  
+//  This program and the accompanying materials                          
+//  are licensed and made available under the terms and conditions of the BSD License         
+//  which accompanies this distribution.  The full text of the license may be found at        
+//  http://opensource.org/licenses/bsd-license.php                                            
+//
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <AutoGen.h>
+
+  INCLUDE AsmMacroIoLib.inc
+  
+  IMPORT  CEntryPoint
+  IMPORT  ArmReadMpidr
+  EXPORT  _ModuleEntryPoint
+  
+  PRESERVE8
+  AREA    PrePeiCoreEntryPoint, CODE, READONLY
+  
+StartupAddr        DCD      CEntryPoint
+
+_ModuleEntryPoint
+  // Identify CPU ID
+  bl    ArmReadMpidr
+  // Get ID of this CPU in Multicore system
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
+  and   r5, r0, r1
+  
+  // Get the top of the primary stacks (and the base of the secondary stacks)
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
+  add   r1, r1, r2
+
+  // Is it the Primary Core ?
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
+  cmp   r5, r3
+  beq   _SetupPrimaryCoreStack
+
+_SetupSecondaryCoreStack
+  // r1 contains the base of the secondary stacks
+
+  // Get the Core Position (ClusterId * 4) + CoreId
+  GetCorePositionFromMpId(r0, r5, r2)
+  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
+  add   r0, r0, #1
+
+  // StackOffset = CorePos * StackSize
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
+  mul   r0, r0, r2
+  // SP = StackBase + StackOffset
+  add   sp, r1, r0
+
+_PrepareArguments
+  // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
+  LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
+  add   r2, r2, #4
+  ldr   r1, [r2]
+
+  // Move sec startup address into a data register
+  // Ensure we're jumping to FV version of the code (not boot remapped alias)
+  ldr   r3, StartupAddr
+  
+  // Jump to PrePeiCore C code
+  //    r0 = mp_id
+  //    r1 = pei_core_address
+  mov   r0, r5
+  blx   r3
+
+_SetupPrimaryCoreStack
+  // r1 contains the top of the primary stack
+  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)
+
+  // The reserved space for global variable must be 8-bytes aligned for pushing
+  // 64-bit variable on the stack
+  SetPrimaryStack (r1, r2, r3)
+  b     _PrepareArguments
+
+_NeverReturn
+  b _NeverReturn
+
+  END

ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S

@@ -0,0 +1,43 @@
+#------------------------------------------------------------------------------ 
+#
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+  
+.text
+.align 3
+
+GCC_ASM_EXPORT(SecSwitchStack)
+
+
+  
+#/**
+#  This allows the caller to switch the stack and return
+#
+# @param      StackDelta     Signed amount by which to modify the stack pointer
+#
+# @return     Nothing. Goes to the Entry Point passing in the new parameters
+#
+#**/
+#VOID
+#EFIAPI
+#SecSwitchStack (
+#  VOID  *StackDelta
+#  )#
+#
+ASM_PFX(SecSwitchStack):   
+    mov   R1, R13
+    add   R1, R0, R1
+    mov   R13, R1
+    bx    LR
+    
+    
+    

ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.asm

@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------ 
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+  
+    EXPORT SecSwitchStack
+            
+    AREA   Switch_Stack, CODE, READONLY
+  
+;/**
+;  This allows the caller to switch the stack and return
+;
+; @param      StackDelta     Signed amount by which to modify the stack pointer
+;
+; @return     Nothing. Goes to the Entry Point passing in the new parameters
+;
+;**/
+;VOID
+;EFIAPI
+;SecSwitchStack (
+;  VOID  *StackDelta
+;  );
+;
+SecSwitchStack   
+    MOV   R1, SP
+    ADD   R1, R0, R1
+    MOV   SP, R1
+    BX    LR
+    END