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MdeModulePkg/AtaAtapiPassThru: Handle timeout 0 as indefinitely wait to strictly comply with UEFI spec

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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tian, Feng <feng.tian@intel.com>
Reviewed-by: Li, Elvin <elvin.li@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15534 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Tian, Feng
2014-05-15 07:09:14 +00:00
committed by erictian
parent 129ff94661
commit ab82122dfe
4 changed files with 151 additions and 68 deletions
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61
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
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@@ -156,9 +156,16 @@ AhciWaitMmioSet (
)
{
UINT32 Value;
UINT32 Delay;
UINT64 Delay;
BOOLEAN InfiniteWait;
Delay = (UINT32) (DivU64x32 (Timeout, 1000) + 1);
if (Timeout == 0) {
InfiniteWait = TRUE;
} else {
InfiniteWait = FALSE;
}
Delay = DivU64x32 (Timeout, 1000) + 1;
do {
//
@@ -177,7 +184,7 @@ AhciWaitMmioSet (
Delay--;
} while (Delay > 0);
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
}
@@ -204,9 +211,16 @@ AhciWaitMemSet (
)
{
UINT32 Value;
UINT32 Delay;
UINT64 Delay;
BOOLEAN InfiniteWait;
Delay = (UINT32) (DivU64x32 (Timeout, 1000) + 1);
if (Timeout == 0) {
InfiniteWait = TRUE;
} else {
InfiniteWait = FALSE;
}
Delay = DivU64x32 (Timeout, 1000) + 1;
do {
//
@@ -231,7 +245,7 @@ AhciWaitMemSet (
Delay--;
} while (Delay > 0);
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
}
@@ -242,7 +256,8 @@ AhciWaitMemSet (
@param[in] Address The memory address to test.
@param[in] MaskValue The mask value of memory.
@param[in] TestValue The test value of memory.
@param[in, out] RetryTimes The retry times value for waitting memory set. If 0, then just try once.
@param[in, out] Task Optional. Pointer to the ATA_NONBLOCK_TASK used by
non-blocking mode. If NULL, then just try once.
@retval EFI_NOTREADY The memory is not set.
@retval EFI_TIMEOUT The memory setting retry times out.
@@ -255,13 +270,13 @@ AhciCheckMemSet (
IN UINTN Address,
IN UINT32 MaskValue,
IN UINT32 TestValue,
IN OUT UINTN *RetryTimes OPTIONAL
IN OUT ATA_NONBLOCK_TASK *Task
)
{
UINT32 Value;
if (RetryTimes != NULL) {
(*RetryTimes)--;
if (Task != NULL) {
Task->RetryTimes--;
}
Value = *(volatile UINT32 *) Address;
@@ -271,7 +286,7 @@ AhciCheckMemSet (
return EFI_SUCCESS;
}
if ((RetryTimes != NULL) && (*RetryTimes == 0)) {
if ((Task != NULL) && !Task->InfiniteWait && (Task->RetryTimes == 0)) {
return EFI_TIMEOUT;
} else {
return EFI_NOT_READY;
@@ -683,11 +698,18 @@ AhciPioTransfer (
VOID *Map;
UINTN MapLength;
EFI_PCI_IO_PROTOCOL_OPERATION Flag;
UINT32 Delay;
UINT64 Delay;
EFI_AHCI_COMMAND_FIS CFis;
EFI_AHCI_COMMAND_LIST CmdList;
UINT32 PortTfd;
UINT32 PrdCount;
BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
} else {
InfiniteWait = FALSE;
}
if (Read) {
Flag = EfiPciIoOperationBusMasterWrite;
@@ -756,11 +778,11 @@ AhciPioTransfer (
// Wait device sends the PIO setup fis before data transfer
//
Status = EFI_TIMEOUT;
Delay = (UINT32) (DivU64x32 (Timeout, 1000) + 1);
Delay = DivU64x32 (Timeout, 1000) + 1;
do {
Offset = FisBaseAddr + EFI_AHCI_PIO_FIS_OFFSET;
Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_PIO_SETUP, 0);
Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_PIO_SETUP, NULL);
if (!EFI_ERROR (Status)) {
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
PortTfd = AhciReadReg (PciIo, (UINT32) Offset);
@@ -780,7 +802,7 @@ AhciPioTransfer (
}
Offset = FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET;
Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_REGISTER_D2H, 0);
Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, EFI_AHCI_FIS_REGISTER_D2H, NULL);
if (!EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
break;
@@ -792,7 +814,7 @@ AhciPioTransfer (
MicroSecondDelay(100);
Delay--;
} while (Delay > 0);
} while (InfiniteWait || (Delay > 0));
} else {
//
// Wait for D2H Fis is received
@@ -924,7 +946,6 @@ AhciDmaTransfer (
//
if (Task != NULL) {
Task->IsStart = TRUE;
Task->RetryTimes = (UINT32) (DivU64x32(Timeout, 1000) + 1);
}
if (Read) {
Flag = EfiPciIoOperationBusMasterWrite;
@@ -1000,7 +1021,7 @@ AhciDmaTransfer (
Offset,
EFI_AHCI_FIS_TYPE_MASK,
EFI_AHCI_FIS_REGISTER_D2H,
(UINTN *) (&Task->RetryTimes)
Task
);
} else {
Status = AhciWaitMemSet (
@@ -1402,14 +1423,14 @@ AhciReset (
IN UINT64 Timeout
)
{
UINT32 Delay;
UINT64 Delay;
UINT32 Value;
AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);
AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_RESET);
Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);
Delay = DivU64x32(Timeout, 1000) + 1;
do {
Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET);