Introduce PcdDxeIplSwitchToLongMode to DxeIplPeim and remove DxeIplX64Peim.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2018 6f19259b-4bc3-4df7-8a09-765794883524
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160
EdkModulePkg/Core/DxeIplPeim/Ia32/VirtualMemory.c
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160
EdkModulePkg/Core/DxeIplPeim/Ia32/VirtualMemory.c
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/*++
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Copyright (c) 2006, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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VirtualMemory.c
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Abstract:
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x64 Virtual Memory Management Services in the form of an IA-32 driver.
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Used to establish a 1:1 Virtual to Physical Mapping that is required to
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enter Long Mode (x64 64-bit mode).
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While we make a 1:1 mapping (identity mapping) for all physical pages
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we still need to use the MTRR's to ensure that the cachability attirbutes
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for all memory regions is correct.
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The basic idea is to use 2MB page table entries where ever possible. If
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more granularity of cachability is required then 4K page tables are used.
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References:
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1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel
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2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
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3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
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--*/
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#include "VirtualMemory.h"
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EFI_PHYSICAL_ADDRESS
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CreateIdentityMappingPageTables (
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VOID
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)
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/*++
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Routine Description:
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Allocates and fills in the Page Directory and Page Table Entries to
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establish a 1:1 Virtual to Physical mapping.
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Arguments:
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NumberOfProcessorPhysicalAddressBits - Number of processor address bits to use.
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Limits the number of page table entries
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to the physical address space.
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Returns:
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EFI_SUCCESS The 1:1 Virtual to Physical identity mapping was created
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--*/
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{
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UINT32 RegEax;
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UINT8 PhysicalAddressBits;
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EFI_PHYSICAL_ADDRESS PageAddress;
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UINTN IndexOfPml4Entries;
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UINTN IndexOfPdpEntries;
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UINTN IndexOfPageDirectoryEntries;
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UINTN NumberOfPml4EntriesNeeded;
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UINTN NumberOfPdpEntriesNeeded;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
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PAGE_TABLE_ENTRY *PageDirectoryEntry;
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//
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// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
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//
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PageMap = AllocatePages (1);
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ASSERT (PageMap != NULL);
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//
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// Get physical address bits supported.
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//
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax >= 0x80000008) {
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AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
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PhysicalAddressBits = (UINT8) RegEax;
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} else {
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PhysicalAddressBits = 36;
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}
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//
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// Calculate the table entries needed.
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//
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if (PhysicalAddressBits <= 39 ) {
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NumberOfPml4EntriesNeeded = 1;
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NumberOfPdpEntriesNeeded = 1 << (PhysicalAddressBits - 30);
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} else {
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NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
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NumberOfPdpEntriesNeeded = 512;
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}
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PageMapLevel4Entry = PageMap;
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PageAddress = 0;
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for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
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//
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// Each PML4 entry points to a page of Page Directory Pointer entires.
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// So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
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//
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PageDirectoryPointerEntry = AllocatePages (1);
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ASSERT (PageDirectoryPointerEntry != NULL);
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//
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// Make a PML4 Entry
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//
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PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
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PageMapLevel4Entry->Bits.ReadWrite = 1;
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PageMapLevel4Entry->Bits.Present = 1;
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for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
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//
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// Each Directory Pointer entries points to a page of Page Directory entires.
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// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
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//
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PageDirectoryEntry = AllocatePages (1);
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ASSERT (PageDirectoryEntry != NULL);
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//
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// Fill in a Page Directory Pointer Entries
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//
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PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
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PageDirectoryPointerEntry->Bits.ReadWrite = 1;
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PageDirectoryPointerEntry->Bits.Present = 1;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {
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//
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// Fill in the Page Directory entries
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//
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PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
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PageDirectoryEntry->Bits.ReadWrite = 1;
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PageDirectoryEntry->Bits.Present = 1;
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PageDirectoryEntry->Bits.MustBe1 = 1;
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}
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}
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}
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//
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// For the PML4 entries we are not using fill in a null entry.
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// For now we just copy the first entry.
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//
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for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
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CopyMem (
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PageMapLevel4Entry,
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PageMap,
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sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
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);
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}
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return (EFI_PHYSICAL_ADDRESS) (UINTN)PageMap; // FIXME
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}
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