OvmfPkg: Apply uncrustify changes

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the OvmfPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:09 -08:00
committed by mergify[bot]
parent d1050b9dff
commit ac0a286f4d
445 changed files with 30894 additions and 26369 deletions

File diff suppressed because it is too large Load Diff

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@@ -42,88 +42,88 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// position of RGB in the frame buffer is specified in the VBE Mode information
//
typedef struct {
UINT8 Position; // Position of the color
UINT8 Mask; // The number of bits expressed as a mask
UINT8 Position; // Position of the color
UINT8 Mask; // The number of bits expressed as a mask
} BIOS_VIDEO_COLOR_PLACEMENT;
//
// BIOS Graphics Output Graphical Mode Data
//
typedef struct {
UINT16 VbeModeNumber;
UINT16 BytesPerScanLine;
VOID *LinearFrameBuffer;
UINTN FrameBufferSize;
UINT32 HorizontalResolution;
UINT32 VerticalResolution;
UINT32 ColorDepth;
UINT32 RefreshRate;
UINT32 BitsPerPixel;
BIOS_VIDEO_COLOR_PLACEMENT Red;
BIOS_VIDEO_COLOR_PLACEMENT Green;
BIOS_VIDEO_COLOR_PLACEMENT Blue;
BIOS_VIDEO_COLOR_PLACEMENT Reserved;
EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
EFI_PIXEL_BITMASK PixelBitMask;
UINT16 VbeModeNumber;
UINT16 BytesPerScanLine;
VOID *LinearFrameBuffer;
UINTN FrameBufferSize;
UINT32 HorizontalResolution;
UINT32 VerticalResolution;
UINT32 ColorDepth;
UINT32 RefreshRate;
UINT32 BitsPerPixel;
BIOS_VIDEO_COLOR_PLACEMENT Red;
BIOS_VIDEO_COLOR_PLACEMENT Green;
BIOS_VIDEO_COLOR_PLACEMENT Blue;
BIOS_VIDEO_COLOR_PLACEMENT Reserved;
EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
EFI_PIXEL_BITMASK PixelBitMask;
} BIOS_VIDEO_MODE_DATA;
//
// BIOS video child handle private data Structure
//
#define BIOS_VIDEO_DEV_SIGNATURE SIGNATURE_32 ('B', 'V', 'M', 'p')
#define BIOS_VIDEO_DEV_SIGNATURE SIGNATURE_32 ('B', 'V', 'M', 'p')
typedef struct {
UINTN Signature;
EFI_HANDLE Handle;
UINTN Signature;
EFI_HANDLE Handle;
//
// Consumed Protocols
//
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
//
// Produced Protocols
//
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_EDID_DISCOVERED_PROTOCOL EdidDiscovered;
EFI_EDID_ACTIVE_PROTOCOL EdidActive;
EFI_VGA_MINI_PORT_PROTOCOL VgaMiniPort;
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_EDID_DISCOVERED_PROTOCOL EdidDiscovered;
EFI_EDID_ACTIVE_PROTOCOL EdidActive;
EFI_VGA_MINI_PORT_PROTOCOL VgaMiniPort;
//
// General fields
//
BOOLEAN VgaCompatible;
BOOLEAN ProduceGraphicsOutput;
BOOLEAN VgaCompatible;
BOOLEAN ProduceGraphicsOutput;
//
// Graphics Output Protocol related fields
//
BOOLEAN HardwareNeedsStarting;
UINTN CurrentMode;
UINTN MaxMode;
BIOS_VIDEO_MODE_DATA *ModeData;
UINT8 *LineBuffer;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL *VbeFrameBuffer;
UINT8 *VgaFrameBuffer;
BOOLEAN HardwareNeedsStarting;
UINTN CurrentMode;
UINTN MaxMode;
BIOS_VIDEO_MODE_DATA *ModeData;
UINT8 *LineBuffer;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL *VbeFrameBuffer;
UINT8 *VgaFrameBuffer;
//
// VESA Bios Extensions related fields
//
UINTN NumberOfPagesBelow1MB; // Number of 4KB pages in PagesBelow1MB
EFI_PHYSICAL_ADDRESS PagesBelow1MB; // Buffer for all VBE Information Blocks
VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK *VbeInformationBlock; // 0x200 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK *VbeModeInformationBlock; // 0x100 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_EDID_DATA_BLOCK *VbeEdidDataBlock; // 0x80 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK *VbeCrtcInformationBlock; // 59 bytes. Must be allocated below 1MB
UINTN VbeSaveRestorePages; // Number of 4KB pages in VbeSaveRestoreBuffer
EFI_PHYSICAL_ADDRESS VbeSaveRestoreBuffer; // Must be allocated below 1MB
UINTN NumberOfPagesBelow1MB; // Number of 4KB pages in PagesBelow1MB
EFI_PHYSICAL_ADDRESS PagesBelow1MB; // Buffer for all VBE Information Blocks
VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK *VbeInformationBlock; // 0x200 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK *VbeModeInformationBlock; // 0x100 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_EDID_DATA_BLOCK *VbeEdidDataBlock; // 0x80 bytes. Must be allocated below 1MB
VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK *VbeCrtcInformationBlock; // 59 bytes. Must be allocated below 1MB
UINTN VbeSaveRestorePages; // Number of 4KB pages in VbeSaveRestoreBuffer
EFI_PHYSICAL_ADDRESS VbeSaveRestoreBuffer; // Must be allocated below 1MB
//
// Status code
//
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;
EFI_EVENT ExitBootServicesEvent;
EFI_EVENT ExitBootServicesEvent;
} BIOS_VIDEO_DEV;
#define BIOS_VIDEO_DEV_FROM_PCI_IO_THIS(a) CR (a, BIOS_VIDEO_DEV, PciIo, BIOS_VIDEO_DEV_SIGNATURE)
@@ -164,7 +164,6 @@ BiosVideoDriverBindingSupported (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
Install Graphics Output Protocol onto VGA device handles.
@@ -184,7 +183,6 @@ BiosVideoDriverBindingStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
Stop.
@@ -223,7 +221,6 @@ BiosVideoCheckForVbe (
IN OUT BIOS_VIDEO_DEV *BiosVideoPrivate
);
/**
Check for VGA device.
@@ -237,9 +234,6 @@ BiosVideoCheckForVga (
IN OUT BIOS_VIDEO_DEV *BiosVideoPrivate
);
/**
Release resource for BIOS video instance.
@@ -282,7 +276,6 @@ BiosVideoGraphicsOutputQueryMode (
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info
);
/**
Graphics Output protocol interface to set video mode.
@@ -298,11 +291,10 @@ BiosVideoGraphicsOutputQueryMode (
EFI_STATUS
EFIAPI
BiosVideoGraphicsOutputSetMode (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL * This,
IN UINT32 ModeNumber
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN UINT32 ModeNumber
);
/**
Graphics Output protocol instance to block transfer for VBE device.
@@ -345,7 +337,6 @@ BiosVideoGraphicsOutputVbeBlt (
IN UINTN Delta
);
/**
Graphics Output protocol instance to block transfer for VGA device.
@@ -419,50 +410,50 @@ BiosVideoVgaMiniPortSetMode (
VOID
EFIAPI
BiosVideoNotifyExitBootServices (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
);
//
// Standard VGA Definitions
//
#define VGA_HORIZONTAL_RESOLUTION 640
#define VGA_VERTICAL_RESOLUTION 480
#define VGA_NUMBER_OF_BIT_PLANES 4
#define VGA_PIXELS_PER_BYTE 8
#define VGA_BYTES_PER_SCAN_LINE (VGA_HORIZONTAL_RESOLUTION / VGA_PIXELS_PER_BYTE)
#define VGA_BYTES_PER_BIT_PLANE (VGA_VERTICAL_RESOLUTION * VGA_BYTES_PER_SCAN_LINE)
#define VGA_HORIZONTAL_RESOLUTION 640
#define VGA_VERTICAL_RESOLUTION 480
#define VGA_NUMBER_OF_BIT_PLANES 4
#define VGA_PIXELS_PER_BYTE 8
#define VGA_BYTES_PER_SCAN_LINE (VGA_HORIZONTAL_RESOLUTION / VGA_PIXELS_PER_BYTE)
#define VGA_BYTES_PER_BIT_PLANE (VGA_VERTICAL_RESOLUTION * VGA_BYTES_PER_SCAN_LINE)
#define VGA_GRAPHICS_CONTROLLER_ADDRESS_REGISTER 0x3ce
#define VGA_GRAPHICS_CONTROLLER_DATA_REGISTER 0x3cf
#define VGA_GRAPHICS_CONTROLLER_ADDRESS_REGISTER 0x3ce
#define VGA_GRAPHICS_CONTROLLER_DATA_REGISTER 0x3cf
#define VGA_GRAPHICS_CONTROLLER_SET_RESET_REGISTER 0x00
#define VGA_GRAPHICS_CONTROLLER_SET_RESET_REGISTER 0x00
#define VGA_GRAPHICS_CONTROLLER_ENABLE_SET_RESET_REGISTER 0x01
#define VGA_GRAPHICS_CONTROLLER_ENABLE_SET_RESET_REGISTER 0x01
#define VGA_GRAPHICS_CONTROLLER_COLOR_COMPARE_REGISTER 0x02
#define VGA_GRAPHICS_CONTROLLER_COLOR_COMPARE_REGISTER 0x02
#define VGA_GRAPHICS_CONTROLLER_DATA_ROTATE_REGISTER 0x03
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_REPLACE 0x00
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_AND 0x08
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_OR 0x10
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_XOR 0x18
#define VGA_GRAPHICS_CONTROLLER_DATA_ROTATE_REGISTER 0x03
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_REPLACE 0x00
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_AND 0x08
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_OR 0x10
#define VGA_GRAPHICS_CONTROLLER_FUNCTION_XOR 0x18
#define VGA_GRAPHICS_CONTROLLER_READ_MAP_SELECT_REGISTER 0x04
#define VGA_GRAPHICS_CONTROLLER_MODE_REGISTER 0x05
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_1 0x08
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_1 0x01
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_2 0x02
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_3 0x03
#define VGA_GRAPHICS_CONTROLLER_MODE_REGISTER 0x05
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_READ_MODE_1 0x08
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_0 0x00
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_1 0x01
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_2 0x02
#define VGA_GRAPHICS_CONTROLLER_WRITE_MODE_3 0x03
#define VGA_GRAPHICS_CONTROLLER_MISCELLANEOUS_REGISTER 0x06
#define VGA_GRAPHICS_CONTROLLER_MISCELLANEOUS_REGISTER 0x06
#define VGA_GRAPHICS_CONTROLLER_COLOR_DONT_CARE_REGISTER 0x07
#define VGA_GRAPHICS_CONTROLLER_BIT_MASK_REGISTER 0x08
#define VGA_GRAPHICS_CONTROLLER_BIT_MASK_REGISTER 0x08
/**
Install child handles if the Handle supports MBR format.
@@ -500,9 +491,9 @@ BiosVideoChildHandleInstall (
**/
EFI_STATUS
BiosVideoChildHandleUninstall (
EFI_DRIVER_BINDING_PROTOCOL *This,
EFI_HANDLE Controller,
EFI_HANDLE Handle
EFI_DRIVER_BINDING_PROTOCOL *This,
EFI_HANDLE Controller,
EFI_HANDLE Handle
);
/**
@@ -529,4 +520,5 @@ BOOLEAN
HasChildHandle (
IN EFI_HANDLE Controller
);
#endif

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@@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// EFI Component Name Functions
//
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -58,7 +59,6 @@ BiosVideoComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -130,14 +130,13 @@ BiosVideoComponentNameGetDriverName (
EFI_STATUS
EFIAPI
BiosVideoComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
);
//
// EFI Component Name Protocol
//
@@ -150,14 +149,13 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gBiosVideoComponentNa
//
// EFI Component Name 2 Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gBiosVideoComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME) BiosVideoComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) BiosVideoComponentNameGetControllerName,
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gBiosVideoComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME)BiosVideoComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)BiosVideoComponentNameGetControllerName,
"en"
};
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mBiosVideoDriverNameTable[] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mBiosVideoDriverNameTable[] = {
{
"eng;en",
L"BIOS[INT10] Video Driver"
@@ -295,11 +293,11 @@ BiosVideoComponentNameGetDriverName (
EFI_STATUS
EFIAPI
BiosVideoComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;

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@@ -16,7 +16,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// VESA BIOS Extensions status codes
//
#define VESA_BIOS_EXTENSIONS_STATUS_SUCCESS 0x004f
#define VESA_BIOS_EXTENSIONS_STATUS_SUCCESS 0x004f
//
// VESA BIOS Extensions Services
@@ -52,7 +52,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
AX = Return Status
--*/
#define VESA_BIOS_EXTENSIONS_SET_MODE 0x4f02
#define VESA_BIOS_EXTENSIONS_SET_MODE 0x4f02
/*++
@@ -97,7 +97,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
= 1 - Memory not cleared at last mode set
--*/
#define VESA_BIOS_EXTENSIONS_SAVE_RESTORE_STATE 0x4f04
#define VESA_BIOS_EXTENSIONS_SAVE_RESTORE_STATE 0x4f04
/*++
@@ -158,89 +158,89 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Timing data from EDID data block
//
#define VESA_BIOS_EXTENSIONS_EDID_BLOCK_SIZE 128
#define VESA_BIOS_EXTENSIONS_EDID_ESTABLISHED_TIMING_MAX_NUMBER 17
#define VESA_BIOS_EXTENSIONS_EDID_BLOCK_SIZE 128
#define VESA_BIOS_EXTENSIONS_EDID_ESTABLISHED_TIMING_MAX_NUMBER 17
//
// Established Timings: 24 possible resolutions
// Standard Timings: 8 possible resolutions
// Detailed Timings: 4 possible resolutions
//
#define VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER 36
#define VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER 36
//
// Timing data size for Established Timings, Standard Timings and Detailed Timings
//
#define VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE 3
#define VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE 16
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_EACH_DESCRIPTOR_SIZE 18
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE 72
#define VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE 3
#define VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE 16
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_EACH_DESCRIPTOR_SIZE 18
#define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE 72
typedef struct {
UINT16 HorizontalResolution;
UINT16 VerticalResolution;
UINT16 RefreshRate;
UINT16 HorizontalResolution;
UINT16 VerticalResolution;
UINT16 RefreshRate;
} VESA_BIOS_EXTENSIONS_EDID_TIMING;
typedef struct {
UINT32 ValidNumber;
UINT32 Key[VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER];
UINT32 ValidNumber;
UINT32 Key[VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER];
} VESA_BIOS_EXTENSIONS_VALID_EDID_TIMING;
typedef struct {
UINT8 Header[8]; //EDID header "00 FF FF FF FF FF FF 00"
UINT16 ManufactureName; //EISA 3-character ID
UINT16 ProductCode; //Vendor assigned code
UINT32 SerialNumber; //32-bit serial number
UINT8 WeekOfManufacture; //Week number
UINT8 YearOfManufacture; //Year
UINT8 EdidVersion; //EDID Structure Version
UINT8 EdidRevision; //EDID Structure Revision
UINT8 VideoInputDefinition;
UINT8 MaxHorizontalImageSize; //cm
UINT8 MaxVerticalImageSize; //cm
UINT8 DisplayTransferCharacteristic;
UINT8 FeatureSupport;
UINT8 RedGreenLowBits; //Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1Gy0
UINT8 BlueWhiteLowBits; //Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
UINT8 RedX; //Red-x Bits 9 - 2
UINT8 RedY; //Red-y Bits 9 - 2
UINT8 GreenX; //Green-x Bits 9 - 2
UINT8 GreenY; //Green-y Bits 9 - 2
UINT8 BlueX; //Blue-x Bits 9 - 2
UINT8 BlueY; //Blue-y Bits 9 - 2
UINT8 WhiteX; //White-x Bits 9 - 2
UINT8 WhiteY; //White-x Bits 9 - 2
UINT8 EstablishedTimings[VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE];
UINT8 StandardTimingIdentification[VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE];
UINT8 DetailedTimingDescriptions[VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE];
UINT8 ExtensionFlag; //Number of (optional) 128-byte EDID extension blocks to follow
UINT8 Checksum;
UINT8 Header[8]; // EDID header "00 FF FF FF FF FF FF 00"
UINT16 ManufactureName; // EISA 3-character ID
UINT16 ProductCode; // Vendor assigned code
UINT32 SerialNumber; // 32-bit serial number
UINT8 WeekOfManufacture; // Week number
UINT8 YearOfManufacture; // Year
UINT8 EdidVersion; // EDID Structure Version
UINT8 EdidRevision; // EDID Structure Revision
UINT8 VideoInputDefinition;
UINT8 MaxHorizontalImageSize; // cm
UINT8 MaxVerticalImageSize; // cm
UINT8 DisplayTransferCharacteristic;
UINT8 FeatureSupport;
UINT8 RedGreenLowBits; // Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1Gy0
UINT8 BlueWhiteLowBits; // Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
UINT8 RedX; // Red-x Bits 9 - 2
UINT8 RedY; // Red-y Bits 9 - 2
UINT8 GreenX; // Green-x Bits 9 - 2
UINT8 GreenY; // Green-y Bits 9 - 2
UINT8 BlueX; // Blue-x Bits 9 - 2
UINT8 BlueY; // Blue-y Bits 9 - 2
UINT8 WhiteX; // White-x Bits 9 - 2
UINT8 WhiteY; // White-x Bits 9 - 2
UINT8 EstablishedTimings[VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE];
UINT8 StandardTimingIdentification[VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE];
UINT8 DetailedTimingDescriptions[VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE];
UINT8 ExtensionFlag; // Number of (optional) 128-byte EDID extension blocks to follow
UINT8 Checksum;
} VESA_BIOS_EXTENSIONS_EDID_DATA_BLOCK;
//
// Super VGA Information Block
//
typedef struct {
UINT32 VESASignature; // 'VESA' 4 byte signature
UINT16 VESAVersion; // VBE version number
UINT32 OEMStringPtr; // Pointer to OEM string
UINT32 Capabilities; // Capabilities of video card
UINT32 VideoModePtr; // Pointer to an array of 16-bit supported modes values terminated by 0xFFFF
UINT16 TotalMemory; // Number of 64kb memory blocks
UINT16 OemSoftwareRev; // VBE implementation Software revision
UINT32 OemVendorNamePtr; // VbeFarPtr to Vendor Name String
UINT32 OemProductNamePtr; // VbeFarPtr to Product Name String
UINT32 OemProductRevPtr; // VbeFarPtr to Product Revision String
UINT8 Reserved[222]; // Reserved for VBE implementation scratch area
UINT8 OemData[256]; // Data area for OEM strings. Pad to 512 byte block size
UINT32 VESASignature; // 'VESA' 4 byte signature
UINT16 VESAVersion; // VBE version number
UINT32 OEMStringPtr; // Pointer to OEM string
UINT32 Capabilities; // Capabilities of video card
UINT32 VideoModePtr; // Pointer to an array of 16-bit supported modes values terminated by 0xFFFF
UINT16 TotalMemory; // Number of 64kb memory blocks
UINT16 OemSoftwareRev; // VBE implementation Software revision
UINT32 OemVendorNamePtr; // VbeFarPtr to Vendor Name String
UINT32 OemProductNamePtr; // VbeFarPtr to Product Name String
UINT32 OemProductRevPtr; // VbeFarPtr to Product Revision String
UINT8 Reserved[222]; // Reserved for VBE implementation scratch area
UINT8 OemData[256]; // Data area for OEM strings. Pad to 512 byte block size
} VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK;
//
// Super VGA Information Block VESASignature values
//
#define VESA_BIOS_EXTENSIONS_VESA_SIGNATURE SIGNATURE_32 ('V', 'E', 'S', 'A')
#define VESA_BIOS_EXTENSIONS_VBE2_SIGNATURE SIGNATURE_32 ('V', 'B', 'E', '2')
#define VESA_BIOS_EXTENSIONS_VESA_SIGNATURE SIGNATURE_32 ('V', 'E', 'S', 'A')
#define VESA_BIOS_EXTENSIONS_VBE2_SIGNATURE SIGNATURE_32 ('V', 'B', 'E', '2')
//
// Super VGA Information Block VESAVersion values
@@ -252,13 +252,13 @@ typedef struct {
//
// Super VGA Information Block Capabilities field bit definitions
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_8_BIT_DAC 0x01 // 0: DAC width is fixed at 6 bits/color
#define VESA_BIOS_EXTENSIONS_CAPABILITY_8_BIT_DAC 0x01 // 0: DAC width is fixed at 6 bits/color
// 1: DAC width switchable to 8 bits/color
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_VGA 0x02 // 0: Controller is VGA compatible
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_VGA 0x02 // 0: Controller is VGA compatible
// 1: Controller is not VGA compatible
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_NORMAL_RAMDAC 0x04 // 0: Normal RAMDAC operation
#define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_NORMAL_RAMDAC 0x04 // 0: Normal RAMDAC operation
// 1: Use blank bit in function 9 to program RAMDAC
//
#define VESA_BIOS_EXTENSIONS_CAPABILITY_STEREOSCOPIC 0x08 // 0: No hardware stereoscopic signal support
@@ -269,10 +269,10 @@ typedef struct {
//
// Super VGA mode number bite field definitions
//
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_VESA 0x0100 // 0: Not a VESA defined VBE mode
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_VESA 0x0100 // 0: Not a VESA defined VBE mode
// 1: A VESA defined VBE mode
//
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_REFRESH_CONTROL_USER 0x0800 // 0: Use current BIOS default referesh rate
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_REFRESH_CONTROL_USER 0x0800 // 0: Use current BIOS default referesh rate
// 1: Use the user specified CRTC values for refresh rate
//
#define VESA_BIOS_EXTENSIONS_MODE_NUMBER_LINEAR_FRAME_BUFFER 0x4000 // 0: Use a banked/windowed frame buffer
@@ -283,7 +283,7 @@ typedef struct {
//
// Super VGA Information Block mode list terminator value
//
#define VESA_BIOS_EXTENSIONS_END_OF_MODE_LIST 0xffff
#define VESA_BIOS_EXTENSIONS_END_OF_MODE_LIST 0xffff
//
// Window Function
@@ -301,60 +301,60 @@ typedef struct {
//
// Manadory fields for all VESA Bios Extensions revisions
//
UINT16 ModeAttributes; // Mode attributes
UINT8 WinAAttributes; // Window A attributes
UINT8 WinBAttributes; // Window B attributes
UINT16 WinGranularity; // Window granularity in k
UINT16 WinSize; // Window size in k
UINT16 WinASegment; // Window A segment
UINT16 WinBSegment; // Window B segment
UINT32 WindowFunction; // Pointer to window function
UINT16 BytesPerScanLine; // Bytes per scanline
UINT16 ModeAttributes; // Mode attributes
UINT8 WinAAttributes; // Window A attributes
UINT8 WinBAttributes; // Window B attributes
UINT16 WinGranularity; // Window granularity in k
UINT16 WinSize; // Window size in k
UINT16 WinASegment; // Window A segment
UINT16 WinBSegment; // Window B segment
UINT32 WindowFunction; // Pointer to window function
UINT16 BytesPerScanLine; // Bytes per scanline
//
// Manadory fields for VESA Bios Extensions 1.2 and above
//
UINT16 XResolution; // Horizontal resolution
UINT16 YResolution; // Vertical resolution
UINT8 XCharSize; // Character cell width
UINT8 YCharSize; // Character cell height
UINT8 NumberOfPlanes; // Number of memory planes
UINT8 BitsPerPixel; // Bits per pixel
UINT8 NumberOfBanks; // Number of CGA style banks
UINT8 MemoryModel; // Memory model type
UINT8 BankSize; // Size of CGA style banks
UINT8 NumberOfImagePages; // Number of images pages
UINT8 Reserved1; // Reserved
UINT8 RedMaskSize; // Size of direct color red mask
UINT8 RedFieldPosition; // Bit posn of lsb of red mask
UINT8 GreenMaskSize; // Size of direct color green mask
UINT8 GreenFieldPosition; // Bit posn of lsb of green mask
UINT8 BlueMaskSize; // Size of direct color blue mask
UINT8 BlueFieldPosition; // Bit posn of lsb of blue mask
UINT8 RsvdMaskSize; // Size of direct color res mask
UINT8 RsvdFieldPosition; // Bit posn of lsb of res mask
UINT8 DirectColorModeInfo; // Direct color mode attributes
UINT16 XResolution; // Horizontal resolution
UINT16 YResolution; // Vertical resolution
UINT8 XCharSize; // Character cell width
UINT8 YCharSize; // Character cell height
UINT8 NumberOfPlanes; // Number of memory planes
UINT8 BitsPerPixel; // Bits per pixel
UINT8 NumberOfBanks; // Number of CGA style banks
UINT8 MemoryModel; // Memory model type
UINT8 BankSize; // Size of CGA style banks
UINT8 NumberOfImagePages; // Number of images pages
UINT8 Reserved1; // Reserved
UINT8 RedMaskSize; // Size of direct color red mask
UINT8 RedFieldPosition; // Bit posn of lsb of red mask
UINT8 GreenMaskSize; // Size of direct color green mask
UINT8 GreenFieldPosition; // Bit posn of lsb of green mask
UINT8 BlueMaskSize; // Size of direct color blue mask
UINT8 BlueFieldPosition; // Bit posn of lsb of blue mask
UINT8 RsvdMaskSize; // Size of direct color res mask
UINT8 RsvdFieldPosition; // Bit posn of lsb of res mask
UINT8 DirectColorModeInfo; // Direct color mode attributes
//
// Manadory fields for VESA Bios Extensions 2.0 and above
//
UINT32 PhysBasePtr; // Physical Address for flat memory frame buffer
UINT32 Reserved2; // Reserved
UINT16 Reserved3; // Reserved
UINT32 PhysBasePtr; // Physical Address for flat memory frame buffer
UINT32 Reserved2; // Reserved
UINT16 Reserved3; // Reserved
//
// Manadory fields for VESA Bios Extensions 3.0 and above
//
UINT16 LinBytesPerScanLine; // Bytes/scan line for linear modes
UINT8 BnkNumberOfImagePages; // Number of images for banked modes
UINT8 LinNumberOfImagePages; // Number of images for linear modes
UINT8 LinRedMaskSize; // Size of direct color red mask (linear mode)
UINT8 LinRedFieldPosition; // Bit posiiton of lsb of red mask (linear modes)
UINT8 LinGreenMaskSize; // Size of direct color green mask (linear mode)
UINT8 LinGreenFieldPosition; // Bit posiiton of lsb of green mask (linear modes)
UINT8 LinBlueMaskSize; // Size of direct color blue mask (linear mode)
UINT8 LinBlueFieldPosition; // Bit posiiton of lsb of blue mask (linear modes)
UINT8 LinRsvdMaskSize; // Size of direct color reserved mask (linear mode)
UINT8 LinRsvdFieldPosition; // Bit posiiton of lsb of reserved mask (linear modes)
UINT32 MaxPixelClock; // Maximum pixel clock (in Hz) for graphics mode
UINT8 Pad[190]; // Pad to 256 byte block size
UINT16 LinBytesPerScanLine; // Bytes/scan line for linear modes
UINT8 BnkNumberOfImagePages; // Number of images for banked modes
UINT8 LinNumberOfImagePages; // Number of images for linear modes
UINT8 LinRedMaskSize; // Size of direct color red mask (linear mode)
UINT8 LinRedFieldPosition; // Bit posiiton of lsb of red mask (linear modes)
UINT8 LinGreenMaskSize; // Size of direct color green mask (linear mode)
UINT8 LinGreenFieldPosition; // Bit posiiton of lsb of green mask (linear modes)
UINT8 LinBlueMaskSize; // Size of direct color blue mask (linear mode)
UINT8 LinBlueFieldPosition; // Bit posiiton of lsb of blue mask (linear modes)
UINT8 LinRsvdMaskSize; // Size of direct color reserved mask (linear mode)
UINT8 LinRsvdFieldPosition; // Bit posiiton of lsb of reserved mask (linear modes)
UINT32 MaxPixelClock; // Maximum pixel clock (in Hz) for graphics mode
UINT8 Pad[190]; // Pad to 256 byte block size
} VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK;
//
@@ -363,31 +363,31 @@ typedef struct {
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_HARDWARE 0x0001 // 0: Mode not supported in handware
// 1: Mode supported in handware
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_TTY 0x0004 // 0: TTY Output functions not supported by BIOS
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_TTY 0x0004 // 0: TTY Output functions not supported by BIOS
// 1: TTY Output functions supported by BIOS
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_COLOR 0x0008 // 0: Monochrome mode
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_COLOR 0x0008 // 0: Monochrome mode
// 1: Color mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_GRAPHICS 0x0010 // 0: Text mode
// 1: Graphics mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_VGA 0x0020 // 0: VGA compatible mode
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_VGA 0x0020 // 0: VGA compatible mode
// 1: Not a VGA compatible mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_WINDOWED 0x0040 // 0: VGA compatible windowed memory mode
// 1: Not a VGA compatible windowed memory mode
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER 0x0080 // 0: No linear fram buffer mode available
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER 0x0080 // 0: No linear fram buffer mode available
// 1: Linear frame buffer mode available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_DOUBLE_SCAN 0x0100 // 0: No double scan mode available
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_DOUBLE_SCAN 0x0100 // 0: No double scan mode available
// 1: Double scan mode available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_INTERLACED 0x0200 // 0: No interlaced mode is available
// 1: Interlaced mode is available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NO_TRIPPLE_BUFFER 0x0400 // 0: No hardware triple buffer mode support available
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NO_TRIPPLE_BUFFER 0x0400 // 0: No hardware triple buffer mode support available
// 1: Hardware triple buffer mode support available
//
#define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_STEREOSCOPIC 0x0800 // 0: No hardware steroscopic display support
@@ -398,7 +398,7 @@ typedef struct {
//
// Super VGA Mode Information Block WinAAttribite/WinBAttributes field bit definitions
//
#define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_RELOCATABLE 0x01 // 0: Single non-relocatable window only
#define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_RELOCATABLE 0x01 // 0: Single non-relocatable window only
// 1: Relocatable window(s) are supported
//
#define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_READABLE 0x02 // 0: Window is not readable
@@ -418,38 +418,38 @@ typedef struct {
// Super VGA Memory Models
//
typedef enum {
MemPL = 3, // Planar memory model
MemPK = 4, // Packed pixel memory model
MemRGB= 6, // Direct color RGB memory model
MemYUV= 7 // Direct color YUV memory model
MemPL = 3, // Planar memory model
MemPK = 4, // Packed pixel memory model
MemRGB = 6, // Direct color RGB memory model
MemYUV = 7 // Direct color YUV memory model
} VESA_BIOS_EXTENSIONS_MEMORY_MODELS;
//
// Super VGA CRTC Information Block
//
typedef struct {
UINT16 HorizontalTotal; // Horizontal total in pixels
UINT16 HorizontalSyncStart; // Horizontal sync start in pixels
UINT16 HorizontalSyncEnd; // Horizontal sync end in pixels
UINT16 VericalTotal; // Vertical total in pixels
UINT16 VericalSyncStart; // Vertical sync start in pixels
UINT16 VericalSyncEnd; // Vertical sync end in pixels
UINT8 Flags; // Flags (Interlaced/DoubleScan/etc).
UINT32 PixelClock; // Pixel clock in units of Hz
UINT16 RefreshRate; // Refresh rate in units of 0.01 Hz
UINT8 Reserved[40]; // Pad
UINT16 HorizontalTotal; // Horizontal total in pixels
UINT16 HorizontalSyncStart; // Horizontal sync start in pixels
UINT16 HorizontalSyncEnd; // Horizontal sync end in pixels
UINT16 VericalTotal; // Vertical total in pixels
UINT16 VericalSyncStart; // Vertical sync start in pixels
UINT16 VericalSyncEnd; // Vertical sync end in pixels
UINT8 Flags; // Flags (Interlaced/DoubleScan/etc).
UINT32 PixelClock; // Pixel clock in units of Hz
UINT16 RefreshRate; // Refresh rate in units of 0.01 Hz
UINT8 Reserved[40]; // Pad
} VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK;
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGS_DOUBLE_SCAN 0x01 // 0: Graphics mode is not souble scanned
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGS_DOUBLE_SCAN 0x01 // 0: Graphics mode is not souble scanned
// 1: Graphics mode is double scanned
//
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGSINTERLACED 0x02 // 0: Graphics mode is not interlaced
#define VESA_BIOS_EXTENSIONS_CRTC_FLAGSINTERLACED 0x02 // 0: Graphics mode is not interlaced
// 1: Graphics mode is interlaced
//
#define VESA_BIOS_EXTENSIONS_CRTC_HORIZONTAL_SYNC_NEGATIVE 0x04 // 0: Horizontal sync polarity is positive(+)
// 0: Horizontal sync polarity is negative(-)
//
#define VESA_BIOS_EXTENSIONS_CRTC_VERITICAL_SYNC_NEGATIVE 0x08 // 0: Verical sync polarity is positive(+)
#define VESA_BIOS_EXTENSIONS_CRTC_VERITICAL_SYNC_NEGATIVE 0x08 // 0: Verical sync polarity is positive(+)
// 0: Verical sync polarity is negative(-)
//
// Turn off byte packing of data structures

View File

@@ -29,4 +29,3 @@ CsmSupportLibConstructor (
return EFI_SUCCESS;
}

View File

@@ -46,4 +46,3 @@ LegacyBiosPlatformInstall (
);
#endif

View File

@@ -12,25 +12,24 @@
//
// Handle for the Legacy Interrupt Protocol instance produced by this driver
//
STATIC EFI_HANDLE mLegacyInterruptHandle = NULL;
STATIC EFI_HANDLE mLegacyInterruptHandle = NULL;
//
// Legacy Interrupt Device number (0x01 on piix4, 0x1f on q35/mch)
//
STATIC UINT8 mLegacyInterruptDevice;
STATIC UINT8 mLegacyInterruptDevice;
//
// The Legacy Interrupt Protocol instance produced by this driver
//
STATIC EFI_LEGACY_INTERRUPT_PROTOCOL mLegacyInterrupt = {
STATIC EFI_LEGACY_INTERRUPT_PROTOCOL mLegacyInterrupt = {
GetNumberPirqs,
GetLocation,
ReadPirq,
WritePirq
};
STATIC UINT8 PirqReg[MAX_PIRQ_NUMBER] = { PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH };
STATIC UINT8 PirqReg[MAX_PIRQ_NUMBER] = { PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH };
/**
Return the number of PIRQs supported by this chipset.
@@ -53,7 +52,6 @@ GetNumberPirqs (
return EFI_SUCCESS;
}
/**
Return PCI location of this device.
$PIR table requires this info.
@@ -82,7 +80,6 @@ GetLocation (
return EFI_SUCCESS;
}
/**
Builds the PCI configuration address for the register specified by PirqNumber
@@ -95,12 +92,12 @@ GetAddress (
UINT8 PirqNumber
)
{
return PCI_LIB_ADDRESS(
LEGACY_INT_BUS,
mLegacyInterruptDevice,
LEGACY_INT_FUNC,
PirqReg[PirqNumber]
);
return PCI_LIB_ADDRESS (
LEGACY_INT_BUS,
mLegacyInterruptDevice,
LEGACY_INT_FUNC,
PirqReg[PirqNumber]
);
}
/**
@@ -127,12 +124,11 @@ ReadPirq (
}
*PirqData = PciRead8 (GetAddress (PirqNumber));
*PirqData = (UINT8) (*PirqData & 0x7f);
*PirqData = (UINT8)(*PirqData & 0x7f);
return EFI_SUCCESS;
}
/**
Write the given PIRQ register
@@ -160,7 +156,6 @@ WritePirq (
return EFI_SUCCESS;
}
/**
Initialize Legacy Interrupt support
@@ -178,7 +173,7 @@ LegacyInterruptInstall (
//
// Make sure the Legacy Interrupt Protocol is not already installed in the system
//
ASSERT_PROTOCOL_ALREADY_INSTALLED(NULL, &gEfiLegacyInterruptProtocolGuid);
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiLegacyInterruptProtocolGuid);
//
// Query Host Bridge DID to determine platform type, then set device number
@@ -192,8 +187,12 @@ LegacyInterruptInstall (
mLegacyInterruptDevice = LEGACY_INT_DEV_Q35;
break;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
DEBUG ((
DEBUG_ERROR,
"%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__,
HostBridgeDevId
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@@ -207,8 +206,7 @@ LegacyInterruptInstall (
&mLegacyInterrupt,
NULL
);
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
return Status;
}

View File

@@ -20,23 +20,22 @@
#include <Library/UefiBootServicesTableLib.h>
#include <OvmfPlatforms.h>
#define LEGACY_INT_BUS 0
#define LEGACY_INT_BUS 0
#define LEGACY_INT_DEV_PIIX4 0x01
#define LEGACY_INT_DEV_Q35 0x1f
#define LEGACY_INT_FUNC 0
#define LEGACY_INT_FUNC 0
#define PIRQN 0x00 // PIRQ Null
#define PIRQA 0x60
#define PIRQB 0x61
#define PIRQC 0x62
#define PIRQD 0x63
#define PIRQE 0x68
#define PIRQF 0x69
#define PIRQG 0x6A
#define PIRQH 0x6B
#define PIRQN 0x00 // PIRQ Null
#define PIRQA 0x60
#define PIRQB 0x61
#define PIRQC 0x62
#define PIRQD 0x63
#define PIRQE 0x68
#define PIRQF 0x69
#define PIRQG 0x6A
#define PIRQH 0x6B
#define MAX_PIRQ_NUMBER 8
#define MAX_PIRQ_NUMBER 8
/**
Return the number of PIRQs supported by this chipset.
@@ -114,4 +113,3 @@ WritePirq (
);
#endif

View File

@@ -9,15 +9,15 @@
#include "LegacyPlatform.h"
EFI_SETUP_BBS_MAP mSetupBbsMap[] = {
{ 1, 2, 1, 1 }, // ATA HardDrive
{ 2, 3, 1, 1 }, // ATAPI CDROM
{ 3, 0x80, 2, 0 }, // PXE
{ 4, 1, 0, 6 }, // USB Floppy
{ 4, 2, 0, 6 }, // USB HDD
{ 4, 3, 0, 6 }, // USB CD
{ 4, 1, 0, 0 }, // USB ZIP Bugbug since Class/SubClass code is uninitialized
{ 4, 2, 0, 0 } // USB ZIP Bugbug since Class/SubClass code is uninitialized
EFI_SETUP_BBS_MAP mSetupBbsMap[] = {
{ 1, 2, 1, 1 }, // ATA HardDrive
{ 2, 3, 1, 1 }, // ATAPI CDROM
{ 3, 0x80, 2, 0 }, // PXE
{ 4, 1, 0, 6 }, // USB Floppy
{ 4, 2, 0, 6 }, // USB HDD
{ 4, 3, 0, 6 }, // USB CD
{ 4, 1, 0, 0 }, // USB ZIP Bugbug since Class/SubClass code is uninitialized
{ 4, 2, 0, 0 } // USB ZIP Bugbug since Class/SubClass code is uninitialized
};
//
@@ -29,23 +29,23 @@ EFI_SETUP_BBS_MAP mSetupBbsMap[] = {
#define NULL_ROM_FILE_GUID \
{ 0x00000000, 0x0000, 0x0000, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }
SYSTEM_ROM_TABLE mSystemRomTable[] = {
{ SYSTEM_ROM_FILE_GUID, 1 },
{ NULL_ROM_FILE_GUID, 0 }
SYSTEM_ROM_TABLE mSystemRomTable[] = {
{ SYSTEM_ROM_FILE_GUID, 1 },
{ NULL_ROM_FILE_GUID, 0 }
};
EFI_HANDLE mVgaHandles[0x20];
EFI_HANDLE mDiskHandles[0x20];
EFI_HANDLE mIsaHandles[0x20];
EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY IrqPriorityTable[MAX_IRQ_PRIORITY_ENTRIES] = {
{0x0B,0},
{0x09,0},
{0x0A,0},
{0x05,0},
{0x07,0},
{0x00,0},
{0x00,0}
EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY IrqPriorityTable[MAX_IRQ_PRIORITY_ENTRIES] = {
{ 0x0B, 0 },
{ 0x09, 0 },
{ 0x0A, 0 },
{ 0x05, 0 },
{ 0x07, 0 },
{ 0x00, 0 },
{ 0x00, 0 }
};
//
@@ -54,18 +54,18 @@ EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY IrqPriorityTable[MAX_IRQ_PRIORITY_ENTRIES] =
// to check to get bus number. The Slot number - 1 is an index into a decode
// table to get the bridge information.
//
EFI_LEGACY_PIRQ_TABLE PirqTableHead = {
EFI_LEGACY_PIRQ_TABLE PirqTableHead = {
{
EFI_LEGACY_PIRQ_TABLE_SIGNATURE, // UINT32 Signature
0x00, // UINT8 MinorVersion
0x01, // UINT8 MajorVersion
0x0000, // UINT16 TableSize
0x00, // UINT8 Bus
0x08, // UINT8 DevFun
0x0000, // UINT16 PciOnlyIrq
0x8086, // UINT16 CompatibleVid
0x122e, // UINT16 CompatibleDid
0x00000000, // UINT32 Miniport
0x00, // UINT8 MinorVersion
0x01, // UINT8 MajorVersion
0x0000, // UINT16 TableSize
0x00, // UINT8 Bus
0x08, // UINT8 DevFun
0x0000, // UINT16 PciOnlyIrq
0x8086, // UINT16 CompatibleVid
0x122e, // UINT16 CompatibleDid
0x00000000, // UINT32 Miniport
{ // UINT8 Reserved[11]
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00
@@ -76,17 +76,29 @@ EFI_LEGACY_PIRQ_TABLE PirqTableHead = {
// -- Pin 1 -- -- Pin 2 -- -- Pin 3 -- -- Pin 4 --
// Bus Dev Reg Map Reg Map Reg Map Reg Map
//
{0x00,0x08,{{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8}},0x00,0x00},
{0x00,0x10,{{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8}},0x01,0x00},
{0x00,0x18,{{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8},{0x61,0xDEB8}},0x02,0x00},
{0x00,0x20,{{0x63,0xDEB8},{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8}},0x03,0x00},
{0x00,0x28,{{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8}},0x04,0x00},
{0x00,0x30,{{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8}},0x05,0x00},
{ 0x00, 0x08, {
{ 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }
}, 0x00, 0x00 },
{ 0x00, 0x10, {
{ 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }
}, 0x01, 0x00 },
{ 0x00, 0x18, {
{ 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }
}, 0x02, 0x00 },
{ 0x00, 0x20, {
{ 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }
}, 0x03, 0x00 },
{ 0x00, 0x28, {
{ 0x60, 0xDEB8 }, { 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }
}, 0x04, 0x00 },
{ 0x00, 0x30, {
{ 0x61, 0xDEB8 }, { 0x62, 0xDEB8 }, { 0x63, 0xDEB8 }, { 0x60, 0xDEB8 }
}, 0x05, 0x00 },
}
};
LEGACY_BIOS_PLATFORM_INSTANCE mPrivateData;
EFI_HANDLE mImageHandle = NULL;
LEGACY_BIOS_PLATFORM_INSTANCE mPrivateData;
EFI_HANDLE mImageHandle = NULL;
/**
Return the handles and assorted information for the specified PCI Class code
@@ -102,32 +114,32 @@ EFI_HANDLE mImageHandle = NULL;
**/
EFI_STATUS
FindAllDeviceTypes (
IN PCI_CLASS_RECORD *PciClasses,
IN OUT DEVICE_STRUCTURE *DeviceTable,
IN OUT UINT16 *DeviceIndex,
IN BOOLEAN DeviceFlags
IN PCI_CLASS_RECORD *PciClasses,
IN OUT DEVICE_STRUCTURE *DeviceTable,
IN OUT UINT16 *DeviceIndex,
IN BOOLEAN DeviceFlags
)
{
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN StartIndex;
PCI_TYPE00 PciConfigHeader;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
UINTN Flags;
EFI_STATUS Status;
UINTN Index2;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN StartIndex;
PCI_TYPE00 PciConfigHeader;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
UINTN Flags;
EFI_STATUS Status;
UINTN Index2;
//
// Get legacy BIOS protocol as it is required to deal with Option ROMs.
//
StartIndex = *DeviceIndex;
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID**)&LegacyBios
);
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID **)&LegacyBios
);
ASSERT_EFI_ERROR (Status);
//
@@ -144,7 +156,7 @@ FindAllDeviceTypes (
gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiPciIoProtocolGuid,
(VOID**)&PciIo
(VOID **)&PciIo
);
PciIo->Pci.Read (
PciIo,
@@ -154,8 +166,9 @@ FindAllDeviceTypes (
&PciConfigHeader
);
for (Index2 = 0; PciClasses[Index2].Class != 0xff; Index2++) {
if ((PciConfigHeader.Hdr.ClassCode[2] == PciClasses[Index2].Class) &&
(PciConfigHeader.Hdr.ClassCode[1] == PciClasses[Index2].SubClass)) {
if ((PciConfigHeader.Hdr.ClassCode[2] == PciClasses[Index2].Class) &&
(PciConfigHeader.Hdr.ClassCode[1] == PciClasses[Index2].SubClass))
{
LegacyBios->CheckPciRom (
LegacyBios,
HandleBuffer[Index],
@@ -173,13 +186,14 @@ FindAllDeviceTypes (
if (
((DeviceFlags != 0) && (Flags == NO_ROM)) ||
((Flags & (ROM_FOUND | VALID_LEGACY_ROM)) == (ROM_FOUND | VALID_LEGACY_ROM))
) {
)
{
DeviceTable->Handle = HandleBuffer[Index];
DeviceTable->Vid = PciConfigHeader.Hdr.VendorId;
DeviceTable->Did = PciConfigHeader.Hdr.DeviceId;
DeviceTable->SvId = PciConfigHeader.Device.SubsystemVendorID;
DeviceTable->SysId = PciConfigHeader.Device.SubsystemID;
++ *DeviceIndex;
++*DeviceIndex;
DeviceTable++;
}
}
@@ -211,8 +225,8 @@ FindAllDeviceTypes (
EFI_STATUS
EFIAPI
SmmInit (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN VOID *EfiToLegacy16BootTable
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN VOID *EfiToLegacy16BootTable
)
{
return EFI_SUCCESS;
@@ -226,23 +240,23 @@ SmmInit (
**/
VOID
GetSelectedVgaDeviceInfo (
OUT EFI_HANDLE *VgaHandle
OUT EFI_HANDLE *VgaHandle
)
{
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
UINT8 MinBus;
UINT8 MaxBus;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
UINTN SelectedAddress;
UINTN CurrentAddress;
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
UINT8 MinBus;
UINT8 MaxBus;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
UINTN SelectedAddress;
UINTN CurrentAddress;
//
// Initialize return to 'not found' state
@@ -253,9 +267,9 @@ GetSelectedVgaDeviceInfo (
// Initialize variable states. This is important for selecting the VGA
// device if multiple devices exist behind a single bridge.
//
HandleCount = 0;
HandleBuffer = NULL;
SelectedAddress = PCI_LIB_ADDRESS(0xff, 0x1f, 0x7, 0);
HandleCount = 0;
HandleBuffer = NULL;
SelectedAddress = PCI_LIB_ADDRESS (0xff, 0x1f, 0x7, 0);
//
// The bus range to search for a VGA device in.
@@ -265,27 +279,27 @@ GetSelectedVgaDeviceInfo (
//
// Start to check all the pci io to find all possible VGA device
//
HandleCount = 0;
HandleCount = 0;
HandleBuffer = NULL;
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
if (EFI_ERROR (Status)) {
return;
}
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiPciIoProtocolGuid, (VOID**)&PciIo);
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiPciIoProtocolGuid, (VOID **)&PciIo);
if (!EFI_ERROR (Status)) {
//
// Determine if this is in the correct bus range.
//
Status = PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);
if (EFI_ERROR(Status) || (Bus < MinBus || Bus > MaxBus)) {
if (EFI_ERROR (Status) || ((Bus < MinBus) || (Bus > MaxBus))) {
continue;
}
@@ -293,12 +307,12 @@ GetSelectedVgaDeviceInfo (
// Read device information.
//
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint32,
0,
sizeof (Pci) / sizeof (UINT32),
&Pci
);
PciIo,
EfiPciIoWidthUint32,
0,
sizeof (Pci) / sizeof (UINT32),
&Pci
);
if (EFI_ERROR (Status)) {
continue;
}
@@ -309,7 +323,9 @@ GetSelectedVgaDeviceInfo (
if (!IS_PCI_VGA (&Pci)) {
continue;
}
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"PCI VGA: 0x%04x:0x%04x\n",
Pci.Hdr.VendorId,
Pci.Hdr.DeviceId
@@ -319,10 +335,10 @@ GetSelectedVgaDeviceInfo (
// Currently we use the lowest numbered bus/device/function if multiple
// devices are found in the target bus range.
//
CurrentAddress = PCI_LIB_ADDRESS(Bus, Device, Function, 0);
CurrentAddress = PCI_LIB_ADDRESS (Bus, Device, Function, 0);
if (CurrentAddress < SelectedAddress) {
SelectedAddress = CurrentAddress;
*VgaHandle = HandleBuffer[Index];
*VgaHandle = HandleBuffer[Index];
}
}
}
@@ -330,7 +346,6 @@ GetSelectedVgaDeviceInfo (
FreePool (HandleBuffer);
}
/**
Returns a buffer of handles for the requested subfunction.
@@ -349,42 +364,42 @@ GetSelectedVgaDeviceInfo (
EFI_STATUS
EFIAPI
GetPlatformHandle (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE **HandleBuffer,
OUT UINTN *HandleCount,
OUT VOID **AdditionalData OPTIONAL
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE **HandleBuffer,
OUT UINTN *HandleCount,
OUT VOID **AdditionalData OPTIONAL
)
{
DEVICE_STRUCTURE LocalDevice[0x40];
UINT32 LocalIndex;
UINT32 Index;
DEVICE_STRUCTURE TempDevice;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
HDD_INFO *HddInfo;
PCI_TYPE00 PciConfigHeader;
UINT32 HddIndex;
EFI_HANDLE IdeHandle;
DEVICE_STRUCTURE LocalDevice[0x40];
UINT32 LocalIndex;
UINT32 Index;
DEVICE_STRUCTURE TempDevice;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
UINTN Segment;
UINTN Bus;
UINTN Device;
UINTN Function;
HDD_INFO *HddInfo;
PCI_TYPE00 PciConfigHeader;
UINT32 HddIndex;
EFI_HANDLE IdeHandle;
EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
PCI_CLASS_RECORD ClassLists[10];
UINTN PriorityIndex;
PCI_CLASS_RECORD ClassLists[10];
UINTN PriorityIndex;
static BOOLEAN bConnected = FALSE;
static BOOLEAN bConnected = FALSE;
LocalIndex = 0x00;
HddInfo = NULL;
HddIndex = 0;
LocalIndex = 0x00;
HddInfo = NULL;
HddIndex = 0;
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID**)&LegacyBios
(VOID **)&LegacyBios
);
//
@@ -400,9 +415,9 @@ GetPlatformHandle (
*HandleCount = (mVgaHandles[0] != NULL) ? 1 : 0;
return EFI_SUCCESS;
case EfiGetPlatformIdeHandle:
IdeHandle = NULL;
IdeHandle = NULL;
if (AdditionalData != NULL) {
HddInfo = (HDD_INFO *) *AdditionalData;
HddInfo = (HDD_INFO *)*AdditionalData;
}
//
@@ -417,7 +432,7 @@ GetPlatformHandle (
ClassLists[3].Class = PCI_CLASS_MASS_STORAGE;
ClassLists[3].SubClass = PCI_CLASS_MASS_STORAGE_SATADPA;
ClassLists[4].Class = 0xff;
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *) &LocalIndex, TRUE);
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *)&LocalIndex, TRUE);
if (LocalIndex == 0) {
return EFI_NOT_FOUND;
}
@@ -449,10 +464,10 @@ GetPlatformHandle (
//
PriorityIndex = 0;
for (Index = 0; Index < LocalIndex; Index++) {
if (LocalDevice[Index].Handle == IdeHandle && PriorityIndex == 0) {
TempDevice = LocalDevice[PriorityIndex];
if ((LocalDevice[Index].Handle == IdeHandle) && (PriorityIndex == 0)) {
TempDevice = LocalDevice[PriorityIndex];
LocalDevice[PriorityIndex] = LocalDevice[Index];
LocalDevice[Index] = TempDevice;
LocalDevice[Index] = TempDevice;
PriorityIndex++;
break;
}
@@ -464,6 +479,7 @@ GetPlatformHandle (
for (Index = 0; Index < LocalIndex; Index++) {
mDiskHandles[Index] = LocalDevice[Index].Handle;
}
*HandleBuffer = &mDiskHandles[0];
*HandleCount = LocalIndex;
@@ -477,11 +493,12 @@ GetPlatformHandle (
//
for (Index = 0; (Index < LocalIndex) && (AdditionalData != NULL); Index++) {
if ((LocalDevice[Index].Handle != NULL) &&
(LocalDevice[Index].Handle == IdeHandle)) {
(LocalDevice[Index].Handle == IdeHandle))
{
Status = gBS->HandleProtocol (
LocalDevice[Index].Handle,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo
(VOID **)&PciIo
);
PciIo->Pci.Read (
PciIo,
@@ -503,14 +520,14 @@ GetPlatformHandle (
// Be sure to only fill out correct information based on platform
// configuration.
//
HddInfo[HddIndex].Status |= HDD_PRIMARY;
HddInfo[HddIndex].Bus = (UINT32)Bus;
HddInfo[HddIndex].Device = (UINT32)Device;
HddInfo[HddIndex].Function = (UINT32)Function;
HddInfo[HddIndex + 1].Status |= HDD_SECONDARY;
HddInfo[HddIndex + 1].Bus = (UINT32)Bus;
HddInfo[HddIndex + 1].Device = (UINT32)Device;
HddInfo[HddIndex + 1].Function = (UINT32)Function;
HddInfo[HddIndex].Status |= HDD_PRIMARY;
HddInfo[HddIndex].Bus = (UINT32)Bus;
HddInfo[HddIndex].Device = (UINT32)Device;
HddInfo[HddIndex].Function = (UINT32)Function;
HddInfo[HddIndex + 1].Status |= HDD_SECONDARY;
HddInfo[HddIndex + 1].Bus = (UINT32)Bus;
HddInfo[HddIndex + 1].Device = (UINT32)Device;
HddInfo[HddIndex + 1].Function = (UINT32)Function;
//
// Primary controller data
@@ -524,11 +541,12 @@ GetPlatformHandle (
(UINT16)(PciConfigHeader.Device.Bar[4] & 0xfffc);
HddInfo[HddIndex].HddIrq = PciConfigHeader.Device.InterruptLine;
} else {
HddInfo[HddIndex].HddIrq = 14;
HddInfo[HddIndex].HddIrq = 14;
HddInfo[HddIndex].CommandBaseAddress = 0x1f0;
HddInfo[HddIndex].ControlBaseAddress = 0x3f6;
HddInfo[HddIndex].BusMasterAddress = 0;
HddInfo[HddIndex].BusMasterAddress = 0;
}
HddIndex++;
//
@@ -543,27 +561,29 @@ GetPlatformHandle (
(UINT16)(HddInfo[HddIndex].BusMasterAddress + 8);
HddInfo[HddIndex].HddIrq = PciConfigHeader.Device.InterruptLine;
} else {
HddInfo[HddIndex].HddIrq = 15;
HddInfo[HddIndex].HddIrq = 15;
HddInfo[HddIndex].CommandBaseAddress = 0x170;
HddInfo[HddIndex].ControlBaseAddress = 0x376;
HddInfo[HddIndex].BusMasterAddress = 0;
HddInfo[HddIndex].BusMasterAddress = 0;
}
HddIndex++;
}
}
}
return EFI_SUCCESS;
case EfiGetPlatformIsaBusHandle:
ClassLists[0].Class = (UINT8) PCI_CLASS_BRIDGE;
ClassLists[0].SubClass = (UINT8) PCI_CLASS_BRIDGE_ISA_PDECODE;
ClassLists[1].Class = (UINT8) PCI_CLASS_BRIDGE;
ClassLists[1].SubClass = (UINT8) PCI_CLASS_BRIDGE_ISA;
ClassLists[0].Class = (UINT8)PCI_CLASS_BRIDGE;
ClassLists[0].SubClass = (UINT8)PCI_CLASS_BRIDGE_ISA_PDECODE;
ClassLists[1].Class = (UINT8)PCI_CLASS_BRIDGE;
ClassLists[1].SubClass = (UINT8)PCI_CLASS_BRIDGE_ISA;
ClassLists[2].Class = 0xff;
//
// Locate all found block io devices
//
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *) (&LocalIndex), TRUE);
FindAllDeviceTypes (ClassLists, LocalDevice, (UINT16 *)(&LocalIndex), TRUE);
if (LocalIndex == 0) {
return EFI_NOT_FOUND;
}
@@ -573,9 +593,9 @@ GetPlatformHandle (
//
for (Index = 0; Index < LocalIndex; Index++) {
if (LocalDevice[Index].Vid == V_INTEL_VENDOR_ID) {
TempDevice = LocalDevice[0];
LocalDevice[0] = LocalDevice[Index];
LocalDevice[Index] = TempDevice;
TempDevice = LocalDevice[0];
LocalDevice[0] = LocalDevice[Index];
LocalDevice[Index] = TempDevice;
}
}
@@ -585,13 +605,14 @@ GetPlatformHandle (
for (Index = 0; Index < LocalIndex; Index++) {
mIsaHandles[Index] = LocalDevice[Index].Handle;
}
*HandleBuffer = &mIsaHandles[0];
*HandleCount = LocalIndex;
return EFI_SUCCESS;
case EfiGetPlatformUsbHandle:
default:
return EFI_UNSUPPORTED;
};
}
}
/**
@@ -613,13 +634,13 @@ GetPlatformHandle (
EFI_STATUS
EFIAPI
PlatformHooks (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HOOK_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE DeviceHandle OPTIONAL,
IN OUT UINTN *Shadowaddress OPTIONAL,
IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table OPTIONAL,
OUT VOID **AdditionalData OPTIONAL
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_HOOK_MODE Mode,
IN UINT16 Type,
OUT EFI_HANDLE DeviceHandle OPTIONAL,
IN OUT UINTN *Shadowaddress OPTIONAL,
IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table OPTIONAL,
OUT VOID **AdditionalData OPTIONAL
)
{
EFI_IA32_REGISTER_SET Regs;
@@ -631,7 +652,7 @@ PlatformHooks (
Status = gBS->LocateProtocol (
&gEfiLegacyBiosProtocolGuid,
NULL,
(VOID**)&LegacyBios
(VOID **)&LegacyBios
);
//
@@ -639,14 +660,14 @@ PlatformHooks (
//
Regs.H.AH = 0x00;
Regs.H.AL = 0x03;
Status = LegacyBios->Int86 (LegacyBios, 0x10, &Regs);
Status = LegacyBios->Int86 (LegacyBios, 0x10, &Regs);
return Status;
case EfiPlatformHookShadowServiceRoms:
return EFI_SUCCESS;
case EfiPlatformHookAfterRomInit:
default:
return EFI_UNSUPPORTED;
};
}
}
/**
@@ -671,24 +692,24 @@ PlatformHooks (
EFI_STATUS
EFIAPI
GetRoutingTable (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
OUT VOID **RoutingTable,
OUT UINTN *RoutingTableEntries,
OUT VOID **LocalPirqTable OPTIONAL,
OUT UINTN *PirqTableSize OPTIONAL,
OUT VOID **LocalIrqPriorityTable OPTIONAL,
OUT UINTN *IrqPriorityTableEntries OPTIONAL
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
OUT VOID **RoutingTable,
OUT UINTN *RoutingTableEntries,
OUT VOID **LocalPirqTable OPTIONAL,
OUT UINTN *PirqTableSize OPTIONAL,
OUT VOID **LocalIrqPriorityTable OPTIONAL,
OUT UINTN *IrqPriorityTableEntries OPTIONAL
)
{
UINT16 PTableSize;
UINT32 Index;
UINT8 Bus;
UINT8 Device;
UINT8 Function;
UINT8 Checksum;
UINT8 *Ptr;
EFI_STATUS Status;
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
UINT16 PTableSize;
UINT32 Index;
UINT8 Bus;
UINT8 Device;
UINT8 Function;
UINT8 Checksum;
UINT8 *Ptr;
EFI_STATUS Status;
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
Checksum = 0;
@@ -699,7 +720,7 @@ GetRoutingTable (
Status = gBS->LocateProtocol (
&gEfiLegacyInterruptProtocolGuid,
NULL,
(VOID**)&LegacyInterrupt
(VOID **)&LegacyInterrupt
);
ASSERT_EFI_ERROR (Status);
LegacyInterrupt->GetLocation (
@@ -714,34 +735,35 @@ GetRoutingTable (
//
PirqTableHead.PirqTable.TableSize = PTableSize;
PirqTableHead.PirqTable.Bus = Bus;
PirqTableHead.PirqTable.DevFun = (UINT8) ((Device << 3) + Function);
Ptr = (UINT8 *) (&PirqTableHead);
PirqTableHead.PirqTable.DevFun = (UINT8)((Device << 3) + Function);
Ptr = (UINT8 *)(&PirqTableHead);
//
// Calculate checksum.
//
for (Index = 0; Index < PTableSize; Index++) {
Checksum = (UINT8) (Checksum + (UINT8) *Ptr);
Ptr += 1;
Checksum = (UINT8)(Checksum + (UINT8)*Ptr);
Ptr += 1;
}
Checksum = (UINT8) (0x00 - Checksum);
PirqTableHead.PirqTable.Checksum = Checksum;
Checksum = (UINT8)(0x00 - Checksum);
PirqTableHead.PirqTable.Checksum = Checksum;
//
// Update return values.
//
*LocalPirqTable = (VOID *) (&PirqTableHead);
*PirqTableSize = PTableSize;
*LocalPirqTable = (VOID *)(&PirqTableHead);
*PirqTableSize = PTableSize;
}
//
// More items to return.
//
*RoutingTable = PirqTableHead.IrqRoutingEntry;
*RoutingTableEntries = MAX_IRQ_ROUTING_ENTRIES;
*RoutingTable = PirqTableHead.IrqRoutingEntry;
*RoutingTableEntries = MAX_IRQ_ROUTING_ENTRIES;
if (LocalIrqPriorityTable != NULL) {
*LocalIrqPriorityTable = IrqPriorityTable;
*IrqPriorityTableEntries = MAX_IRQ_PRIORITY_ENTRIES;
*LocalIrqPriorityTable = IrqPriorityTable;
*IrqPriorityTableEntries = MAX_IRQ_PRIORITY_ENTRIES;
}
return EFI_SUCCESS;
@@ -767,18 +789,18 @@ GetRoutingTable (
EFI_STATUS
EFIAPI
GetPlatformInfo (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_INFO_MODE Mode,
OUT VOID **Table,
OUT UINTN *TableSize,
OUT UINTN *Location,
OUT UINTN *Alignment,
IN UINT16 LegacySegment,
IN UINT16 LegacyOffset
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN EFI_GET_PLATFORM_INFO_MODE Mode,
OUT VOID **Table,
OUT UINTN *TableSize,
OUT UINTN *Location,
OUT UINTN *Alignment,
IN UINT16 LegacySegment,
IN UINT16 LegacyOffset
)
{
EFI_STATUS Status;
UINTN Index;
EFI_STATUS Status;
UINTN Index;
switch (Mode) {
case EfiGetPlatformBinarySystemRom:
@@ -791,11 +813,12 @@ GetPlatformInfo (
EFI_SECTION_RAW,
0,
Table,
(UINTN *) TableSize
(UINTN *)TableSize
);
if (EFI_ERROR (Status)) {
continue;
}
return EFI_SUCCESS;
}
@@ -808,7 +831,7 @@ GetPlatformInfo (
case EfiGetPlatformPciExpressBase:
default:
return EFI_UNSUPPORTED;
};
}
}
/**
@@ -830,34 +853,35 @@ GetPlatformInfo (
EFI_STATUS
EFIAPI
TranslatePirq (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN UINTN PciBus,
IN UINTN PciDevice,
IN UINTN PciFunction,
IN OUT UINT8 *Pirq,
OUT UINT8 *PciIrq
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN UINTN PciBus,
IN UINTN PciDevice,
IN UINTN PciFunction,
IN OUT UINT8 *Pirq,
OUT UINT8 *PciIrq
)
{
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
EFI_STATUS Status;
UINTN Index;
UINTN Index1;
UINT8 LocalPirq;
UINT8 PirqData;
UINT8 MatchData;
EFI_LEGACY_INTERRUPT_PROTOCOL *LegacyInterrupt;
EFI_STATUS Status;
UINTN Index;
UINTN Index1;
UINT8 LocalPirq;
UINT8 PirqData;
UINT8 MatchData;
Status = gBS->LocateProtocol (
&gEfiLegacyInterruptProtocolGuid,
NULL,
(VOID**)&LegacyInterrupt
(VOID **)&LegacyInterrupt
);
ASSERT_EFI_ERROR (Status);
LocalPirq = (UINT8) (*Pirq);
LocalPirq = (UINT8)(*Pirq);
for (Index = 0; Index < MAX_IRQ_ROUTING_ENTRIES; Index++) {
if ((PirqTableHead.IrqRoutingEntry[Index].Bus == PciBus) &&
(PirqTableHead.IrqRoutingEntry[Index].Device == PciDevice)) {
LocalPirq = (UINT8) (PirqTableHead.IrqRoutingEntry[Index].PirqEntry[LocalPirq].Pirq & 0x0f);
(PirqTableHead.IrqRoutingEntry[Index].Device == PciDevice))
{
LocalPirq = (UINT8)(PirqTableHead.IrqRoutingEntry[Index].PirqEntry[LocalPirq].Pirq & 0x0f);
if (LocalPirq > 4) {
LocalPirq -= 4;
}
@@ -867,8 +891,9 @@ TranslatePirq (
while (PirqData == 0) {
for (Index1 = 0; Index1 < MAX_IRQ_PRIORITY_ENTRIES; Index1++) {
if ((IrqPriorityTable[Index1].Used == MatchData) &&
(IrqPriorityTable[Index1].Irq != 0)) {
PirqData = IrqPriorityTable[Index1].Irq;
(IrqPriorityTable[Index1].Irq != 0))
{
PirqData = IrqPriorityTable[Index1].Irq;
IrqPriorityTable[Index1].Used = 0xff;
LegacyInterrupt->WritePirq (
LegacyInterrupt,
@@ -880,11 +905,10 @@ TranslatePirq (
}
if (PirqData == 0) {
//
// No unused interrupts, so start reusing them.
//
MatchData = (UINT8) (~MatchData);
MatchData = (UINT8)(~MatchData);
}
}
@@ -896,7 +920,6 @@ TranslatePirq (
return EFI_SUCCESS;
}
/**
Attempt to legacy boot the BootOption. If the EFI contexted has been
compromised this function will not return.
@@ -914,26 +937,26 @@ TranslatePirq (
EFI_STATUS
EFIAPI
PrepareToBoot (
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
IN VOID *BbsTable,
IN UINT32 LoadOptionsSize,
IN VOID *LoadOptions,
IN VOID *EfiToLegacy16BootTable
IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
IN VOID *BbsTable,
IN UINT32 LoadOptionsSize,
IN VOID *LoadOptions,
IN VOID *EfiToLegacy16BootTable
)
{
BBS_TABLE *LocalBbsTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *Legacy16BootTable;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
UINT16 DevicePathType;
UINT16 Index;
UINT16 Priority;
BBS_TABLE *LocalBbsTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *Legacy16BootTable;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
UINT16 DevicePathType;
UINT16 Index;
UINT16 Priority;
//
// Initialize values
//
Priority = 0;
Legacy16BootTable = (EFI_TO_COMPATIBILITY16_BOOT_TABLE*) EfiToLegacy16BootTable;
Priority = 0;
Legacy16BootTable = (EFI_TO_COMPATIBILITY16_BOOT_TABLE *)EfiToLegacy16BootTable;
//
// Set how Gate A20 is gated by hardware
@@ -943,7 +966,7 @@ PrepareToBoot (
SioPtr->Flags.A20Port90 = 1;
SioPtr->MousePresent = 1;
LocalBbsTable = BbsTable;
LocalBbsTable = BbsTable;
//
// There are 2 cases that must be covered.
@@ -966,8 +989,9 @@ PrepareToBoot (
if ((LocalBbsTable[Index].BootPriority != BBS_UNPRIORITIZED_ENTRY) &&
(LocalBbsTable[Index].BootPriority != BBS_IGNORE_ENTRY) &&
(LocalBbsTable[Index].BootPriority != BBS_LOWEST_PRIORITY) &&
(Priority <= LocalBbsTable[Index].BootPriority)) {
Priority = (UINT16) (LocalBbsTable[Index].BootPriority + 1);
(Priority <= LocalBbsTable[Index].BootPriority))
{
Priority = (UINT16)(LocalBbsTable[Index].BootPriority + 1);
}
}
@@ -978,28 +1002,32 @@ PrepareToBoot (
case BBS_EMBED_NETWORK:
for (Index = 0; Index < Legacy16BootTable->NumberBbsEntries; Index++) {
if ((LocalBbsTable[Index].BootPriority == BBS_UNPRIORITIZED_ENTRY) &&
(LocalBbsTable[Index].DeviceType == DevicePathType)) {
(LocalBbsTable[Index].DeviceType == DevicePathType))
{
LocalBbsTable[Index].BootPriority = Priority;
++Priority;
}
}
break;
case BBS_BEV_DEVICE:
for (Index = 0; Index < Legacy16BootTable->NumberBbsEntries; Index++) {
if ((LocalBbsTable[Index].BootPriority == BBS_UNPRIORITIZED_ENTRY) &&
(LocalBbsTable[Index].Class == 01) &&
(LocalBbsTable[Index].SubClass == 01)) {
(LocalBbsTable[Index].SubClass == 01))
{
LocalBbsTable[Index].BootPriority = Priority;
++Priority;
}
}
break;
case BBS_USB:
case BBS_PCMCIA:
case BBS_UNKNOWN:
default:
break;
};
}
//
// Set priority for rest of devices
@@ -1014,7 +1042,6 @@ PrepareToBoot (
return EFI_SUCCESS;
}
/**
Initialize Legacy Platform support
@@ -1026,16 +1053,16 @@ LegacyBiosPlatformInstall (
VOID
)
{
EFI_STATUS Status;
LEGACY_BIOS_PLATFORM_INSTANCE *Private;
EFI_STATUS Status;
LEGACY_BIOS_PLATFORM_INSTANCE *Private;
mImageHandle = gImageHandle;
Private = &mPrivateData;
Private = &mPrivateData;
//
// Grab a copy of all the protocols we depend on.
//
Private->Signature = LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE;
Private->Signature = LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE;
Private->LegacyBiosPlatform.GetPlatformInfo = GetPlatformInfo;
Private->LegacyBiosPlatform.GetPlatformHandle = GetPlatformHandle;
Private->LegacyBiosPlatform.SmmInit = SmmInit;
@@ -1043,17 +1070,17 @@ LegacyBiosPlatformInstall (
Private->LegacyBiosPlatform.GetRoutingTable = GetRoutingTable;
Private->LegacyBiosPlatform.TranslatePirq = TranslatePirq;
Private->LegacyBiosPlatform.PrepareToBoot = PrepareToBoot;
Private->ImageHandle = gImageHandle;
Private->ImageHandle = gImageHandle;
//
// Make a new handle and install the protocol
//
Private->Handle = NULL;
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosPlatformProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBiosPlatform
);
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosPlatformProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBiosPlatform
);
return Status;
}

View File

@@ -38,54 +38,54 @@
//
// PIRQ information constants.
//
#define MAX_IRQ_ROUTING_ENTRIES 6
#define MAX_IRQ_PRIORITY_ENTRIES 7
#define MAX_IRQ_ROUTING_ENTRIES 6
#define MAX_IRQ_PRIORITY_ENTRIES 7
#define V_INTEL_VENDOR_ID 0x8086
#define V_PIIX4_IDE_DEVICE_ID 0x7010
#define V_INTEL_VENDOR_ID 0x8086
#define V_PIIX4_IDE_DEVICE_ID 0x7010
//
// Type declarations
//
typedef struct {
UINT8 SetupValue;
UINT16 DeviceType;
UINT8 Class;
UINT8 SubClass;
UINT8 SetupValue;
UINT16 DeviceType;
UINT8 Class;
UINT8 SubClass;
} EFI_SETUP_BBS_MAP;
typedef struct {
UINT8 Class;
UINT8 SubClass;
UINT8 Class;
UINT8 SubClass;
} PCI_CLASS_RECORD;
typedef struct {
EFI_LEGACY_PIRQ_TABLE_HEADER PirqTable;
EFI_LEGACY_IRQ_ROUTING_ENTRY IrqRoutingEntry[MAX_IRQ_ROUTING_ENTRIES];
EFI_LEGACY_PIRQ_TABLE_HEADER PirqTable;
EFI_LEGACY_IRQ_ROUTING_ENTRY IrqRoutingEntry[MAX_IRQ_ROUTING_ENTRIES];
} EFI_LEGACY_PIRQ_TABLE;
typedef struct {
EFI_HANDLE Handle;
UINT16 Vid;
UINT16 Did;
UINT16 SvId;
UINT16 SysId;
EFI_HANDLE Handle;
UINT16 Vid;
UINT16 Did;
UINT16 SvId;
UINT16 SysId;
} DEVICE_STRUCTURE;
typedef struct {
EFI_GUID FileName;
UINTN Valid;
EFI_GUID FileName;
UINTN Valid;
} SYSTEM_ROM_TABLE;
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
EFI_LEGACY_BIOS_PLATFORM_PROTOCOL LegacyBiosPlatform;
EFI_HANDLE ImageHandle;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
UINT32 Signature;
EFI_HANDLE Handle;
EFI_LEGACY_BIOS_PLATFORM_PROTOCOL LegacyBiosPlatform;
EFI_HANDLE ImageHandle;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
} LEGACY_BIOS_PLATFORM_INSTANCE;
#define LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE SIGNATURE_32('P','B','I','O')
#define LEGACY_BIOS_PLATFORM_INSTANCE_SIGNATURE SIGNATURE_32('P','B','I','O')
#define LEGACY_BIOS_PLATFORM_INSTANCE_FROM_THIS(this) \
CR (this, \
@@ -95,4 +95,3 @@ typedef struct {
)
#endif

View File

@@ -29,55 +29,55 @@
// 0xEC000-0xEFFFF 0x5f 0x96 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal
// 0xF0000-0xFFFFF 0x59 0x90 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal
//
STATIC LEGACY_MEMORY_SECTION_INFO mSectionArray[] = {
{0xC0000, SIZE_16KB, FALSE, FALSE},
{0xC4000, SIZE_16KB, FALSE, FALSE},
{0xC8000, SIZE_16KB, FALSE, FALSE},
{0xCC000, SIZE_16KB, FALSE, FALSE},
{0xD0000, SIZE_16KB, FALSE, FALSE},
{0xD4000, SIZE_16KB, FALSE, FALSE},
{0xD8000, SIZE_16KB, FALSE, FALSE},
{0xDC000, SIZE_16KB, FALSE, FALSE},
{0xE0000, SIZE_16KB, FALSE, FALSE},
{0xE4000, SIZE_16KB, FALSE, FALSE},
{0xE8000, SIZE_16KB, FALSE, FALSE},
{0xEC000, SIZE_16KB, FALSE, FALSE},
{0xF0000, SIZE_64KB, FALSE, FALSE}
STATIC LEGACY_MEMORY_SECTION_INFO mSectionArray[] = {
{ 0xC0000, SIZE_16KB, FALSE, FALSE },
{ 0xC4000, SIZE_16KB, FALSE, FALSE },
{ 0xC8000, SIZE_16KB, FALSE, FALSE },
{ 0xCC000, SIZE_16KB, FALSE, FALSE },
{ 0xD0000, SIZE_16KB, FALSE, FALSE },
{ 0xD4000, SIZE_16KB, FALSE, FALSE },
{ 0xD8000, SIZE_16KB, FALSE, FALSE },
{ 0xDC000, SIZE_16KB, FALSE, FALSE },
{ 0xE0000, SIZE_16KB, FALSE, FALSE },
{ 0xE4000, SIZE_16KB, FALSE, FALSE },
{ 0xE8000, SIZE_16KB, FALSE, FALSE },
{ 0xEC000, SIZE_16KB, FALSE, FALSE },
{ 0xF0000, SIZE_64KB, FALSE, FALSE }
};
STATIC PAM_REGISTER_VALUE mRegisterValues440[] = {
{PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x01, 0x02},
{PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x10, 0x20},
{PMC_REGISTER_PIIX4 (PIIX4_PAM0), 0x10, 0x20}
{ PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x01, 0x02 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x10, 0x20 },
{ PMC_REGISTER_PIIX4 (PIIX4_PAM0), 0x10, 0x20 }
};
STATIC PAM_REGISTER_VALUE mRegisterValuesQ35[] = {
{DRAMC_REGISTER_Q35 (MCH_PAM1), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM1), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM2), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM2), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM3), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM3), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM4), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM4), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM5), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM5), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM6), 0x01, 0x02},
{DRAMC_REGISTER_Q35 (MCH_PAM6), 0x10, 0x20},
{DRAMC_REGISTER_Q35 (MCH_PAM0), 0x10, 0x20}
{ DRAMC_REGISTER_Q35 (MCH_PAM1), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM1), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM2), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM2), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM3), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM3), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM4), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM4), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM5), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM5), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM6), 0x01, 0x02 },
{ DRAMC_REGISTER_Q35 (MCH_PAM6), 0x10, 0x20 },
{ DRAMC_REGISTER_Q35 (MCH_PAM0), 0x10, 0x20 }
};
STATIC PAM_REGISTER_VALUE *mRegisterValues;
STATIC PAM_REGISTER_VALUE *mRegisterValues;
//
// Handle used to install the Legacy Region Protocol
@@ -98,25 +98,26 @@ STATIC EFI_LEGACY_REGION2_PROTOCOL mLegacyRegion2 = {
STATIC
EFI_STATUS
LegacyRegionManipulationInternal (
IN UINT32 Start,
IN UINT32 Length,
IN BOOLEAN *ReadEnable,
IN BOOLEAN *WriteEnable,
OUT UINT32 *Granularity
IN UINT32 Start,
IN UINT32 Length,
IN BOOLEAN *ReadEnable,
IN BOOLEAN *WriteEnable,
OUT UINT32 *Granularity
)
{
UINT32 EndAddress;
UINTN Index;
UINTN StartIndex;
UINT32 EndAddress;
UINTN Index;
UINTN StartIndex;
//
// Validate input parameters.
//
if (Length == 0 || Granularity == NULL) {
if ((Length == 0) || (Granularity == NULL)) {
return EFI_INVALID_PARAMETER;
}
EndAddress = Start + Length - 1;
if ((Start < PAM_BASE_ADDRESS) || EndAddress > PAM_LIMIT_ADDRESS) {
if ((Start < PAM_BASE_ADDRESS) || (EndAddress > PAM_LIMIT_ADDRESS)) {
return EFI_INVALID_PARAMETER;
}
@@ -130,6 +131,7 @@ LegacyRegionManipulationInternal (
break;
}
}
ASSERT (Index < ARRAY_SIZE (mSectionArray));
//
@@ -145,10 +147,11 @@ LegacyRegionManipulationInternal (
} else {
PciAnd8 (
mRegisterValues[Index].PAMRegPciLibAddress,
(UINT8) (~mRegisterValues[Index].ReadEnableData)
(UINT8)(~mRegisterValues[Index].ReadEnableData)
);
}
}
if (WriteEnable != NULL) {
if (*WriteEnable) {
PciOr8 (
@@ -158,7 +161,7 @@ LegacyRegionManipulationInternal (
} else {
PciAnd8 (
mRegisterValues[Index].PAMRegPciLibAddress,
(UINT8) (~mRegisterValues[Index].WriteEnableData)
(UINT8)(~mRegisterValues[Index].WriteEnableData)
);
}
}
@@ -171,6 +174,7 @@ LegacyRegionManipulationInternal (
break;
}
}
ASSERT (Index < ARRAY_SIZE (mSectionArray));
return EFI_SUCCESS;
@@ -179,30 +183,31 @@ LegacyRegionManipulationInternal (
STATIC
EFI_STATUS
LegacyRegionGetInfoInternal (
OUT UINT32 *DescriptorCount,
OUT LEGACY_MEMORY_SECTION_INFO **Descriptor
OUT UINT32 *DescriptorCount,
OUT LEGACY_MEMORY_SECTION_INFO **Descriptor
)
{
UINTN Index;
UINT8 PamValue;
UINTN Index;
UINT8 PamValue;
//
// Check input parameters
//
if (DescriptorCount == NULL || Descriptor == NULL) {
if ((DescriptorCount == NULL) || (Descriptor == NULL)) {
return EFI_INVALID_PARAMETER;
}
//
// Fill in current status of legacy region.
//
*DescriptorCount = sizeof(mSectionArray) / sizeof (mSectionArray[0]);
*DescriptorCount = sizeof (mSectionArray) / sizeof (mSectionArray[0]);
for (Index = 0; Index < *DescriptorCount; Index++) {
PamValue = PciRead8 (mRegisterValues[Index].PAMRegPciLibAddress);
PamValue = PciRead8 (mRegisterValues[Index].PAMRegPciLibAddress);
mSectionArray[Index].ReadEnabled = FALSE;
if ((PamValue & mRegisterValues[Index].ReadEnableData) != 0) {
mSectionArray[Index].ReadEnabled = TRUE;
}
mSectionArray[Index].WriteEnabled = FALSE;
if ((PamValue & mRegisterValues[Index].WriteEnableData) != 0) {
mSectionArray[Index].WriteEnabled = TRUE;
@@ -250,7 +255,6 @@ LegacyRegion2Decode (
return LegacyRegionManipulationInternal (Start, Length, On, NULL, Granularity);
}
/**
Modify the hardware to disallow memory attribute changes in a region.
@@ -279,10 +283,10 @@ LegacyRegion2Decode (
EFI_STATUS
EFIAPI
LegacyRegion2BootLock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
)
{
if ((Start < 0xC0000) || ((Start + Length - 1) > 0xFFFFF)) {
@@ -292,7 +296,6 @@ LegacyRegion2BootLock (
return EFI_UNSUPPORTED;
}
/**
Modify the hardware to disallow memory writes in a region.
@@ -316,10 +319,10 @@ LegacyRegion2BootLock (
EFI_STATUS
EFIAPI
LegacyRegion2Lock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
)
{
BOOLEAN WriteEnable;
@@ -328,7 +331,6 @@ LegacyRegion2Lock (
return LegacyRegionManipulationInternal (Start, Length, NULL, &WriteEnable, Granularity);
}
/**
Modify the hardware to allow memory writes in a region.
@@ -391,11 +393,11 @@ LegacyRegionGetInfo (
OUT EFI_LEGACY_REGION_DESCRIPTOR **Descriptor
)
{
LEGACY_MEMORY_SECTION_INFO *SectionInfo;
UINT32 SectionCount;
EFI_LEGACY_REGION_DESCRIPTOR *DescriptorArray;
UINTN Index;
UINTN DescriptorIndex;
LEGACY_MEMORY_SECTION_INFO *SectionInfo;
UINT32 SectionCount;
EFI_LEGACY_REGION_DESCRIPTOR *DescriptorArray;
UINTN Index;
UINTN DescriptorIndex;
//
// Get section numbers and information
@@ -416,10 +418,11 @@ LegacyRegionGetInfo (
DescriptorArray[DescriptorIndex].Length = SectionInfo[Index].Length;
DescriptorArray[DescriptorIndex].Granularity = SectionInfo[Index].Length;
if (SectionInfo[Index].ReadEnabled) {
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionDecoded;
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionDecoded;
} else {
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionNotDecoded;
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionNotDecoded;
}
DescriptorIndex++;
//
@@ -433,6 +436,7 @@ LegacyRegionGetInfo (
} else {
DescriptorArray[DescriptorIndex].Attribute = LegacyRegionWriteDisabled;
}
DescriptorIndex++;
//
@@ -445,7 +449,7 @@ LegacyRegionGetInfo (
DescriptorIndex++;
}
*DescriptorCount = (UINT32) DescriptorIndex;
*DescriptorCount = (UINT32)DescriptorIndex;
*Descriptor = DescriptorArray;
return EFI_SUCCESS;
@@ -470,17 +474,21 @@ LegacyRegionInit (
//
HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
switch (HostBridgeDevId) {
case INTEL_82441_DEVICE_ID:
mRegisterValues = mRegisterValues440;
break;
case INTEL_Q35_MCH_DEVICE_ID:
mRegisterValues = mRegisterValuesQ35;
break;
default:
DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__, HostBridgeDevId));
ASSERT (FALSE);
return RETURN_UNSUPPORTED;
case INTEL_82441_DEVICE_ID:
mRegisterValues = mRegisterValues440;
break;
case INTEL_Q35_MCH_DEVICE_ID:
mRegisterValues = mRegisterValuesQ35;
break;
default:
DEBUG ((
DEBUG_ERROR,
"%a: Unknown Host Bridge Device ID: 0x%04x\n",
__FUNCTION__,
HostBridgeDevId
));
ASSERT (FALSE);
return RETURN_UNSUPPORTED;
}
//
@@ -488,11 +496,11 @@ LegacyRegionInit (
//
Status = gBS->InstallMultipleProtocolInterfaces (
&mHandle,
&gEfiLegacyRegion2ProtocolGuid, &mLegacyRegion2,
&gEfiLegacyRegion2ProtocolGuid,
&mLegacyRegion2,
NULL
);
ASSERT_EFI_ERROR (Status);
return Status;
}

View File

@@ -31,19 +31,19 @@
// Describes Legacy Region blocks and status.
//
typedef struct {
UINT32 Start;
UINT32 Length;
BOOLEAN ReadEnabled;
BOOLEAN WriteEnabled;
UINT32 Start;
UINT32 Length;
BOOLEAN ReadEnabled;
BOOLEAN WriteEnabled;
} LEGACY_MEMORY_SECTION_INFO;
//
// Provides a map of the PAM registers and bits used to set Read/Write access.
//
typedef struct {
UINTN PAMRegPciLibAddress;
UINT8 ReadEnableData;
UINT8 WriteEnableData;
UINTN PAMRegPciLibAddress;
UINT8 ReadEnableData;
UINT8 WriteEnableData;
} PAM_REGISTER_VALUE;
/**
@@ -103,10 +103,10 @@ LegacyRegion2Decode (
EFI_STATUS
EFIAPI
LegacyRegion2Lock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
);
/**
@@ -137,10 +137,10 @@ LegacyRegion2Lock (
EFI_STATUS
EFIAPI
LegacyRegion2BootLock (
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
IN EFI_LEGACY_REGION2_PROTOCOL *This,
IN UINT32 Start,
IN UINT32 Length,
OUT UINT32 *Granularity
);
/**
@@ -200,4 +200,3 @@ LegacyRegionGetInfo (
);
#endif

View File

@@ -17,25 +17,24 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// S3 Boot Script Table identifier.
///
#define FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
#define FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
///
/// The opcode is used to add a record for memory reads of the memory location and continues when the
/// exit criteria is satisfied, or after a defined duration.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
#define FRAMEWORK_EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
///
/// The opcode is used to add a record for dispatching specified arbitrary code into a specified
/// boot script table.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x0D
#define FRAMEWORK_EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x0D
///
/// The opcode indicates the start of the boot script table.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
#define FRAMEWORK_EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
///
/// The opcode indicates the end of the boot script table.
///
#define FRAMEWORK_EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
#define FRAMEWORK_EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
#endif

View File

@@ -33,35 +33,35 @@ typedef struct {
//
// Table header for the Framework EFI Runtime Services Table
//
EFI_TABLE_HEADER Hdr;
EFI_TABLE_HEADER Hdr;
//
// Time services
//
EFI_GET_TIME GetTime;
EFI_SET_TIME SetTime;
EFI_GET_WAKEUP_TIME GetWakeupTime;
EFI_SET_WAKEUP_TIME SetWakeupTime;
EFI_GET_TIME GetTime;
EFI_SET_TIME SetTime;
EFI_GET_WAKEUP_TIME GetWakeupTime;
EFI_SET_WAKEUP_TIME SetWakeupTime;
//
// Virtual memory services
//
EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
EFI_CONVERT_POINTER ConvertPointer;
EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
EFI_CONVERT_POINTER ConvertPointer;
//
// Variable services
//
EFI_GET_VARIABLE GetVariable;
EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
EFI_SET_VARIABLE SetVariable;
EFI_GET_VARIABLE GetVariable;
EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
EFI_SET_VARIABLE SetVariable;
//
// Misc
//
EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
EFI_RESET_SYSTEM ResetSystem;
EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
EFI_RESET_SYSTEM ResetSystem;
///
/// A Framework extension to the EFI 1.10 runtime table.
/// It was moved to a protocol to avoid conflict with UEFI 2.0.
///
EFI_REPORT_STATUS_CODE ReportStatusCode;
EFI_REPORT_STATUS_CODE ReportStatusCode;
} FRAMEWORK_EFI_RUNTIME_SERVICES;
///
@@ -71,94 +71,94 @@ typedef struct {
///
/// The table header for the EFI Boot Services Table.
///
EFI_TABLE_HEADER Hdr;
EFI_TABLE_HEADER Hdr;
//
// Task Priority Services
//
EFI_RAISE_TPL RaiseTPL;
EFI_RESTORE_TPL RestoreTPL;
EFI_RAISE_TPL RaiseTPL;
EFI_RESTORE_TPL RestoreTPL;
//
// Memory Services
//
EFI_ALLOCATE_PAGES AllocatePages;
EFI_FREE_PAGES FreePages;
EFI_GET_MEMORY_MAP GetMemoryMap;
EFI_ALLOCATE_POOL AllocatePool;
EFI_FREE_POOL FreePool;
EFI_ALLOCATE_PAGES AllocatePages;
EFI_FREE_PAGES FreePages;
EFI_GET_MEMORY_MAP GetMemoryMap;
EFI_ALLOCATE_POOL AllocatePool;
EFI_FREE_POOL FreePool;
//
// Event & Timer Services
//
EFI_CREATE_EVENT CreateEvent;
EFI_SET_TIMER SetTimer;
EFI_WAIT_FOR_EVENT WaitForEvent;
EFI_SIGNAL_EVENT SignalEvent;
EFI_CLOSE_EVENT CloseEvent;
EFI_CHECK_EVENT CheckEvent;
EFI_CREATE_EVENT CreateEvent;
EFI_SET_TIMER SetTimer;
EFI_WAIT_FOR_EVENT WaitForEvent;
EFI_SIGNAL_EVENT SignalEvent;
EFI_CLOSE_EVENT CloseEvent;
EFI_CHECK_EVENT CheckEvent;
//
// Protocol Handler Services
//
EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
EFI_HANDLE_PROTOCOL HandleProtocol;
EFI_HANDLE_PROTOCOL PcHandleProtocol;
EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
EFI_LOCATE_HANDLE LocateHandle;
EFI_LOCATE_DEVICE_PATH LocateDevicePath;
EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
EFI_HANDLE_PROTOCOL HandleProtocol;
EFI_HANDLE_PROTOCOL PcHandleProtocol;
EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
EFI_LOCATE_HANDLE LocateHandle;
EFI_LOCATE_DEVICE_PATH LocateDevicePath;
EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
//
// Image Services
//
EFI_IMAGE_LOAD LoadImage;
EFI_IMAGE_START StartImage;
EFI_EXIT Exit;
EFI_IMAGE_UNLOAD UnloadImage;
EFI_EXIT_BOOT_SERVICES ExitBootServices;
EFI_IMAGE_LOAD LoadImage;
EFI_IMAGE_START StartImage;
EFI_EXIT Exit;
EFI_IMAGE_UNLOAD UnloadImage;
EFI_EXIT_BOOT_SERVICES ExitBootServices;
//
// Miscellaneous Services
//
EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
EFI_STALL Stall;
EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
EFI_STALL Stall;
EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
//
// DriverSupport Services
//
EFI_CONNECT_CONTROLLER ConnectController;
EFI_DISCONNECT_CONTROLLER DisconnectController;
EFI_CONNECT_CONTROLLER ConnectController;
EFI_DISCONNECT_CONTROLLER DisconnectController;
//
// Open and Close Protocol Services
//
EFI_OPEN_PROTOCOL OpenProtocol;
EFI_CLOSE_PROTOCOL CloseProtocol;
EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
EFI_OPEN_PROTOCOL OpenProtocol;
EFI_CLOSE_PROTOCOL CloseProtocol;
EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
//
// Library Services
//
EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
EFI_LOCATE_PROTOCOL LocateProtocol;
EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
EFI_LOCATE_PROTOCOL LocateProtocol;
EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
//
// 32-bit CRC Services
//
EFI_CALCULATE_CRC32 CalculateCrc32;
EFI_CALCULATE_CRC32 CalculateCrc32;
//
// Miscellaneous Services
//
EFI_COPY_MEM CopyMem;
EFI_SET_MEM SetMem;
EFI_COPY_MEM CopyMem;
EFI_SET_MEM SetMem;
} FRAMEWORK_EFI_BOOT_SERVICES;
#define EFI_EVENT_RUNTIME_CONTEXT 0x20000000
@@ -167,4 +167,3 @@ typedef struct {
#define EFI_EVENT_SIGNAL_LEGACY_BOOT 0x00000204
#endif

View File

@@ -17,38 +17,38 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// Firmware Volume Block Attributes bit definitions.
///@{
#define EFI_FVB_READ_DISABLED_CAP 0x00000001
#define EFI_FVB_READ_ENABLED_CAP 0x00000002
#define EFI_FVB_READ_STATUS 0x00000004
#define EFI_FVB_READ_DISABLED_CAP 0x00000001
#define EFI_FVB_READ_ENABLED_CAP 0x00000002
#define EFI_FVB_READ_STATUS 0x00000004
#define EFI_FVB_WRITE_DISABLED_CAP 0x00000008
#define EFI_FVB_WRITE_ENABLED_CAP 0x00000010
#define EFI_FVB_WRITE_STATUS 0x00000020
#define EFI_FVB_LOCK_CAP 0x00000040
#define EFI_FVB_LOCK_STATUS 0x00000080
#define EFI_FVB_LOCK_CAP 0x00000040
#define EFI_FVB_LOCK_STATUS 0x00000080
#define EFI_FVB_STICKY_WRITE 0x00000200
#define EFI_FVB_MEMORY_MAPPED 0x00000400
#define EFI_FVB_ERASE_POLARITY 0x00000800
#define EFI_FVB_STICKY_WRITE 0x00000200
#define EFI_FVB_MEMORY_MAPPED 0x00000400
#define EFI_FVB_ERASE_POLARITY 0x00000800
#define EFI_FVB_ALIGNMENT_CAP 0x00008000
#define EFI_FVB_ALIGNMENT_2 0x00010000
#define EFI_FVB_ALIGNMENT_4 0x00020000
#define EFI_FVB_ALIGNMENT_8 0x00040000
#define EFI_FVB_ALIGNMENT_16 0x00080000
#define EFI_FVB_ALIGNMENT_32 0x00100000
#define EFI_FVB_ALIGNMENT_64 0x00200000
#define EFI_FVB_ALIGNMENT_128 0x00400000
#define EFI_FVB_ALIGNMENT_256 0x00800000
#define EFI_FVB_ALIGNMENT_512 0x01000000
#define EFI_FVB_ALIGNMENT_1K 0x02000000
#define EFI_FVB_ALIGNMENT_2K 0x04000000
#define EFI_FVB_ALIGNMENT_4K 0x08000000
#define EFI_FVB_ALIGNMENT_8K 0x10000000
#define EFI_FVB_ALIGNMENT_16K 0x20000000
#define EFI_FVB_ALIGNMENT_32K 0x40000000
#define EFI_FVB_ALIGNMENT_64K 0x80000000
#define EFI_FVB_ALIGNMENT_CAP 0x00008000
#define EFI_FVB_ALIGNMENT_2 0x00010000
#define EFI_FVB_ALIGNMENT_4 0x00020000
#define EFI_FVB_ALIGNMENT_8 0x00040000
#define EFI_FVB_ALIGNMENT_16 0x00080000
#define EFI_FVB_ALIGNMENT_32 0x00100000
#define EFI_FVB_ALIGNMENT_64 0x00200000
#define EFI_FVB_ALIGNMENT_128 0x00400000
#define EFI_FVB_ALIGNMENT_256 0x00800000
#define EFI_FVB_ALIGNMENT_512 0x01000000
#define EFI_FVB_ALIGNMENT_1K 0x02000000
#define EFI_FVB_ALIGNMENT_2K 0x04000000
#define EFI_FVB_ALIGNMENT_4K 0x08000000
#define EFI_FVB_ALIGNMENT_8K 0x10000000
#define EFI_FVB_ALIGNMENT_16K 0x20000000
#define EFI_FVB_ALIGNMENT_32K 0x40000000
#define EFI_FVB_ALIGNMENT_64K 0x80000000
///@}
/// This is a simple macro defined as the set of all FV Block Attributes signifying capabilities.
@@ -68,12 +68,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
* @param Bit A value indicating the bit(s) to test.
* If multiple bits are set, the logical OR of their tests is the expression's value.
**/
#define EFI_TEST_FFS_ATTRIBUTES_BIT( FvbAttributes, TestAttributes, Bit) \
#define EFI_TEST_FFS_ATTRIBUTES_BIT(FvbAttributes, TestAttributes, Bit) \
((BOOLEAN) \
((FvbAttributes & EFI_FVB_ERASE_POLARITY) ? (((~TestAttributes) & Bit) == Bit) : ((TestAttributes & Bit) == Bit)) \
)
/// A simple macro defined as the set of all FV Block Attribute bits that indicate status.
#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
#endif /* __EFI_FIRMWARE_VOLUME_HEADER_H__ */
#endif /* __EFI_FIRMWARE_VOLUME_HEADER_H__ */

View File

@@ -17,16 +17,16 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Bit values for AuthenticationStatus
//
#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
#endif

View File

@@ -14,72 +14,72 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
#define __FRAMEWORK_INTERNAL_FORMREPRESENTATION_H__
typedef UINT16 STRING_REF;
typedef UINT16 STRING_REF;
//
// IFR Op codes
//
#define FRAMEWORK_EFI_IFR_FORM_OP 0x01
#define FRAMEWORK_EFI_IFR_SUBTITLE_OP 0x02
#define FRAMEWORK_EFI_IFR_TEXT_OP 0x03
#define EFI_IFR_GRAPHIC_OP 0x04
#define FRAMEWORK_EFI_IFR_ONE_OF_OP 0x05
#define FRAMEWORK_EFI_IFR_CHECKBOX_OP 0x06
#define FRAMEWORK_EFI_IFR_NUMERIC_OP 0x07
#define FRAMEWORK_EFI_IFR_PASSWORD_OP 0x08
#define FRAMEWORK_EFI_IFR_ONE_OF_OPTION_OP 0x09 ///< ONEOF OPTION field.
#define FRAMEWORK_EFI_IFR_SUPPRESS_IF_OP 0x0A
#define EFI_IFR_END_FORM_OP 0x0B
#define EFI_IFR_HIDDEN_OP 0x0C
#define EFI_IFR_END_FORM_SET_OP 0x0D
#define FRAMEWORK_EFI_IFR_FORM_SET_OP 0x0E
#define FRAMEWORK_EFI_IFR_REF_OP 0x0F
#define EFI_IFR_END_ONE_OF_OP 0x10
#define FRAMEWORK_EFI_IFR_END_OP EFI_IFR_END_ONE_OF_OP
#define FRAMEWORK_EFI_IFR_INCONSISTENT_IF_OP 0x11
#define FRAMEWORK_EFI_IFR_EQ_ID_VAL_OP 0x12
#define FRAMEWORK_EFI_IFR_EQ_ID_ID_OP 0x13
#define FRAMEWORK_EFI_IFR_EQ_ID_LIST_OP 0x14
#define FRAMEWORK_EFI_IFR_AND_OP 0x15
#define FRAMEWORK_EFI_IFR_OR_OP 0x16
#define FRAMEWORK_EFI_IFR_NOT_OP 0x17
#define EFI_IFR_END_IF_OP 0x18 ///< For endif of inconsistentif, suppressif, grayoutif.
#define EFI_IFR_GRAYOUT_IF_OP 0x19
#define FRAMEWORK_EFI_IFR_DATE_OP 0x1A
#define FRAMEWORK_EFI_IFR_TIME_OP 0x1B
#define FRAMEWORK_EFI_IFR_STRING_OP 0x1C
#define EFI_IFR_LABEL_OP 0x1D
#define EFI_IFR_SAVE_DEFAULTS_OP 0x1E
#define EFI_IFR_RESTORE_DEFAULTS_OP 0x1F
#define EFI_IFR_BANNER_OP 0x20
#define EFI_IFR_INVENTORY_OP 0x21
#define EFI_IFR_EQ_VAR_VAL_OP 0x22
#define FRAMEWORK_EFI_IFR_ORDERED_LIST_OP 0x23
#define FRAMEWORK_EFI_IFR_VARSTORE_OP 0x24
#define EFI_IFR_VARSTORE_SELECT_OP 0x25
#define EFI_IFR_VARSTORE_SELECT_PAIR_OP 0x26
#define EFI_IFR_LAST_OPCODE EFI_IFR_VARSTORE_SELECT_PAIR_OP
#define EFI_IFR_OEM_OP 0xFE
#define EFI_IFR_NV_ACCESS_COMMAND 0xFF
#define FRAMEWORK_EFI_IFR_FORM_OP 0x01
#define FRAMEWORK_EFI_IFR_SUBTITLE_OP 0x02
#define FRAMEWORK_EFI_IFR_TEXT_OP 0x03
#define EFI_IFR_GRAPHIC_OP 0x04
#define FRAMEWORK_EFI_IFR_ONE_OF_OP 0x05
#define FRAMEWORK_EFI_IFR_CHECKBOX_OP 0x06
#define FRAMEWORK_EFI_IFR_NUMERIC_OP 0x07
#define FRAMEWORK_EFI_IFR_PASSWORD_OP 0x08
#define FRAMEWORK_EFI_IFR_ONE_OF_OPTION_OP 0x09 ///< ONEOF OPTION field.
#define FRAMEWORK_EFI_IFR_SUPPRESS_IF_OP 0x0A
#define EFI_IFR_END_FORM_OP 0x0B
#define EFI_IFR_HIDDEN_OP 0x0C
#define EFI_IFR_END_FORM_SET_OP 0x0D
#define FRAMEWORK_EFI_IFR_FORM_SET_OP 0x0E
#define FRAMEWORK_EFI_IFR_REF_OP 0x0F
#define EFI_IFR_END_ONE_OF_OP 0x10
#define FRAMEWORK_EFI_IFR_END_OP EFI_IFR_END_ONE_OF_OP
#define FRAMEWORK_EFI_IFR_INCONSISTENT_IF_OP 0x11
#define FRAMEWORK_EFI_IFR_EQ_ID_VAL_OP 0x12
#define FRAMEWORK_EFI_IFR_EQ_ID_ID_OP 0x13
#define FRAMEWORK_EFI_IFR_EQ_ID_LIST_OP 0x14
#define FRAMEWORK_EFI_IFR_AND_OP 0x15
#define FRAMEWORK_EFI_IFR_OR_OP 0x16
#define FRAMEWORK_EFI_IFR_NOT_OP 0x17
#define EFI_IFR_END_IF_OP 0x18 ///< For endif of inconsistentif, suppressif, grayoutif.
#define EFI_IFR_GRAYOUT_IF_OP 0x19
#define FRAMEWORK_EFI_IFR_DATE_OP 0x1A
#define FRAMEWORK_EFI_IFR_TIME_OP 0x1B
#define FRAMEWORK_EFI_IFR_STRING_OP 0x1C
#define EFI_IFR_LABEL_OP 0x1D
#define EFI_IFR_SAVE_DEFAULTS_OP 0x1E
#define EFI_IFR_RESTORE_DEFAULTS_OP 0x1F
#define EFI_IFR_BANNER_OP 0x20
#define EFI_IFR_INVENTORY_OP 0x21
#define EFI_IFR_EQ_VAR_VAL_OP 0x22
#define FRAMEWORK_EFI_IFR_ORDERED_LIST_OP 0x23
#define FRAMEWORK_EFI_IFR_VARSTORE_OP 0x24
#define EFI_IFR_VARSTORE_SELECT_OP 0x25
#define EFI_IFR_VARSTORE_SELECT_PAIR_OP 0x26
#define EFI_IFR_LAST_OPCODE EFI_IFR_VARSTORE_SELECT_PAIR_OP
#define EFI_IFR_OEM_OP 0xFE
#define EFI_IFR_NV_ACCESS_COMMAND 0xFF
//
// Define values for the flags fields in some VFR opcodes. These are
// bitmasks.
//
#define EFI_IFR_FLAG_DEFAULT 0x01
#define EFI_IFR_FLAG_MANUFACTURING 0x02
#define EFI_IFR_FLAG_INTERACTIVE 0x04
#define EFI_IFR_FLAG_NV_ACCESS 0x08
#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
#define EFI_IFR_FLAG_LATE_CHECK 0x20
#define EFI_IFR_FLAG_DEFAULT 0x01
#define EFI_IFR_FLAG_MANUFACTURING 0x02
#define EFI_IFR_FLAG_INTERACTIVE 0x04
#define EFI_IFR_FLAG_NV_ACCESS 0x08
#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
#define EFI_IFR_FLAG_LATE_CHECK 0x20
#define EFI_NON_DEVICE_CLASS 0x00 ///< Useful when you do not want something in the Device Manager.
#define EFI_DISK_DEVICE_CLASS 0x01
#define EFI_VIDEO_DEVICE_CLASS 0x02
#define EFI_NETWORK_DEVICE_CLASS 0x04
#define EFI_INPUT_DEVICE_CLASS 0x08
#define EFI_ON_BOARD_DEVICE_CLASS 0x10
#define EFI_OTHER_DEVICE_CLASS 0x20
#define EFI_NON_DEVICE_CLASS 0x00 ///< Useful when you do not want something in the Device Manager.
#define EFI_DISK_DEVICE_CLASS 0x01
#define EFI_VIDEO_DEVICE_CLASS 0x02
#define EFI_NETWORK_DEVICE_CLASS 0x04
#define EFI_INPUT_DEVICE_CLASS 0x08
#define EFI_ON_BOARD_DEVICE_CLASS 0x10
#define EFI_OTHER_DEVICE_CLASS 0x20
#define EFI_SETUP_APPLICATION_SUBCLASS 0x00
#define EFI_GENERAL_APPLICATION_SUBCLASS 0x01
@@ -96,70 +96,69 @@ typedef UINT16 STRING_REF;
///
#define EFI_IFR_FLAG_CREATED 128
#pragma pack(1)
//
// IFR Structure definitions
//
typedef struct {
UINT8 OpCode;
UINT8 Length;
UINT8 OpCode;
UINT8 Length;
} FRAMEWORK_EFI_IFR_OP_HEADER;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid;
STRING_REF FormSetTitle;
STRING_REF Help;
EFI_PHYSICAL_ADDRESS CallbackHandle;
UINT16 Class;
UINT16 SubClass;
UINT16 NvDataSize; ///< Set once; the size of the NV data as defined in the script.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid;
STRING_REF FormSetTitle;
STRING_REF Help;
EFI_PHYSICAL_ADDRESS CallbackHandle;
UINT16 Class;
UINT16 SubClass;
UINT16 NvDataSize; ///< Set once; the size of the NV data as defined in the script.
} FRAMEWORK_EFI_IFR_FORM_SET;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF FormTitle;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF FormTitle;
} FRAMEWORK_EFI_IFR_FORM;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 LabelId;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 LabelId;
} EFI_IFR_LABEL;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF SubTitle;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF SubTitle;
} FRAMEWORK_EFI_IFR_SUBTITLE;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo;
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo;
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_TEXT;
//
// goto
//
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to the caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_REF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_FORM;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_FORM_SET;
//
@@ -167,51 +166,51 @@ typedef struct {
// code assumes this to be true, if this ever changes we need to revisit the InitializeTagStructures code
//
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
} FRAMEWORK_EFI_IFR_ONE_OF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset in NV for storage of the data.
UINT8 MaxEntries; ///< The maximum number of options in the ordered list (=size of NVStore).
STRING_REF Prompt; ///< The string token for the prompt.
STRING_REF Help; ///< The string token for the context-help.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset in NV for storage of the data.
UINT8 MaxEntries; ///< The maximum number of options in the ordered list (=size of NVStore).
STRING_REF Prompt; ///< The string token for the prompt.
STRING_REF Help; ///< The string token for the context-help.
} FRAMEWORK_EFI_IFR_ORDERED_LIST;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_CHECKBOX, EFI_IFR_CHECK_BOX;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Option; ///< The string token describing the option.
UINT16 Value; ///< The value associated with this option that is stored in the NVRAM.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Option; ///< The string token describing the option.
UINT16 Value; ///< The value associated with this option that is stored in the NVRAM.
UINT8 Flags; ///< If non-zero, it means that it is the default option.
UINT16 Key; ///< Value to be passed to caller to identify this particular op-code.
} FRAMEWORK_EFI_IFR_ONE_OF_OPTION;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT16 Minimum;
UINT16 Maximum;
UINT16 Step; ///< Zero means manual input. Otherwise, arrow selection is called for.
UINT16 Default;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT16 Minimum;
UINT16 Maximum;
UINT16 Step; ///< Zero means manual input. Otherwise, arrow selection is called for.
UINT16 Default;
} FRAMEWORK_EFI_IFR_NUMERIC;
//
@@ -223,50 +222,50 @@ typedef struct {
// gRT->GetXXXX series of calls.
//
typedef struct {
FRAMEWORK_EFI_IFR_NUMERIC Hour;
FRAMEWORK_EFI_IFR_NUMERIC Minute;
FRAMEWORK_EFI_IFR_NUMERIC Second;
FRAMEWORK_EFI_IFR_NUMERIC Hour;
FRAMEWORK_EFI_IFR_NUMERIC Minute;
FRAMEWORK_EFI_IFR_NUMERIC Second;
} FRAMEWORK_EFI_IFR_TIME;
typedef struct {
FRAMEWORK_EFI_IFR_NUMERIC Year;
FRAMEWORK_EFI_IFR_NUMERIC Month;
FRAMEWORK_EFI_IFR_NUMERIC Day;
FRAMEWORK_EFI_IFR_NUMERIC Year;
FRAMEWORK_EFI_IFR_NUMERIC Month;
FRAMEWORK_EFI_IFR_NUMERIC Day;
} FRAMEWORK_EFI_IFR_DATE;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId;///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
UINT16 Encoding;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
UINT16 Encoding;
} FRAMEWORK_EFI_IFR_PASSWORD;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The ID designating what the question is about...
UINT8 Width; ///< The Size of the Data being saved.
STRING_REF Prompt; ///< The String Token for the Prompt.
STRING_REF Help; ///< The string Token for the context-help.
UINT8 Flags; ///< This is included solely for purposes of interactive/dynamic support.
UINT16 Key; ///< The value to be passed to caller to identify this particular op-code.
UINT8 MinSize; ///< Minimum allowable sized password.
UINT8 MaxSize; ///< Maximum allowable sized password.
} FRAMEWORK_EFI_IFR_STRING;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_ONE_OF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 Value;
UINT16 Key;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 Value;
UINT16 Key;
} EFI_IFR_HIDDEN;
///
@@ -275,92 +274,92 @@ typedef struct {
/// keep the inconsistant is for implementation needed.
///@{
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
} EFI_IFR_SUPPRESS;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT8 Flags;
} EFI_IFR_GRAY_OUT;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Popup;
UINT8 Flags;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Popup;
UINT8 Flags;
} EFI_IFR_INCONSISTENT;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 Value; ///< The value to compare against.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 Value; ///< The value to compare against.
} FRAMEWORK_EFI_IFR_EQ_ID_VAL;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 ListLength;
UINT16 ValueList[1];
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId; ///< The offset into variable storage.
UINT8 Width; ///< The size of variable storage.
UINT16 ListLength;
UINT16 ValueList[1];
} FRAMEWORK_EFI_IFR_EQ_ID_LIST;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId1; ///< The offset into variable storage for first value to compare.
UINT8 Width; ///< The size of variable storage (must be same for both).
UINT16 QuestionId2; ///< The offset into variable storage for second value to compare.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 QuestionId1; ///< The offset into variable storage for first value to compare.
UINT8 Width; ///< The size of variable storage (must be same for both).
UINT16 QuestionId2; ///< The offset into variable storage for second value to compare.
} FRAMEWORK_EFI_IFR_EQ_ID_ID;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VariableId; ///< The offset into variable storage.
UINT16 Value; ///< The value to compare against.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VariableId; ///< The offset into variable storage.
UINT16 Value; ///< The value to compare against.
} EFI_IFR_EQ_VAR_VAL;
///@}
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} FRAMEWORK_EFI_IFR_AND;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} FRAMEWORK_EFI_IFR_OR;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} FRAMEWORK_EFI_IFR_NOT;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
} EFI_IFR_END_EXPR, EFI_IFR_END_IF;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help;
UINT8 Flags;
UINT16 Key;
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 FormId;
STRING_REF Prompt;
STRING_REF Help;
UINT8 Flags;
UINT16 Key;
} EFI_IFR_SAVE_DEFAULTS;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo; ///< Optional text.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Help;
STRING_REF Text;
STRING_REF TextTwo; ///< Optional text.
} EFI_IFR_INVENTORY;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid; ///< GUID for the variable.
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 Size; ///< The size of the variable storage.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
EFI_GUID Guid; ///< GUID for the variable.
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 Size; ///< The size of the variable storage.
} FRAMEWORK_EFI_IFR_VARSTORE;
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
} EFI_IFR_VARSTORE_SELECT;
///
@@ -370,9 +369,9 @@ typedef struct {
/// IFR opcodes use the VarId as defined here.
///
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 SecondaryVarId; ///< The variable store ID, as referenced elsewhere in the form.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
UINT16 VarId; ///< The variable store ID, as referenced elsewhere in the form.
UINT16 SecondaryVarId; ///< The variable store ID, as referenced elsewhere in the form.
} EFI_IFR_VARSTORE_SELECT_PAIR;
///
@@ -381,16 +380,16 @@ typedef struct {
#define EFI_IFR_RESTORE_DEFAULTS EFI_IFR_SAVE_DEFAULTS
typedef struct {
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Title; ///< The string token for the banner title.
UINT16 LineNumber; ///< 1-based line number.
UINT8 Alignment; ///< Left, center, or right-aligned.
FRAMEWORK_EFI_IFR_OP_HEADER Header;
STRING_REF Title; ///< The string token for the banner title.
UINT16 LineNumber; ///< 1-based line number.
UINT8 Alignment; ///< Left, center, or right-aligned.
} EFI_IFR_BANNER;
#define EFI_IFR_BANNER_ALIGN_LEFT 0
#define EFI_IFR_BANNER_ALIGN_CENTER 1
#define EFI_IFR_BANNER_ALIGN_RIGHT 2
#define EFI_IFR_BANNER_TIMEOUT 0xFF
#define EFI_IFR_BANNER_ALIGN_LEFT 0
#define EFI_IFR_BANNER_ALIGN_CENTER 1
#define EFI_IFR_BANNER_ALIGN_RIGHT 2
#define EFI_IFR_BANNER_TIMEOUT 0xFF
#pragma pack()

View File

@@ -17,12 +17,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// This macro is defined to comply with the hob Framework Spec. And the marco was
/// retired in the PI1.0 specification.
///
#define EFI_HOB_TYPE_CV 0x0008
#define EFI_HOB_TYPE_CV 0x0008
typedef struct {
EFI_HOB_GENERIC_HEADER Header;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINT64 Length;
EFI_HOB_GENERIC_HEADER Header;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINT64 Length;
} EFI_HOB_CAPSULE_VOLUME;
#endif

View File

@@ -26,8 +26,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
///@}
///
@@ -37,12 +37,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
///@}
///
@@ -51,7 +51,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// Inconsistent with specification here:
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
///
/// Software Class X64 Exception Subclass Error Code definitions.
@@ -62,31 +62,31 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
///@}
///
/// Software Class EFI After Life Subclass Progress Code definitions.
///
///@{
#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
///@}
///
@@ -95,7 +95,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// Inconsistent with specification here:
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
///
/// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
@@ -130,7 +130,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
/// The Framework Specification, StatusCodes 0.92, does not define the macros.
///
///@{
#define EFI_CPU_CAUSE_NOT_DISABLED 0x0000
#define EFI_CPU_CAUSE_NOT_DISABLED 0x0000
///@}
///

View File

@@ -24,6 +24,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
0x2e3044ac, 0x879f, 0x490f, {0x97, 0x60, 0xbb, 0xdf, 0xaf, 0x69, 0x5f, 0x50 } \
}
extern EFI_GUID gEfiLegacyBiosGuid;
extern EFI_GUID gEfiLegacyBiosGuid;
#endif

View File

@@ -23,17 +23,17 @@ typedef UINT8 BBS_TYPE;
#pragma pack(1)
typedef struct {
BBS_TYPE BbsType;
BBS_TYPE BbsType;
///
/// Length = sizeof (UINT16) + sizeof (Data)
///
UINT16 Length;
UINT16 Data[1];
UINT16 Length;
UINT16 Data[1];
} LEGACY_DEV_ORDER_ENTRY;
#pragma pack()
#define VAR_LEGACY_DEV_ORDER L"LegacyDevOrder"
#define VAR_LEGACY_DEV_ORDER L"LegacyDevOrder"
extern EFI_GUID gEfiLegacyDevOrderVariableGuid;
extern EFI_GUID gEfiLegacyDevOrderVariableGuid;
#endif

View File

@@ -19,7 +19,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _FIRMWARE_VOLUME_H_
#define _FIRMWARE_VOLUME_H_
//
// Firmware Volume Protocol GUID definition
//
@@ -28,49 +27,49 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xCD, 0x81, 0x54, 0xBD, 0x27, 0xF8 } \
}
#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
#define FV_DEVICE_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', '_')
typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
//
// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
//
typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
typedef UINT64 FRAMEWORK_EFI_FV_ATTRIBUTES;
//
// ************************************************************
// FRAMEWORK_EFI_FV_ATTRIBUTES bit definitions
// ************************************************************
//
#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
#define EFI_FV_READ_STATUS 0x0000000000000004ULL
#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
#define EFI_FV_READ_STATUS 0x0000000000000004ULL
#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
#define EFI_FV_LOCK_CAP 0x0000000000000040ULL
#define EFI_FV_LOCK_STATUS 0x0000000000000080ULL
#define EFI_FV_WRITE_POLICY_RELIABLE 0x0000000000000100ULL
#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
//
// Protocol API definitions
@@ -210,17 +209,17 @@ EFI_STATUS
OUT UINT32 *AuthenticationStatus
);
typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
typedef UINT32 FRAMEWORK_EFI_FV_WRITE_POLICY;
#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
#define FRAMEWORK_EFI_FV_UNRELIABLE_WRITE 0x00000000
#define FRAMEWORK_EFI_FV_RELIABLE_WRITE 0x00000001
typedef struct {
EFI_GUID *NameGuid;
EFI_FV_FILETYPE Type;
EFI_FV_FILE_ATTRIBUTES FileAttributes;
VOID *Buffer;
UINT32 BufferSize;
EFI_GUID *NameGuid;
EFI_FV_FILETYPE Type;
EFI_FV_FILE_ATTRIBUTES FileAttributes;
VOID *Buffer;
UINT32 BufferSize;
} FRAMEWORK_EFI_FV_WRITE_FILE_DATA;
/**
@@ -296,45 +295,45 @@ struct _EFI_FIRMWARE_VOLUME_PROTOCOL {
///
/// Retrieves volume capabilities and current settings.
///
FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
FRAMEWORK_EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
///
/// Modifies the current settings of the firmware volume.
///
FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
FRAMEWORK_EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
///
/// Reads an entire file from the firmware volume.
///
FRAMEWORK_EFI_FV_READ_FILE ReadFile;
FRAMEWORK_EFI_FV_READ_FILE ReadFile;
///
/// Reads a single section from a file into a buffer.
///
FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
FRAMEWORK_EFI_FV_READ_SECTION ReadSection;
///
/// Writes an entire file into the firmware volume.
///
FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
FRAMEWORK_EFI_FV_WRITE_FILE WriteFile;
///
/// Provides service to allow searching the firmware volume.
///
FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
FRAMEWORK_EFI_FV_GET_NEXT_FILE GetNextFile;
///
/// Data field that indicates the size in bytes of the Key input buffer for
/// the GetNextFile() API.
///
UINT32 KeySize;
UINT32 KeySize;
///
/// Handle of the parent firmware volume.
///
EFI_HANDLE ParentHandle;
EFI_HANDLE ParentHandle;
};
extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
#endif

View File

@@ -49,20 +49,20 @@ typedef struct _EFI_ISA_ACPI_PROTOCOL EFI_ISA_ACPI_PROTOCOL;
///
/// ISA ACPI Protocol MMIO resource attributes
///
#define EFI_ISA_ACPI_MEMORY_WIDTH_MASK 0x03 ///< Bit mask of supported ISA memory width attributes.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT 0x00 ///< ISA MMIO region only supports 8-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_16_BIT 0x01 ///< ISA MMIO region only supports 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT_AND_16_BIT 0x02 ///< ISA MMIO region supports both 8-bit and 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WRITEABLE 0x04 ///< ISA MMIO region supports write transactions.
#define EFI_ISA_ACPI_MEMORY_CACHEABLE 0x08 ///< ISA MMIO region supports being cached.
#define EFI_ISA_ACPI_MEMORY_SHADOWABLE 0x10 ///< ISA MMIO region may be shadowed.
#define EFI_ISA_ACPI_MEMORY_EXPANSION_ROM 0x20 ///< ISA MMIO region is an expansion ROM.
#define EFI_ISA_ACPI_MEMORY_WIDTH_MASK 0x03 ///< Bit mask of supported ISA memory width attributes.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT 0x00 ///< ISA MMIO region only supports 8-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_16_BIT 0x01 ///< ISA MMIO region only supports 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WIDTH_8_BIT_AND_16_BIT 0x02 ///< ISA MMIO region supports both 8-bit and 16-bit access.
#define EFI_ISA_ACPI_MEMORY_WRITEABLE 0x04 ///< ISA MMIO region supports write transactions.
#define EFI_ISA_ACPI_MEMORY_CACHEABLE 0x08 ///< ISA MMIO region supports being cached.
#define EFI_ISA_ACPI_MEMORY_SHADOWABLE 0x10 ///< ISA MMIO region may be shadowed.
#define EFI_ISA_ACPI_MEMORY_EXPANSION_ROM 0x20 ///< ISA MMIO region is an expansion ROM.
///
/// ISA ACPI Protocol I/O resource attributes
///
#define EFI_ISA_ACPI_IO_DECODE_10_BITS 0x01 ///< ISA controllers uses a 10-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_16_BITS 0x02 ///< ISA controllers uses a 16-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_10_BITS 0x01 ///< ISA controllers uses a 10-bit address decoder for I/O cycles.
#define EFI_ISA_ACPI_IO_DECODE_16_BITS 0x02 ///< ISA controllers uses a 16-bit address decoder for I/O cycles.
///
/// EFI ISA ACPI resource type
@@ -79,26 +79,26 @@ typedef enum {
/// EFI ISA ACPI generic resource structure
///
typedef struct {
EFI_ISA_ACPI_RESOURCE_TYPE Type; ///< The type of resource (I/O, MMIO, DMA, Interrupt).
UINT32 Attribute; ///< Bit mask of attributes associated with this resource. See EFI_ISA_ACPI_xxx macros for valid combinations.
UINT32 StartRange; ///< The start of the resource range.
UINT32 EndRange; ///< The end of the resource range.
EFI_ISA_ACPI_RESOURCE_TYPE Type; ///< The type of resource (I/O, MMIO, DMA, Interrupt).
UINT32 Attribute; ///< Bit mask of attributes associated with this resource. See EFI_ISA_ACPI_xxx macros for valid combinations.
UINT32 StartRange; ///< The start of the resource range.
UINT32 EndRange; ///< The end of the resource range.
} EFI_ISA_ACPI_RESOURCE;
///
/// EFI ISA ACPI resource device identifier
///
typedef struct {
UINT32 HID; ///< The ACPI Hardware Identifier value associated with an ISA controller. Matchs ACPI DSDT contents.
UINT32 UID; ///< The ACPI Unique Identifier value associated with an ISA controller. Matches ACPI DSDT contents.
UINT32 HID; ///< The ACPI Hardware Identifier value associated with an ISA controller. Matchs ACPI DSDT contents.
UINT32 UID; ///< The ACPI Unique Identifier value associated with an ISA controller. Matches ACPI DSDT contents.
} EFI_ISA_ACPI_DEVICE_ID;
///
/// EFI ISA ACPI resource list
///
typedef struct {
EFI_ISA_ACPI_DEVICE_ID Device; ///< The ACPI HID/UID associated with an ISA controller.
EFI_ISA_ACPI_RESOURCE *ResourceItem; ///< A pointer to the list of resources associated with an ISA controller.
EFI_ISA_ACPI_DEVICE_ID Device; ///< The ACPI HID/UID associated with an ISA controller.
EFI_ISA_ACPI_RESOURCE *ResourceItem; ///< A pointer to the list of resources associated with an ISA controller.
} EFI_ISA_ACPI_RESOURCE_LIST;
/**
@@ -283,16 +283,16 @@ EFI_STATUS
/// and assign resources to an ISA controller.
///
struct _EFI_ISA_ACPI_PROTOCOL {
EFI_ISA_ACPI_DEVICE_ENUMERATE DeviceEnumerate;
EFI_ISA_ACPI_SET_DEVICE_POWER SetPower;
EFI_ISA_ACPI_GET_CUR_RESOURCE GetCurResource;
EFI_ISA_ACPI_GET_POS_RESOURCE GetPosResource;
EFI_ISA_ACPI_SET_RESOURCE SetResource;
EFI_ISA_ACPI_ENABLE_DEVICE EnableDevice;
EFI_ISA_ACPI_INIT_DEVICE InitDevice;
EFI_ISA_ACPI_INTERFACE_INIT InterfaceInit;
EFI_ISA_ACPI_DEVICE_ENUMERATE DeviceEnumerate;
EFI_ISA_ACPI_SET_DEVICE_POWER SetPower;
EFI_ISA_ACPI_GET_CUR_RESOURCE GetCurResource;
EFI_ISA_ACPI_GET_POS_RESOURCE GetPosResource;
EFI_ISA_ACPI_SET_RESOURCE SetResource;
EFI_ISA_ACPI_ENABLE_DEVICE EnableDevice;
EFI_ISA_ACPI_INIT_DEVICE InitDevice;
EFI_ISA_ACPI_INTERFACE_INIT InterfaceInit;
};
extern EFI_GUID gEfiIsaAcpiProtocolGuid;
extern EFI_GUID gEfiIsaAcpiProtocolGuid;
#endif

View File

@@ -128,11 +128,11 @@ typedef struct {
///
/// Read from ISA I/O or MMIO space.
///
EFI_ISA_IO_PROTOCOL_IO_MEM Read;
EFI_ISA_IO_PROTOCOL_IO_MEM Read;
///
/// Write to ISA I/O or MMIO space.
///
EFI_ISA_IO_PROTOCOL_IO_MEM Write;
EFI_ISA_IO_PROTOCOL_IO_MEM Write;
} EFI_ISA_IO_PROTOCOL_ACCESS;
/**
@@ -326,31 +326,31 @@ EFI_STATUS
/// ISA_PCI_IO_PROTOCOL instance associated with the ISA controller.
///
struct _EFI_ISA_IO_PROTOCOL {
EFI_ISA_IO_PROTOCOL_ACCESS Mem;
EFI_ISA_IO_PROTOCOL_ACCESS Io;
EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;
EFI_ISA_IO_PROTOCOL_MAP Map;
EFI_ISA_IO_PROTOCOL_UNMAP Unmap;
EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
EFI_ISA_IO_PROTOCOL_FLUSH Flush;
EFI_ISA_IO_PROTOCOL_ACCESS Mem;
EFI_ISA_IO_PROTOCOL_ACCESS Io;
EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;
EFI_ISA_IO_PROTOCOL_MAP Map;
EFI_ISA_IO_PROTOCOL_UNMAP Unmap;
EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
EFI_ISA_IO_PROTOCOL_FLUSH Flush;
///
/// The list of I/O , MMIO, DMA, and Interrupt resources associated with the
/// ISA controller abstracted by this instance of the EFI_ISA_IO_PROTOCOL.
///
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
///
/// The size, in bytes, of the ROM image.
///
UINT32 RomSize;
UINT32 RomSize;
///
/// A pointer to the in memory copy of the ROM image. The ISA Bus Driver is responsible
/// for allocating memory for the ROM image, and copying the contents of the ROM to memory
/// during ISA Bus initialization.
///
VOID *RomImage;
VOID *RomImage;
};
extern EFI_GUID gEfiIsaIoProtocolGuid;
extern EFI_GUID gEfiIsaIoProtocolGuid;
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -66,7 +66,7 @@ typedef enum {
///
/// EFI_UNSUPPORTED The MP table is not supported on this platform.
///
EfiGetPlatformBinaryMpTable = 0,
EfiGetPlatformBinaryMpTable = 0,
///
/// This mode returns a block of data. The content and usage is IBV or OEM defined.
/// OEMs or IBVs normally use this function for nonstandard Compatibility16 runtime soft
@@ -104,7 +104,7 @@ typedef enum {
///
/// EFI_UNSUPPORTED Oem INT is not supported on this platform.
///
EfiGetPlatformBinaryOemIntData = 1,
EfiGetPlatformBinaryOemIntData = 1,
///
/// This mode returns a block of data. The content and usage is IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 16 bit routines. It
@@ -146,57 +146,57 @@ typedef enum {
///
/// EFI_UNSUPPORTED Oem16 is not supported on this platform.
///
EfiGetPlatformBinaryOem16Data = 2,
///
/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
/// exist, into one coherent package that is understandable by the Compatibility16 code.
///
/// Example usage: A legacy mobile BIOS that has a pre existing runtime
/// interface to return the battery status to calling applications.
///
/// This mode is invoked twice. The first invocation has LegacySegment and
/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
///
/// The second invocation has LegacySegment and LegacyOffset set to the location
/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
///
/// Note: There are two generic mechanisms by which this mode can be used.
/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
/// the data into the F0000 or E0000 block in the Compatibility16 code. The
/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
/// be viewed as two UINT16 entries.
/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
/// as a single UINT32 entry as determined by the IBV.
///
/// The function parameters associated with this mode are:
///
/// TableSize Size of data.
///
/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
/// Bit 0 = 1 0xF0000 64 KB block.
/// Bit 1 = 1 0xE0000 64 KB block.
/// Multiple bits can be set.
///
/// Alignment Bit mapped address alignment granularity.
/// The first nonzero bit from the right is the address granularity.
///
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
///
/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
///
/// The return values associated with this mode are:
/// EFI_SUCCESS The data was returned successfully.
/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
///
EfiGetPlatformBinaryOem32Data = 3,
EfiGetPlatformBinaryOem16Data = 2,
///
/// This mode returns a block of data. The content and usage are IBV defined. OEMs or
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It
/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they
/// exist, into one coherent package that is understandable by the Compatibility16 code.
///
/// Example usage: A legacy mobile BIOS that has a pre existing runtime
/// interface to return the battery status to calling applications.
///
/// This mode is invoked twice. The first invocation has LegacySegment and
/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.
///
/// The second invocation has LegacySegment and LegacyOffset set to the location
/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second
/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.
/// The caller, not EfiGetPlatformBinaryOem32Data, copies the modified table to
/// the allocated region in 0xF0000 or 0xE0000 block after the second invocation..
///
/// Note: There are two generic mechanisms by which this mode can be used.
/// Mechanism 1: This mode returns the data and the Legacy BIOS Protocol copies
/// the data into the F0000 or E0000 block in the Compatibility16 code. The
/// EFI_COMPATIBILITY16_TABLE entries Oem32Segment and Oem32Offset can
/// be viewed as two UINT16 entries.
/// Mechanism 2: This mode directly fills in the EFI_COMPATIBILITY16_TABLE with
/// a pointer to the INT15 E820 region containing the 32 bit code. It returns
/// EFI_UNSUPPORTED. The EFI_COMPATIBILITY16_TABLE entries,
/// Oem32Segment and Oem32Offset, can be viewed as two UINT16 entries or
/// as a single UINT32 entry as determined by the IBV.
///
/// The function parameters associated with this mode are:
///
/// TableSize Size of data.
///
/// Location Location to place the table. 0x00 or 0xE0000 or 0xF0000 64 KB blocks.
/// Bit 0 = 1 0xF0000 64 KB block.
/// Bit 1 = 1 0xE0000 64 KB block.
/// Multiple bits can be set.
///
/// Alignment Bit mapped address alignment granularity.
/// The first nonzero bit from the right is the address granularity.
///
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.
///
/// LegacyOffset Offset in which EfiCompatibility code will place the table or data.
///
/// The return values associated with this mode are:
/// EFI_SUCCESS The data was returned successfully.
/// EFI_UNSUPPORTED Oem32 is not supported on this platform.
///
EfiGetPlatformBinaryOem32Data = 3,
///
/// This mode returns a TPM binary image for the onboard TPM device.
///
@@ -226,7 +226,7 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_NOT_FOUND No BinaryImage was found.
///
EfiGetPlatformBinaryTpmBinary = 4,
EfiGetPlatformBinaryTpmBinary = 4,
///
/// The mode finds the Compatibility16 Rom Image.
///
@@ -250,7 +250,7 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_NOT_FOUND ROM not found.
///
EfiGetPlatformBinarySystemRom = 5,
EfiGetPlatformBinarySystemRom = 5,
///
/// This mode returns the Base address of PciExpress memory mapped configuration
/// address space.
@@ -275,9 +275,9 @@ EfiGetPlatformBinaryOem32Data = 3,
///
/// EFI_UNSUPPORTED System does not PciExpress.
///
EfiGetPlatformPciExpressBase = 6,
EfiGetPlatformPciExpressBase = 6,
///
EfiGetPlatformPmmSize = 7,
EfiGetPlatformPmmSize = 7,
///
EfiGetPlatformEndOpromShadowAddr = 8,
///
@@ -301,7 +301,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformVgaHandle = 0,
EfiGetPlatformVgaHandle = 0,
///
/// This mode returns the Compatibility16 policy for the device that should be the IDE
/// controller used during a Compatibility16 boot.
@@ -317,7 +317,7 @@ typedef enum {
/// AdditionalData Pointer to HddInfo.
/// Information about all onboard IDE controllers.
///
EfiGetPlatformIdeHandle = 1,
EfiGetPlatformIdeHandle = 1,
///
/// This mode returns the Compatibility16 policy for the device that should be the ISA bus
/// controller used during a Compatibility16 boot.
@@ -332,7 +332,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformIsaBusHandle = 2,
EfiGetPlatformIsaBusHandle = 2,
///
/// This mode returns the Compatibility16 policy for the device that should be the USB
/// device used during a Compatibility16 boot.
@@ -347,7 +347,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiGetPlatformUsbHandle = 3
EfiGetPlatformUsbHandle = 3
} EFI_GET_PLATFORM_HANDLE_MODE;
/**
@@ -387,7 +387,7 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiPlatformHookShadowServiceRoms= 1,
EfiPlatformHookShadowServiceRoms = 1,
///
/// This mode allows platform to perform any required operation after an OpROM has
/// completed its initialization.
@@ -404,21 +404,21 @@ typedef enum {
///
/// AdditionalData NULL.
///
EfiPlatformHookAfterRomInit = 2
EfiPlatformHookAfterRomInit = 2
} EFI_GET_PLATFORM_HOOK_MODE;
///
/// This IRQ has not been assigned to PCI.
///
#define PCI_UNUSED 0x00
#define PCI_UNUSED 0x00
///
/// This IRQ has been assigned to PCI.
///
#define PCI_USED 0xFF
#define PCI_USED 0xFF
///
/// This IRQ has been used by an SIO legacy device and cannot be used by PCI.
///
#define LEGACY_USED 0xFE
#define LEGACY_USED 0xFE
#pragma pack(1)
@@ -426,7 +426,7 @@ typedef struct {
///
/// IRQ for this entry.
///
UINT8 Irq;
UINT8 Irq;
///
/// Status of this IRQ.
///
@@ -437,103 +437,101 @@ typedef struct {
/// LEGACY_USED 0xFE. This IRQ has been used by an SIO legacy
/// device and cannot be used by PCI.
///
UINT8 Used;
UINT8 Used;
} EFI_LEGACY_IRQ_PRIORITY_TABLE_ENTRY;
//
// Define PIR table structures
//
#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
#define EFI_LEGACY_PIRQ_TABLE_SIGNATURE SIGNATURE_32 ('$', 'P', 'I', 'R')
typedef struct {
///
/// $PIR.
///
UINT32 Signature;
UINT32 Signature;
///
/// 0x00.
///
UINT8 MinorVersion;
UINT8 MinorVersion;
///
/// 0x01 for table version 1.0.
///
UINT8 MajorVersion;
UINT8 MajorVersion;
///
/// 0x20 + RoutingTableEntries * 0x10.
///
UINT16 TableSize;
UINT16 TableSize;
///
/// PCI interrupt router bus.
///
UINT8 Bus;
UINT8 Bus;
///
/// PCI interrupt router device/function.
///
UINT8 DevFun;
UINT8 DevFun;
///
/// If nonzero, bit map of IRQs reserved for PCI.
///
UINT16 PciOnlyIrq;
UINT16 PciOnlyIrq;
///
/// Vendor ID of a compatible PCI interrupt router.
///
UINT16 CompatibleVid;
UINT16 CompatibleVid;
///
/// Device ID of a compatible PCI interrupt router.
///
UINT16 CompatibleDid;
UINT16 CompatibleDid;
///
/// If nonzero, a value passed directly to the IRQ miniport's Initialize function.
///
UINT32 Miniport;
UINT32 Miniport;
///
/// Reserved for future usage.
///
UINT8 Reserved[11];
UINT8 Reserved[11];
///
/// This byte plus the sum of all other bytes in the LocalPirqTable equal 0x00.
///
UINT8 Checksum;
UINT8 Checksum;
} EFI_LEGACY_PIRQ_TABLE_HEADER;
typedef struct {
///
/// If nonzero, a value assigned by the IBV.
///
UINT8 Pirq;
UINT8 Pirq;
///
/// If nonzero, the IRQs that can be assigned to this device.
///
UINT16 IrqMask;
UINT16 IrqMask;
} EFI_LEGACY_PIRQ_ENTRY;
typedef struct {
///
/// PCI bus of the entry.
///
UINT8 Bus;
UINT8 Bus;
///
/// PCI device of this entry.
///
UINT8 Device;
UINT8 Device;
///
/// An IBV value and IRQ mask for PIRQ pins A through D.
///
EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
EFI_LEGACY_PIRQ_ENTRY PirqEntry[4];
///
/// If nonzero, the slot number assigned by the board manufacturer.
///
UINT8 Slot;
UINT8 Slot;
///
/// Reserved for future use.
///
UINT8 Reserved;
UINT8 Reserved;
} EFI_LEGACY_IRQ_ROUTING_ENTRY;
#pragma pack()
/**
Finds the binary data or other platform information.
@@ -725,31 +723,31 @@ struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL {
///
/// Gets binary data or other platform information.
///
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
///
/// Returns a buffer of all handles matching the requested subfunction.
///
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
///
/// Loads and initializes the traditional BIOS SMM handler.
EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
///
/// Allows platform to perform any required actions after a LegacyBios operation.
///
EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
///
/// Gets $PIR table.
EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
///
/// Translates the given PIRQ to the final value after traversing any PCI bridges.
///
EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
///
/// Final platform function before the system attempts to boot to a traditional OS.
///
EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
};
extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
#endif

View File

@@ -13,7 +13,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_LEGACY_INTERRUPT_H_
#define _EFI_LEGACY_INTERRUPT_H_
#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \
{ \
0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \
@@ -99,24 +98,24 @@ struct _EFI_LEGACY_INTERRUPT_PROTOCOL {
///
/// Gets the number of PIRQs supported.
///
EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
///
/// Gets the PCI bus, device, and function that is associated with this protocol.
///
EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
///
/// Reads the indicated PIRQ register.
///
EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
///
/// Writes to the indicated PIRQ register.
///
EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
};
extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
#endif

View File

@@ -20,7 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// Forward declaration for the EFI_VGA_MINI_PORT_PROTOCOL.
///
typedef struct _EFI_VGA_MINI_PORT_PROTOCOL EFI_VGA_MINI_PORT_PROTOCOL;
typedef struct _EFI_VGA_MINI_PORT_PROTOCOL EFI_VGA_MINI_PORT_PROTOCOL;
/**
Sets the text display mode of a VGA controller.
@@ -49,40 +49,40 @@ EFI_STATUS
);
struct _EFI_VGA_MINI_PORT_PROTOCOL {
EFI_VGA_MINI_PORT_SET_MODE SetMode;
EFI_VGA_MINI_PORT_SET_MODE SetMode;
///
/// MMIO base address of the VGA text mode framebuffer. Typically set to 0xB8000.
///
UINT64 VgaMemoryOffset;
UINT64 VgaMemoryOffset;
///
/// I/O Port address for the VGA CRTC address register. Typically set to 0x3D4.
///
UINT64 CrtcAddressRegisterOffset;
UINT64 CrtcAddressRegisterOffset;
///
/// I/O Port address for the VGA CRTC data register. Typically set to 0x3D5.
///
UINT64 CrtcDataRegisterOffset;
UINT64 CrtcDataRegisterOffset;
///
/// PCI Controller MMIO BAR index of the VGA text mode frame buffer. Typically
/// set to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 VgaMemoryBar;
UINT8 VgaMemoryBar;
///
/// PCI Controller I/O BAR index of the VGA CRTC address register. Typically
/// set to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 CrtcAddressRegisterBar;
UINT8 CrtcAddressRegisterBar;
///
/// PCI Controller I/O BAR index of the VGA CRTC data register. Typically set
/// to EFI_PCI_IO_PASS_THROUGH_BAR
///
UINT8 CrtcDataRegisterBar;
UINT8 CrtcDataRegisterBar;
///
/// The maximum number of text modes that this VGA controller supports.
///
UINT8 MaxMode;
UINT8 MaxMode;
};
extern EFI_GUID gEfiVgaMiniPortProtocolGuid;
extern EFI_GUID gEfiVgaMiniPortProtocolGuid;
#endif

View File

@@ -14,13 +14,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// FLOPPY_NOT_PRESENT = No floppy controller present
// FLOPPY_PRESENT_NO_MEDIA = Floppy controller present but no media inserted
//
#define FLOPPY_NOT_PRESENT 0
#define FLOPPY_PRESENT_WITH_MEDIA 1
#define FLOPPY_PRESENT_NO_MEDIA 2
#define FLOPPY_NOT_PRESENT 0
#define FLOPPY_PRESENT_WITH_MEDIA 1
#define FLOPPY_PRESENT_NO_MEDIA 2
BBS_TABLE *mBbsTable;
BOOLEAN mBbsTableDoneFlag = FALSE;
BOOLEAN IsHaveMediaInFloppy = TRUE;
BBS_TABLE *mBbsTable;
BOOLEAN mBbsTableDoneFlag = FALSE;
BOOLEAN IsHaveMediaInFloppy = TRUE;
/**
Checks the state of the floppy and if media is inserted.
@@ -44,23 +44,23 @@ HasMediaInFloppy (
VOID
)
{
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_BLOCK_IO_PROTOCOL *BlkIo;
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_BLOCK_IO_PROTOCOL *BlkIo;
HandleBuffer = NULL;
HandleCount = 0;
HandleBuffer = NULL;
HandleCount = 0;
gBS->LocateHandleBuffer (
ByProtocol,
&gEfiIsaIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
ByProtocol,
&gEfiIsaIoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
//
// If don't find any ISA/IO protocol assume no floppy. Need for floppy
@@ -76,7 +76,7 @@ HasMediaInFloppy (
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiIsaIoProtocolGuid,
(VOID **) &IsaIo
(VOID **)&IsaIo
);
if (EFI_ERROR (Status)) {
continue;
@@ -85,6 +85,7 @@ HasMediaInFloppy (
if (IsaIo->ResourceList->Device.HID != EISA_PNP_ID (0x604)) {
continue;
}
//
// Update blockio in case the floppy is inserted in during BdsTimeout
//
@@ -103,7 +104,7 @@ HasMediaInFloppy (
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiBlockIoProtocolGuid,
(VOID **) &BlkIo
(VOID **)&BlkIo
);
if (EFI_ERROR (Status)) {
continue;
@@ -121,10 +122,8 @@ HasMediaInFloppy (
FreePool (HandleBuffer);
return FLOPPY_NOT_PRESENT;
}
/**
Complete build of BBS TABLE.
@@ -136,8 +135,8 @@ HasMediaInFloppy (
**/
EFI_STATUS
LegacyBiosBuildBbs (
IN LEGACY_BIOS_INSTANCE *Private,
IN BBS_TABLE *BbsTable
IN LEGACY_BIOS_INSTANCE *Private,
IN BBS_TABLE *BbsTable
)
{
UINTN BbsIndex;
@@ -172,18 +171,18 @@ LegacyBiosBuildBbs (
}
}
BbsTable[0].Bus = 0xff;
BbsTable[0].Device = 0xff;
BbsTable[0].Function = 0xff;
BbsTable[0].DeviceType = BBS_FLOPPY;
BbsTable[0].Class = 01;
BbsTable[0].SubClass = 02;
BbsTable[0].StatusFlags.OldPosition = 0;
BbsTable[0].StatusFlags.Reserved1 = 0;
BbsTable[0].StatusFlags.Enabled = 0;
BbsTable[0].StatusFlags.Failed = 0;
BbsTable[0].StatusFlags.MediaPresent = 0;
BbsTable[0].StatusFlags.Reserved2 = 0;
BbsTable[0].Bus = 0xff;
BbsTable[0].Device = 0xff;
BbsTable[0].Function = 0xff;
BbsTable[0].DeviceType = BBS_FLOPPY;
BbsTable[0].Class = 01;
BbsTable[0].SubClass = 02;
BbsTable[0].StatusFlags.OldPosition = 0;
BbsTable[0].StatusFlags.Reserved1 = 0;
BbsTable[0].StatusFlags.Enabled = 0;
BbsTable[0].StatusFlags.Failed = 0;
BbsTable[0].StatusFlags.MediaPresent = 0;
BbsTable[0].StatusFlags.Reserved2 = 0;
//
// Onboard HDD - Note Each HDD controller controls 2 drives
@@ -196,10 +195,8 @@ LegacyBiosBuildBbs (
LegacyBiosBuildIdeData (Private, &HddInfo, 0);
for (HddIndex = 0; HddIndex < MAX_IDE_CONTROLLER; HddIndex++) {
BbsIndex = HddIndex * 2 + 1;
for (Index = 0; Index < 2; ++Index) {
BbsTable[BbsIndex + Index].Bus = HddInfo[HddIndex].Bus;
BbsTable[BbsIndex + Index].Device = HddInfo[HddIndex].Device;
BbsTable[BbsIndex + Index].Function = HddInfo[HddIndex].Function;
@@ -286,7 +283,7 @@ LegacyBiosBuildBbs (
Status = gBS->HandleProtocol (
BlockIoHandles[BlockIndex],
&gEfiBlockIoProtocolGuid,
(VOID **) &BlkIo
(VOID **)&BlkIo
);
if (EFI_ERROR (Status)) {
@@ -313,7 +310,7 @@ LegacyBiosBuildBbs (
Status = gBS->HandleProtocol (
BlockIoHandles[BlockIndex],
&gEfiDevicePathProtocolGuid,
(VOID **) &DevicePath
(VOID **)&DevicePath
);
if (EFI_ERROR (Status)) {
continue;
@@ -324,14 +321,17 @@ LegacyBiosBuildBbs (
//
DevicePathNode = DevicePath;
while (!IsDevicePathEnd (DevicePathNode)) {
if (DevicePathType (DevicePathNode) == MESSAGING_DEVICE_PATH &&
DevicePathSubType (DevicePathNode) == MSG_ATAPI_DP) {
if ((DevicePathType (DevicePathNode) == MESSAGING_DEVICE_PATH) &&
(DevicePathSubType (DevicePathNode) == MSG_ATAPI_DP))
{
break;
}
DevicePathNode = NextDevicePathNode (DevicePathNode);
}
if (!IsDevicePathEnd (DevicePathNode)) {
continue;
continue;
}
//
@@ -349,7 +349,7 @@ LegacyBiosBuildBbs (
Status = gBS->HandleProtocol (
PciHandle,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo
(VOID **)&PciIo
);
if (EFI_ERROR (Status)) {
continue;
@@ -367,13 +367,21 @@ LegacyBiosBuildBbs (
}
if (SegNum != 0) {
DEBUG ((DEBUG_WARN, "CSM cannot use PCI devices in segment %Lu\n",
(UINT64) SegNum));
DEBUG ((
DEBUG_WARN,
"CSM cannot use PCI devices in segment %Lu\n",
(UINT64)SegNum
));
continue;
}
DEBUG ((DEBUG_INFO, "Add Legacy Bbs entry for PCI %d/%d/%d\n",
BusNum, DevNum, FuncNum));
DEBUG ((
DEBUG_INFO,
"Add Legacy Bbs entry for PCI %d/%d/%d\n",
BusNum,
DevNum,
FuncNum
));
BbsTable[BbsIndex].Bus = BusNum;
BbsTable[BbsIndex].Device = DevNum;
@@ -403,7 +411,6 @@ LegacyBiosBuildBbs (
return EFI_SUCCESS;
}
/**
Get all BBS info
@@ -421,30 +428,30 @@ LegacyBiosBuildBbs (
EFI_STATUS
EFIAPI
LegacyBiosGetBbsInfo (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
OUT UINT16 *HddCount,
OUT HDD_INFO **HddInfo,
OUT UINT16 *BbsCount,
OUT BBS_TABLE **BbsTable
IN EFI_LEGACY_BIOS_PROTOCOL *This,
OUT UINT16 *HddCount,
OUT HDD_INFO **HddInfo,
OUT UINT16 *BbsCount,
OUT BBS_TABLE **BbsTable
)
{
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
// HDD_INFO *LocalHddInfo;
// IN BBS_TABLE *LocalBbsTable;
UINTN NumHandles;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN TempData;
UINT32 Granularity;
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
// HDD_INFO *LocalHddInfo;
// IN BBS_TABLE *LocalBbsTable;
UINTN NumHandles;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN TempData;
UINT32 Granularity;
HandleBuffer = NULL;
HandleBuffer = NULL;
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
EfiToLegacy16BootTable = &Private->IntThunk->EfiToLegacy16BootTable;
// LocalHddInfo = EfiToLegacy16BootTable->HddInfo;
// LocalBbsTable = (BBS_TABLE*)(UINTN)EfiToLegacy16BootTable->BbsTable;
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
EfiToLegacy16BootTable = &Private->IntThunk->EfiToLegacy16BootTable;
// LocalHddInfo = EfiToLegacy16BootTable->HddInfo;
// LocalBbsTable = (BBS_TABLE*)(UINTN)EfiToLegacy16BootTable->BbsTable;
if (!mBbsTableDoneFlag) {
mBbsTable = Private->BbsTablePtr;
@@ -457,12 +464,12 @@ LegacyBiosGetBbsInfo (
// Get PciRootBridgeIO protocol
//
gBS->LocateHandleBuffer (
ByProtocol,
&gEfiPciRootBridgeIoProtocolGuid,
NULL,
&NumHandles,
&HandleBuffer
);
ByProtocol,
&gEfiPciRootBridgeIoProtocolGuid,
NULL,
&NumHandles,
&HandleBuffer
);
if (NumHandles == 0) {
return EFI_NOT_FOUND;
@@ -475,7 +482,6 @@ LegacyBiosGetBbsInfo (
// PCI bus driver enumerate all subsequent handles
//
gBS->ConnectController (HandleBuffer[Index], NULL, NULL, FALSE);
}
LegacyBiosBuildBbs (Private, mBbsTable);
@@ -491,18 +497,18 @@ LegacyBiosGetBbsInfo (
//
// Pass in handoff data
//
TempData = (UINTN) EfiToLegacy16BootTable;
Regs.X.ES = NORMALIZE_EFI_SEGMENT ((UINT32) TempData);
Regs.X.BX = NORMALIZE_EFI_OFFSET ((UINT32) TempData);
TempData = (UINTN)EfiToLegacy16BootTable;
Regs.X.ES = NORMALIZE_EFI_SEGMENT ((UINT32)TempData);
Regs.X.BX = NORMALIZE_EFI_OFFSET ((UINT32)TempData);
Private->LegacyBios.FarCall86 (
This,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
This,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
Private->Cpu->FlushDataCache (Private->Cpu, 0xE0000, 0x20000, EfiCpuFlushTypeWriteBackInvalidate);
Private->LegacyRegion->Lock (Private->LegacyRegion, 0xe0000, 0x20000, &Granularity);
@@ -518,7 +524,7 @@ LegacyBiosGetBbsInfo (
*HddCount = MAX_IDE_CONTROLLER;
*HddInfo = EfiToLegacy16BootTable->HddInfo;
*BbsTable = (BBS_TABLE*)(UINTN)EfiToLegacy16BootTable->BbsTable;
*BbsCount = (UINT16) (sizeof (Private->IntThunk->BbsTable) / sizeof (BBS_TABLE));
*BbsTable = (BBS_TABLE *)(UINTN)EfiToLegacy16BootTable->BbsTable;
*BbsCount = (UINT16)(sizeof (Private->IntThunk->BbsTable) / sizeof (BBS_TABLE));
return EFI_SUCCESS;
}

View File

@@ -21,25 +21,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
LegacyBiosInitBda (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
BDA_STRUC *Bda;
UINT8 *Ebda;
BDA_STRUC *Bda;
UINT8 *Ebda;
Bda = (BDA_STRUC *) ((UINTN) 0x400);
Ebda = (UINT8 *) ((UINTN) 0x9fc00);
Bda = (BDA_STRUC *)((UINTN)0x400);
Ebda = (UINT8 *)((UINTN)0x9fc00);
ACCESS_PAGE0_CODE (
ZeroMem (Bda, 0x100);
//
// 640k-1k for EBDA
//
Bda->MemSize = 0x27f;
Bda->KeyHead = 0x1e;
Bda->KeyTail = 0x1e;
Bda->FloppyData = 0x00;
Bda->FloppyTimeout = 0xff;
Bda->MemSize = 0x27f;
Bda->KeyHead = 0x1e;
Bda->KeyTail = 0x1e;
Bda->FloppyData = 0x00;
Bda->FloppyTimeout = 0xff;
Bda->KeyStart = 0x001E;
Bda->KeyEnd = 0x003E;
@@ -50,10 +50,10 @@ LegacyBiosInitBda (
// Move LPT time out here and zero out LPT4 since some SCSI OPROMS
// use this as scratch pad (LPT4 is Reserved)
//
Bda->Lpt1_2Timeout = 0x1414;
Bda->Lpt3_4Timeout = 0x1400;
Bda->Lpt1_2Timeout = 0x1414;
Bda->Lpt3_4Timeout = 0x1400;
);
);
ZeroMem (Ebda, 0x400);
*Ebda = 0x01;

View File

@@ -13,7 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// define maximum number of HDD system supports
//
#define MAX_HDD_ENTRIES 0x30
#define MAX_HDD_ENTRIES 0x30
//
// Module Global:
@@ -25,7 +25,7 @@ LEGACY_BIOS_INSTANCE mPrivateData;
//
// The SMBIOS table in EfiRuntimeServicesData memory
//
VOID *mRuntimeSmbiosEntryPoint = NULL;
VOID *mRuntimeSmbiosEntryPoint = NULL;
//
// The SMBIOS table in EfiReservedMemoryType memory
@@ -50,27 +50,27 @@ BOOLEAN mEndOfDxe = FALSE;
**/
EFI_STATUS
AllocateLegacyMemory (
IN EFI_ALLOCATE_TYPE AllocateType,
IN EFI_MEMORY_TYPE MemoryType,
IN EFI_PHYSICAL_ADDRESS StartPageAddress,
IN UINTN Pages,
OUT EFI_PHYSICAL_ADDRESS *Result
IN EFI_ALLOCATE_TYPE AllocateType,
IN EFI_MEMORY_TYPE MemoryType,
IN EFI_PHYSICAL_ADDRESS StartPageAddress,
IN UINTN Pages,
OUT EFI_PHYSICAL_ADDRESS *Result
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemPage;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemPage;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc;
//
// Allocate Pages of memory less <= StartPageAddress
//
MemPage = (EFI_PHYSICAL_ADDRESS) (UINTN) StartPageAddress;
Status = gBS->AllocatePages (
AllocateType,
MemoryType,
Pages,
&MemPage
);
MemPage = (EFI_PHYSICAL_ADDRESS)(UINTN)StartPageAddress;
Status = gBS->AllocatePages (
AllocateType,
MemoryType,
Pages,
&MemPage
);
//
// Do not ASSERT on Status error but let caller decide since some cases
// memory is already taken but that is ok.
@@ -81,13 +81,14 @@ AllocateLegacyMemory (
// Make sure that the buffer can be used to store code.
//
Status = gDS->GetMemorySpaceDescriptor (MemPage, &MemDesc);
if (!EFI_ERROR (Status) && (MemDesc.Attributes & EFI_MEMORY_XP) != 0) {
if (!EFI_ERROR (Status) && ((MemDesc.Attributes & EFI_MEMORY_XP) != 0)) {
Status = gDS->SetMemorySpaceAttributes (
MemPage,
EFI_PAGES_TO_SIZE (Pages),
MemDesc.Attributes & (~EFI_MEMORY_XP)
);
}
if (EFI_ERROR (Status)) {
gBS->FreePages (MemPage, Pages);
}
@@ -95,13 +96,12 @@ AllocateLegacyMemory (
}
if (!EFI_ERROR (Status)) {
*Result = (EFI_PHYSICAL_ADDRESS) (UINTN) MemPage;
*Result = (EFI_PHYSICAL_ADDRESS)(UINTN)MemPage;
}
return Status;
}
/**
This function is called when EFI needs to reserve an area in the 0xE0000 or 0xF0000
64 KB blocks.
@@ -126,39 +126,38 @@ AllocateLegacyMemory (
EFI_STATUS
EFIAPI
LegacyBiosGetLegacyRegion (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN UINTN Region,
IN UINTN Alignment,
OUT VOID **LegacyMemoryAddress
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN UINTN Region,
IN UINTN Alignment,
OUT VOID **LegacyMemoryAddress
)
{
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_STATUS Status;
UINT32 Granularity;
LEGACY_BIOS_INSTANCE *Private;
EFI_IA32_REGISTER_SET Regs;
EFI_STATUS Status;
UINT32 Granularity;
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
Private->LegacyRegion->UnLock (Private->LegacyRegion, 0xE0000, 0x20000, &Granularity);
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16GetTableAddress;
Regs.X.BX = (UINT16) Region;
Regs.X.CX = (UINT16) LegacyMemorySize;
Regs.X.DX = (UINT16) Alignment;
Regs.X.BX = (UINT16)Region;
Regs.X.CX = (UINT16)LegacyMemorySize;
Regs.X.DX = (UINT16)Alignment;
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Private->Legacy16CallSegment,
Private->Legacy16CallOffset,
&Regs,
NULL,
0
);
if (Regs.X.AX == 0) {
*LegacyMemoryAddress = (VOID *) (((UINTN) Regs.X.DS << 4) + Regs.X.BX);
Status = EFI_SUCCESS;
*LegacyMemoryAddress = (VOID *)(((UINTN)Regs.X.DS << 4) + Regs.X.BX);
Status = EFI_SUCCESS;
} else {
Status = EFI_OUT_OF_RESOURCES;
}
@@ -169,7 +168,6 @@ LegacyBiosGetLegacyRegion (
return Status;
}
/**
This function is called when copying data to the region assigned by
EFI_LEGACY_BIOS_PROTOCOL.GetLegacyRegion().
@@ -187,21 +185,22 @@ LegacyBiosGetLegacyRegion (
EFI_STATUS
EFIAPI
LegacyBiosCopyLegacyRegion (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN VOID *LegacyMemoryAddress,
IN VOID *LegacyMemorySourceAddress
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINTN LegacyMemorySize,
IN VOID *LegacyMemoryAddress,
IN VOID *LegacyMemorySourceAddress
)
{
LEGACY_BIOS_INSTANCE *Private;
UINT32 Granularity;
if ((LegacyMemoryAddress < (VOID *)(UINTN)0xE0000 ) ||
((UINTN) LegacyMemoryAddress + LegacyMemorySize > (UINTN) 0x100000)
) {
if ((LegacyMemoryAddress < (VOID *)(UINTN)0xE0000) ||
((UINTN)LegacyMemoryAddress + LegacyMemorySize > (UINTN)0x100000)
)
{
return EFI_ACCESS_DENIED;
}
//
// There is no protection from writes over lapping if this function is
// called multiple times.
@@ -216,7 +215,6 @@ LegacyBiosCopyLegacyRegion (
return EFI_SUCCESS;
}
/**
Find Legacy16 BIOS image in the FLASH device and shadow it into memory. Find
the $EFI table in the shadow area. Thunk into the Legacy16 code after it had
@@ -233,33 +231,33 @@ ShadowAndStartLegacy16 (
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_STATUS Status;
UINT8 *Ptr;
UINT8 *PtrEnd;
BOOLEAN Done;
EFI_COMPATIBILITY16_TABLE *Table;
UINT8 CheckSum;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_INIT_TABLE *EfiToLegacy16InitTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
VOID *LegacyBiosImage;
UINTN LegacyBiosImageSize;
UINTN E820Size;
UINT32 *ClearPtr;
BBS_TABLE *BbsTable;
LEGACY_EFI_HDD_TABLE *LegacyEfiHddTable;
UINTN Index;
UINT32 TpmPointer;
VOID *TpmBinaryImage;
UINTN TpmBinaryImageSize;
UINTN Location;
UINTN Alignment;
UINTN TempData;
EFI_PHYSICAL_ADDRESS Address;
UINT16 OldMask;
UINT16 NewMask;
UINT32 Granularity;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
EFI_STATUS Status;
UINT8 *Ptr;
UINT8 *PtrEnd;
BOOLEAN Done;
EFI_COMPATIBILITY16_TABLE *Table;
UINT8 CheckSum;
EFI_IA32_REGISTER_SET Regs;
EFI_TO_COMPATIBILITY16_INIT_TABLE *EfiToLegacy16InitTable;
EFI_TO_COMPATIBILITY16_BOOT_TABLE *EfiToLegacy16BootTable;
VOID *LegacyBiosImage;
UINTN LegacyBiosImageSize;
UINTN E820Size;
UINT32 *ClearPtr;
BBS_TABLE *BbsTable;
LEGACY_EFI_HDD_TABLE *LegacyEfiHddTable;
UINTN Index;
UINT32 TpmPointer;
VOID *TpmBinaryImage;
UINTN TpmBinaryImageSize;
UINTN Location;
UINTN Alignment;
UINTN TempData;
EFI_PHYSICAL_ADDRESS Address;
UINT16 OldMask;
UINT16 NewMask;
UINT32 Granularity;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
Location = 0;
Alignment = 0;
@@ -300,23 +298,23 @@ ShadowAndStartLegacy16 (
// end testtest
//
EfiToLegacy16BootTable = &Private->IntThunk->EfiToLegacy16BootTable;
Status = Private->LegacyBiosPlatform->GetPlatformInfo (
Private->LegacyBiosPlatform,
EfiGetPlatformBinarySystemRom,
&LegacyBiosImage,
&LegacyBiosImageSize,
&Location,
&Alignment,
0,
0
);
Status = Private->LegacyBiosPlatform->GetPlatformInfo (
Private->LegacyBiosPlatform,
EfiGetPlatformBinarySystemRom,
&LegacyBiosImage,
&LegacyBiosImageSize,
&Location,
&Alignment,
0,
0
);
if (EFI_ERROR (Status)) {
return Status;
}
Private->BiosStart = (UINT32) (0x100000 - LegacyBiosImageSize);
Private->OptionRom = 0xc0000;
Private->LegacyBiosImageSize = (UINT32) LegacyBiosImageSize;
Private->BiosStart = (UINT32)(0x100000 - LegacyBiosImageSize);
Private->OptionRom = 0xc0000;
Private->LegacyBiosImageSize = (UINT32)LegacyBiosImageSize;
//
// Can only shadow into memory allocated for legacy usage.
@@ -328,20 +326,20 @@ ShadowAndStartLegacy16 (
//
Private->LegacyRegion->UnLock (Private->LegacyRegion, 0xc0000, 0x40000, &Granularity);
ClearPtr = (VOID *) ((UINTN) 0xc0000);
ClearPtr = (VOID *)((UINTN)0xc0000);
//
// Initialize region from 0xc0000 to start of BIOS to all ffs. This allows unused
// regions to be used by EMM386 etc.
//
SetMem ((VOID *) ClearPtr, (UINTN) (0x40000 - LegacyBiosImageSize), 0xff);
SetMem ((VOID *)ClearPtr, (UINTN)(0x40000 - LegacyBiosImageSize), 0xff);
TempData = Private->BiosStart;
CopyMem (
(VOID *) TempData,
(VOID *)TempData,
LegacyBiosImage,
(UINTN) LegacyBiosImageSize
(UINTN)LegacyBiosImageSize
);
Private->Cpu->FlushDataCache (Private->Cpu, 0xc0000, 0x40000, EfiCpuFlushTypeWriteBackInvalidate);
@@ -351,12 +349,12 @@ ShadowAndStartLegacy16 (
//
Done = FALSE;
Table = NULL;
for (Ptr = (UINT8 *) TempData; Ptr < (UINT8 *) ((UINTN) 0x100000) && !Done; Ptr += 0x10) {
if (*(UINT32 *) Ptr == SIGNATURE_32 ('I', 'F', 'E', '$')) {
Table = (EFI_COMPATIBILITY16_TABLE *) Ptr;
PtrEnd = Ptr + Table->TableLength;
for (Ptr = (UINT8 *)TempData; Ptr < (UINT8 *)((UINTN)0x100000) && !Done; Ptr += 0x10) {
if (*(UINT32 *)Ptr == SIGNATURE_32 ('I', 'F', 'E', '$')) {
Table = (EFI_COMPATIBILITY16_TABLE *)Ptr;
PtrEnd = Ptr + Table->TableLength;
for (CheckSum = 0; Ptr < PtrEnd; Ptr++) {
CheckSum = (UINT8) (CheckSum +*Ptr);
CheckSum = (UINT8)(CheckSum +*Ptr);
}
Done = TRUE;
@@ -378,24 +376,24 @@ ShadowAndStartLegacy16 (
//
// Remember location of the Legacy16 table
//
Private->Legacy16Table = Table;
Private->Legacy16CallSegment = Table->Compatibility16CallSegment;
Private->Legacy16CallOffset = Table->Compatibility16CallOffset;
EfiToLegacy16InitTable = &Private->IntThunk->EfiToLegacy16InitTable;
Private->Legacy16InitPtr = EfiToLegacy16InitTable;
Private->Legacy16BootPtr = &Private->IntThunk->EfiToLegacy16BootTable;
Private->InternalIrqRoutingTable = NULL;
Private->NumberIrqRoutingEntries = 0;
Private->BbsTablePtr = NULL;
Private->LegacyEfiHddTable = NULL;
Private->DiskEnd = 0;
Private->Disk4075 = 0;
Private->HddTablePtr = &Private->IntThunk->EfiToLegacy16BootTable.HddInfo;
Private->NumberHddControllers = MAX_IDE_CONTROLLER;
Private->Dump[0] = 'D';
Private->Dump[1] = 'U';
Private->Dump[2] = 'M';
Private->Dump[3] = 'P';
Private->Legacy16Table = Table;
Private->Legacy16CallSegment = Table->Compatibility16CallSegment;
Private->Legacy16CallOffset = Table->Compatibility16CallOffset;
EfiToLegacy16InitTable = &Private->IntThunk->EfiToLegacy16InitTable;
Private->Legacy16InitPtr = EfiToLegacy16InitTable;
Private->Legacy16BootPtr = &Private->IntThunk->EfiToLegacy16BootTable;
Private->InternalIrqRoutingTable = NULL;
Private->NumberIrqRoutingEntries = 0;
Private->BbsTablePtr = NULL;
Private->LegacyEfiHddTable = NULL;
Private->DiskEnd = 0;
Private->Disk4075 = 0;
Private->HddTablePtr = &Private->IntThunk->EfiToLegacy16BootTable.HddInfo;
Private->NumberHddControllers = MAX_IDE_CONTROLLER;
Private->Dump[0] = 'D';
Private->Dump[1] = 'U';
Private->Dump[2] = 'M';
Private->Dump[3] = 'P';
ZeroMem (
Private->Legacy16BootPtr,
@@ -405,7 +403,7 @@ ShadowAndStartLegacy16 (
//
// Store away a copy of the EFI System Table
//
Table->EfiSystemTable = (UINT32) (UINTN) gST;
Table->EfiSystemTable = (UINT32)(UINTN)gST;
//
// IPF CSM integration -Bug
@@ -423,31 +421,31 @@ ShadowAndStartLegacy16 (
//
// All legacy interrupt should be masked when do initialization work from legacy 16 code.
//
Private->Legacy8259->GetMask(Private->Legacy8259, &OldMask, NULL, NULL, NULL);
Private->Legacy8259->GetMask (Private->Legacy8259, &OldMask, NULL, NULL, NULL);
NewMask = 0xFFFF;
Private->Legacy8259->SetMask(Private->Legacy8259, &NewMask, NULL, NULL, NULL);
Private->Legacy8259->SetMask (Private->Legacy8259, &NewMask, NULL, NULL, NULL);
//
// Call into Legacy16 code to do an INIT
//
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16InitializeYourself;
Regs.X.ES = EFI_SEGMENT (*((UINT32 *) &EfiToLegacy16InitTable));
Regs.X.BX = EFI_OFFSET (*((UINT32 *) &EfiToLegacy16InitTable));
Regs.X.ES = EFI_SEGMENT (*((UINT32 *)&EfiToLegacy16InitTable));
Regs.X.BX = EFI_OFFSET (*((UINT32 *)&EfiToLegacy16InitTable));
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
//
// Restore original legacy interrupt mask value
//
Private->Legacy8259->SetMask(Private->Legacy8259, &OldMask, NULL, NULL, NULL);
Private->Legacy8259->SetMask (Private->Legacy8259, &OldMask, NULL, NULL, NULL);
if (Regs.X.AX != 0) {
return EFI_DEVICE_ERROR;
@@ -469,30 +467,31 @@ ShadowAndStartLegacy16 (
//
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16GetTableAddress;
Regs.X.CX = (UINT16) E820Size;
Regs.X.CX = (UINT16)E820Size;
Regs.X.DX = 1;
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
Table->E820Pointer = (UINT32) (Regs.X.DS * 16 + Regs.X.BX);
Table->E820Length = (UINT32) E820Size;
Table->E820Pointer = (UINT32)(Regs.X.DS * 16 + Regs.X.BX);
Table->E820Length = (UINT32)E820Size;
if (Regs.X.AX != 0) {
DEBUG ((DEBUG_ERROR, "Legacy16 E820 length insufficient\n"));
} else {
TempData = Table->E820Pointer;
CopyMem ((VOID *) TempData, Private->E820Table, E820Size);
CopyMem ((VOID *)TempData, Private->E820Table, E820Size);
}
//
// Get PnPInstallationCheck Info.
//
Private->PnPInstallationCheckSegment = Table->PnPInstallationCheckSegment;
Private->PnPInstallationCheckOffset = Table->PnPInstallationCheckOffset;
Private->PnPInstallationCheckSegment = Table->PnPInstallationCheckSegment;
Private->PnPInstallationCheckOffset = Table->PnPInstallationCheckOffset;
//
// Check if PCI Express is supported. If yes, Save base address.
@@ -508,9 +507,10 @@ ShadowAndStartLegacy16 (
0
);
if (!EFI_ERROR (Status)) {
Private->Legacy16Table->PciExpressBase = (UINT32)Location;
Location = 0;
Private->Legacy16Table->PciExpressBase = (UINT32)Location;
Location = 0;
}
//
// Check if TPM is supported. If yes get a region in E0000,F0000 to copy it
// into, copy it and update pointer to binary image. This needs to be
@@ -527,35 +527,34 @@ ShadowAndStartLegacy16 (
0
);
if (!EFI_ERROR (Status)) {
ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
Regs.X.AX = Legacy16GetTableAddress;
Regs.X.CX = (UINT16) TpmBinaryImageSize;
Regs.X.CX = (UINT16)TpmBinaryImageSize;
Regs.X.DX = 1;
Private->LegacyBios.FarCall86 (
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
&Private->LegacyBios,
Table->Compatibility16CallSegment,
Table->Compatibility16CallOffset,
&Regs,
NULL,
0
);
TpmPointer = (UINT32) (Regs.X.DS * 16 + Regs.X.BX);
TpmPointer = (UINT32)(Regs.X.DS * 16 + Regs.X.BX);
if (Regs.X.AX != 0) {
DEBUG ((DEBUG_ERROR, "TPM cannot be loaded\n"));
} else {
CopyMem ((VOID *) (UINTN)TpmPointer, TpmBinaryImage, TpmBinaryImageSize);
CopyMem ((VOID *)(UINTN)TpmPointer, TpmBinaryImage, TpmBinaryImageSize);
Table->TpmSegment = Regs.X.DS;
Table->TpmOffset = Regs.X.BX;
}
}
//
// Lock the Legacy BIOS region
//
Private->Cpu->FlushDataCache (Private->Cpu, Private->BiosStart, (UINT32) LegacyBiosImageSize, EfiCpuFlushTypeWriteBackInvalidate);
Private->LegacyRegion->Lock (Private->LegacyRegion, Private->BiosStart, (UINT32) LegacyBiosImageSize, &Granularity);
Private->Cpu->FlushDataCache (Private->Cpu, Private->BiosStart, (UINT32)LegacyBiosImageSize, EfiCpuFlushTypeWriteBackInvalidate);
Private->LegacyRegion->Lock (Private->LegacyRegion, Private->BiosStart, (UINT32)LegacyBiosImageSize, &Granularity);
//
// Get the BbsTable from LOW_MEMORY_THUNK
@@ -563,8 +562,8 @@ ShadowAndStartLegacy16 (
BbsTable = (BBS_TABLE *)(UINTN)Private->IntThunk->BbsTable;
ZeroMem ((VOID *)BbsTable, sizeof (Private->IntThunk->BbsTable));
EfiToLegacy16BootTable->BbsTable = (UINT32)(UINTN)BbsTable;
Private->BbsTablePtr = (VOID *) BbsTable;
EfiToLegacy16BootTable->BbsTable = (UINT32)(UINTN)BbsTable;
Private->BbsTablePtr = (VOID *)BbsTable;
//
// Populate entire table with BBS_IGNORE_ENTRY
@@ -574,10 +573,11 @@ ShadowAndStartLegacy16 (
for (Index = 0; Index < MAX_BBS_ENTRIES; Index++) {
BbsTable[Index].BootPriority = BBS_IGNORE_ENTRY;
}
//
// Allocate space for Legacy HDD table
//
LegacyEfiHddTable = (LEGACY_EFI_HDD_TABLE *) AllocateZeroPool ((UINTN) MAX_HDD_ENTRIES * sizeof (LEGACY_EFI_HDD_TABLE));
LegacyEfiHddTable = (LEGACY_EFI_HDD_TABLE *)AllocateZeroPool ((UINTN)MAX_HDD_ENTRIES * sizeof (LEGACY_EFI_HDD_TABLE));
ASSERT (LegacyEfiHddTable);
Private->LegacyEfiHddTable = LegacyEfiHddTable;
@@ -612,7 +612,7 @@ ShadowAndStartLegacy16 (
EFI_STATUS
EFIAPI
LegacyBiosShadowAllLegacyOproms (
IN EFI_LEGACY_BIOS_PROTOCOL *This
IN EFI_LEGACY_BIOS_PROTOCOL *This
)
{
LEGACY_BIOS_INSTANCE *Private;
@@ -657,16 +657,16 @@ LegacyBiosShadowAllLegacyOproms (
**/
UINT16
GetPciInterfaceVersion (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_IA32_REGISTER_SET Reg;
BOOLEAN ThunkFailed;
UINT16 PciInterfaceVersion;
EFI_IA32_REGISTER_SET Reg;
BOOLEAN ThunkFailed;
UINT16 PciInterfaceVersion;
PciInterfaceVersion = 0;
Reg.X.AX = 0xB101;
Reg.X.AX = 0xB101;
Reg.E.EDI = 0;
ThunkFailed = Private->LegacyBios.Int86 (&Private->LegacyBios, 0x1A, &Reg);
@@ -684,6 +684,7 @@ GetPciInterfaceVersion (
PciInterfaceVersion = Reg.X.BX;
}
}
return PciInterfaceVersion;
}
@@ -699,25 +700,25 @@ GetPciInterfaceVersion (
VOID
EFIAPI
InstallSmbiosEventCallback (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
SMBIOS_TABLE_ENTRY_POINT *EntryPointStructure;
EFI_STATUS Status;
SMBIOS_TABLE_ENTRY_POINT *EntryPointStructure;
//
// Get SMBIOS table from EFI configuration table
//
Status = EfiGetSystemConfigurationTable (
&gEfiSmbiosTableGuid,
&mRuntimeSmbiosEntryPoint
);
&gEfiSmbiosTableGuid,
&mRuntimeSmbiosEntryPoint
);
if ((EFI_ERROR (Status)) || (mRuntimeSmbiosEntryPoint == NULL)) {
return;
}
EntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *) mRuntimeSmbiosEntryPoint;
EntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *)mRuntimeSmbiosEntryPoint;
//
// Allocate memory for SMBIOS Entry Point Structure.
@@ -728,21 +729,23 @@ InstallSmbiosEventCallback (
// Entrypoint structure with fixed size is allocated only once.
//
mReserveSmbiosEntryPoint = SIZE_4GB - 1;
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
EFI_SIZE_TO_PAGES ((UINTN) (EntryPointStructure->EntryPointLength)),
&mReserveSmbiosEntryPoint
);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
EFI_SIZE_TO_PAGES ((UINTN)(EntryPointStructure->EntryPointLength)),
&mReserveSmbiosEntryPoint
);
if (EFI_ERROR (Status)) {
mReserveSmbiosEntryPoint = 0;
return;
}
DEBUG ((DEBUG_INFO, "Allocate memory for Smbios Entry Point Structure\n"));
}
if ((mStructureTableAddress != 0) &&
(mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength))) {
(mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength)))
{
//
// If original buffer is not enough for the new SMBIOS table, free original buffer and re-allocate
//
@@ -759,22 +762,23 @@ InstallSmbiosEventCallback (
//
mStructureTableAddress = SIZE_4GB - 1;
mStructureTablePages = EFI_SIZE_TO_PAGES (EntryPointStructure->TableLength);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
mStructureTablePages,
&mStructureTableAddress
);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiReservedMemoryType,
mStructureTablePages,
&mStructureTableAddress
);
if (EFI_ERROR (Status)) {
gBS->FreePages (
mReserveSmbiosEntryPoint,
EFI_SIZE_TO_PAGES ((UINTN) (EntryPointStructure->EntryPointLength))
);
mReserveSmbiosEntryPoint,
EFI_SIZE_TO_PAGES ((UINTN)(EntryPointStructure->EntryPointLength))
);
mReserveSmbiosEntryPoint = 0;
mStructureTableAddress = 0;
mStructureTablePages = 0;
return;
}
DEBUG ((DEBUG_INFO, "Allocate memory for Smbios Structure Table\n"));
}
}
@@ -791,8 +795,8 @@ InstallSmbiosEventCallback (
VOID
EFIAPI
ToggleEndOfDxeStatus (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
mEndOfDxe = TRUE;
@@ -812,8 +816,8 @@ ToggleEndOfDxeStatus (
EFI_STATUS
EFIAPI
LegacyBiosInstall (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@@ -850,7 +854,7 @@ LegacyBiosInstall (
// When UEFI Secure Boot is enabled, CSM module will not start any more.
//
SecureBoot = NULL;
GetEfiGlobalVariable2 (EFI_SECURE_BOOT_MODE_NAME, (VOID**)&SecureBoot, NULL);
GetEfiGlobalVariable2 (EFI_SECURE_BOOT_MODE_NAME, (VOID **)&SecureBoot, NULL);
if ((SecureBoot != NULL) && (*SecureBoot == SECURE_BOOT_MODE_ENABLE)) {
FreePool (SecureBoot);
return EFI_SECURITY_VIOLATION;
@@ -867,22 +871,22 @@ LegacyBiosInstall (
// Grab a copy of all the protocols we depend on. Any error would
// be a dispatcher bug!.
//
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &Private->Cpu);
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Private->Cpu);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiTimerArchProtocolGuid, NULL, (VOID **) &Private->Timer);
Status = gBS->LocateProtocol (&gEfiTimerArchProtocolGuid, NULL, (VOID **)&Private->Timer);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacyRegion2ProtocolGuid, NULL, (VOID **) &Private->LegacyRegion);
Status = gBS->LocateProtocol (&gEfiLegacyRegion2ProtocolGuid, NULL, (VOID **)&Private->LegacyRegion);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacyBiosPlatformProtocolGuid, NULL, (VOID **) &Private->LegacyBiosPlatform);
Status = gBS->LocateProtocol (&gEfiLegacyBiosPlatformProtocolGuid, NULL, (VOID **)&Private->LegacyBiosPlatform);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **) &Private->Legacy8259);
Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **)&Private->Legacy8259);
ASSERT_EFI_ERROR (Status);
Status = gBS->LocateProtocol (&gEfiLegacyInterruptProtocolGuid, NULL, (VOID **) &Private->LegacyInterrupt);
Status = gBS->LocateProtocol (&gEfiLegacyInterruptProtocolGuid, NULL, (VOID **)&Private->LegacyInterrupt);
ASSERT_EFI_ERROR (Status);
//
@@ -891,7 +895,7 @@ LegacyBiosInstall (
Status = gBS->LocateProtocol (
&gEfiGenericMemTestProtocolGuid,
NULL,
(VOID **) &Private->GenericMemoryTest
(VOID **)&Private->GenericMemoryTest
);
ASSERT_EFI_ERROR (Status);
@@ -904,6 +908,7 @@ LegacyBiosInstall (
StartAddress = Descriptor.BaseAddress + Descriptor.Length;
continue;
}
Length = MIN (Descriptor.Length, 0xa0000 - StartAddress);
Private->GenericMemoryTest->CompatibleRangeTest (
Private->GenericMemoryTest,
@@ -912,6 +917,7 @@ LegacyBiosInstall (
);
StartAddress = StartAddress + Length;
}
//
// Make sure all memory from 1MB to 16MB is tested and added to memory map
//
@@ -921,6 +927,7 @@ LegacyBiosInstall (
StartAddress = Descriptor.BaseAddress + Descriptor.Length;
continue;
}
Length = MIN (Descriptor.Length, BASE_16MB - StartAddress);
Private->GenericMemoryTest->CompatibleRangeTest (
Private->GenericMemoryTest,
@@ -932,17 +939,17 @@ LegacyBiosInstall (
Private->Signature = LEGACY_BIOS_INSTANCE_SIGNATURE;
Private->LegacyBios.Int86 = LegacyBiosInt86;
Private->LegacyBios.FarCall86 = LegacyBiosFarCall86;
Private->LegacyBios.CheckPciRom = LegacyBiosCheckPciRom;
Private->LegacyBios.InstallPciRom = LegacyBiosInstallPciRom;
Private->LegacyBios.LegacyBoot = LegacyBiosLegacyBoot;
Private->LegacyBios.UpdateKeyboardLedStatus = LegacyBiosUpdateKeyboardLedStatus;
Private->LegacyBios.GetBbsInfo = LegacyBiosGetBbsInfo;
Private->LegacyBios.ShadowAllLegacyOproms = LegacyBiosShadowAllLegacyOproms;
Private->LegacyBios.PrepareToBootEfi = LegacyBiosPrepareToBootEfi;
Private->LegacyBios.GetLegacyRegion = LegacyBiosGetLegacyRegion;
Private->LegacyBios.CopyLegacyRegion = LegacyBiosCopyLegacyRegion;
Private->LegacyBios.Int86 = LegacyBiosInt86;
Private->LegacyBios.FarCall86 = LegacyBiosFarCall86;
Private->LegacyBios.CheckPciRom = LegacyBiosCheckPciRom;
Private->LegacyBios.InstallPciRom = LegacyBiosInstallPciRom;
Private->LegacyBios.LegacyBoot = LegacyBiosLegacyBoot;
Private->LegacyBios.UpdateKeyboardLedStatus = LegacyBiosUpdateKeyboardLedStatus;
Private->LegacyBios.GetBbsInfo = LegacyBiosGetBbsInfo;
Private->LegacyBios.ShadowAllLegacyOproms = LegacyBiosShadowAllLegacyOproms;
Private->LegacyBios.PrepareToBootEfi = LegacyBiosPrepareToBootEfi;
Private->LegacyBios.GetLegacyRegion = LegacyBiosGetLegacyRegion;
Private->LegacyBios.CopyLegacyRegion = LegacyBiosCopyLegacyRegion;
Private->LegacyBios.BootUnconventionalDevice = LegacyBiosBootUnconventionalDevice;
Private->ImageHandle = ImageHandle;
@@ -994,16 +1001,16 @@ LegacyBiosInstall (
);
ASSERT (MemoryAddress == 0x000000000);
ClearPtr = (VOID *) ((UINTN) 0x0000);
ClearPtr = (VOID *)((UINTN)0x0000);
//
// Initialize region from 0x0000 to 4k. This initializes interrupt vector
// range.
//
ACCESS_PAGE0_CODE (
gBS->SetMem ((VOID *) ClearPtr, 0x400, INITIAL_VALUE_BELOW_1K);
ZeroMem ((VOID *) ((UINTN)ClearPtr + 0x400), 0xC00);
);
gBS->SetMem ((VOID *)ClearPtr, 0x400, INITIAL_VALUE_BELOW_1K);
ZeroMem ((VOID *)((UINTN)ClearPtr + 0x400), 0xC00);
);
//
// Allocate pages for OPROM usage
@@ -1020,7 +1027,7 @@ LegacyBiosInstall (
);
ASSERT_EFI_ERROR (Status);
ZeroMem ((VOID *) ((UINTN) MemoryAddress), MemorySize);
ZeroMem ((VOID *)((UINTN)MemoryAddress), MemorySize);
//
// Allocate all 32k chunks from 0x60000 ~ 0x88000 for Legacy OPROMs that
@@ -1028,8 +1035,8 @@ LegacyBiosInstall (
// OpROMs expect different areas to be free
//
EbdaReservedBaseAddress = MemoryAddress;
MemoryAddress = PcdGet32 (PcdOpromReservedMemoryBase);
MemorySize = PcdGet32 (PcdOpromReservedMemorySize);
MemoryAddress = PcdGet32 (PcdOpromReservedMemoryBase);
MemorySize = PcdGet32 (PcdOpromReservedMemorySize);
//
// Check if base address and size for reserved memory are 4KB aligned.
//
@@ -1048,7 +1055,7 @@ LegacyBiosInstall (
&StartAddress
);
if (!EFI_ERROR (Status)) {
MemoryPtr = (VOID *) ((UINTN) StartAddress);
MemoryPtr = (VOID *)((UINTN)StartAddress);
ZeroMem (MemoryPtr, 0x1000);
} else {
DEBUG ((DEBUG_ERROR, "WARNING: Allocate legacy memory fail for SCSI card - %x\n", MemStart));
@@ -1069,7 +1076,7 @@ LegacyBiosInstall (
);
ASSERT_EFI_ERROR (Status);
ZeroMem ((VOID *) ((UINTN) MemoryAddressUnder1MB), MemorySize);
ZeroMem ((VOID *)((UINTN)MemoryAddressUnder1MB), MemorySize);
//
// Allocate space for thunker and Init Thunker
@@ -1082,10 +1089,10 @@ LegacyBiosInstall (
&MemoryAddress
);
ASSERT_EFI_ERROR (Status);
Private->IntThunk = (LOW_MEMORY_THUNK *) (UINTN) MemoryAddress;
Private->IntThunk = (LOW_MEMORY_THUNK *)(UINTN)MemoryAddress;
EfiToLegacy16InitTable = &Private->IntThunk->EfiToLegacy16InitTable;
EfiToLegacy16InitTable->ThunkStart = (UINT32) (EFI_PHYSICAL_ADDRESS) (UINTN) MemoryAddress;
EfiToLegacy16InitTable->ThunkSizeInBytes = (UINT32) (sizeof (LOW_MEMORY_THUNK));
EfiToLegacy16InitTable->ThunkStart = (UINT32)(EFI_PHYSICAL_ADDRESS)(UINTN)MemoryAddress;
EfiToLegacy16InitTable->ThunkSizeInBytes = (UINT32)(sizeof (LOW_MEMORY_THUNK));
Status = LegacyBiosInitializeThunk (Private);
ASSERT_EFI_ERROR (Status);
@@ -1093,8 +1100,8 @@ LegacyBiosInstall (
//
// Init the legacy memory map in memory < 1 MB.
//
EfiToLegacy16InitTable->BiosLessThan1MB = (UINT32) MemoryAddressUnder1MB;
EfiToLegacy16InitTable->LowPmmMemory = (UINT32) MemoryAddressUnder1MB;
EfiToLegacy16InitTable->BiosLessThan1MB = (UINT32)MemoryAddressUnder1MB;
EfiToLegacy16InitTable->LowPmmMemory = (UINT32)MemoryAddressUnder1MB;
EfiToLegacy16InitTable->LowPmmMemorySizeInBytes = MemorySize;
MemorySize = PcdGet32 (PcdHighPmmMemorySize);
@@ -1121,8 +1128,9 @@ LegacyBiosInstall (
&MemoryAddress
);
}
if (!EFI_ERROR (Status)) {
EfiToLegacy16InitTable->HiPmmMemory = (UINT32) (EFI_PHYSICAL_ADDRESS) (UINTN) MemoryAddress;
EfiToLegacy16InitTable->HiPmmMemory = (UINT32)(EFI_PHYSICAL_ADDRESS)(UINTN)MemoryAddress;
EfiToLegacy16InitTable->HiPmmMemorySizeInBytes = MemorySize;
}
@@ -1135,32 +1143,34 @@ LegacyBiosInstall (
if (EFI_ERROR (Status)) {
return Status;
}
//
// Initialize interrupt redirection code and entries;
// IDT Vectors 0x68-0x6f must be redirected to IDT Vectors 0x08-0x0f.
//
CopyMem (
Private->IntThunk->InterruptRedirectionCode,
(VOID *) (UINTN) InterruptRedirectionTemplate,
sizeof (Private->IntThunk->InterruptRedirectionCode)
);
Private->IntThunk->InterruptRedirectionCode,
(VOID *)(UINTN)InterruptRedirectionTemplate,
sizeof (Private->IntThunk->InterruptRedirectionCode)
);
//
// Save Unexpected interrupt vector so can restore it just prior to boot
//
ACCESS_PAGE0_CODE (
BaseVectorMaster = (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BASE_VECTOR_MASTER);
BaseVectorMaster = (UINT32 *)(sizeof (UINT32) * PROTECTED_MODE_BASE_VECTOR_MASTER);
Private->BiosUnexpectedInt = BaseVectorMaster[0];
IntRedirCode = (UINT32) (UINTN) Private->IntThunk->InterruptRedirectionCode;
IntRedirCode = (UINT32)(UINTN)Private->IntThunk->InterruptRedirectionCode;
for (Index = 0; Index < 8; Index++) {
BaseVectorMaster[Index] = (EFI_SEGMENT (IntRedirCode + Index * 4) << 16) | EFI_OFFSET (IntRedirCode + Index * 4);
}
);
BaseVectorMaster[Index] = (EFI_SEGMENT (IntRedirCode + Index * 4) << 16) | EFI_OFFSET (IntRedirCode + Index * 4);
}
);
//
// Save EFI value
//
Private->ThunkSeg = (UINT16) (EFI_SEGMENT (IntRedirCode));
Private->ThunkSeg = (UINT16)(EFI_SEGMENT (IntRedirCode));
//
// Allocate reserved memory for SMBIOS table used in legacy boot if SMBIOS table exists
@@ -1198,18 +1208,20 @@ LegacyBiosInstall (
// Make a new handle and install the protocol
//
Private->Handle = NULL;
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBios
);
Status = gBS->InstallProtocolInterface (
&Private->Handle,
&gEfiLegacyBiosProtocolGuid,
EFI_NATIVE_INTERFACE,
&Private->LegacyBios
);
Private->Csm16PciInterfaceVersion = GetPciInterfaceVersion (Private);
DEBUG ((DEBUG_INFO, "CSM16 PCI BIOS Interface Version: %02x.%02x\n",
(UINT8) (Private->Csm16PciInterfaceVersion >> 8),
(UINT8) Private->Csm16PciInterfaceVersion
));
DEBUG ((
DEBUG_INFO,
"CSM16 PCI BIOS Interface Version: %02x.%02x\n",
(UINT8)(Private->Csm16PciInterfaceVersion >> 8),
(UINT8)Private->Csm16PciInterfaceVersion
));
ASSERT (Private->Csm16PciInterfaceVersion != 0);
return Status;
}

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -66,12 +66,12 @@ LegacyCalculateWriteStandardCmosChecksum (
for (Checksum = 0, Register = 0x10; Register < 0x2e; Register++) {
Checksum = (UINT16)(Checksum + LegacyReadStandardCmos (Register));
}
LegacyWriteStandardCmos (CMOS_2E, (UINT8)(Checksum >> 8));
LegacyWriteStandardCmos (CMOS_2F, (UINT8)(Checksum & 0xff));
return EFI_SUCCESS;
}
/**
Fill in the standard CMOS stuff before Legacy16 load
@@ -82,7 +82,7 @@ LegacyCalculateWriteStandardCmosChecksum (
**/
EFI_STATUS
LegacyBiosInitCmos (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
UINT32 Size;
@@ -103,7 +103,7 @@ LegacyBiosInitCmos (
Size = 15 * SIZE_1MB;
if (Private->IntThunk->EfiToLegacy16InitTable.OsMemoryAbove1Mb < (15 * SIZE_1MB)) {
Size = Private->IntThunk->EfiToLegacy16InitTable.OsMemoryAbove1Mb >> 10;
Size = Private->IntThunk->EfiToLegacy16InitTable.OsMemoryAbove1Mb >> 10;
}
LegacyWriteStandardCmos (CMOS_17, (UINT8)(Size & 0xFF));

View File

@@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "LegacyBiosInterface.h"
BOOLEAN mIdeDataBuiltFlag = FALSE;
BOOLEAN mIdeDataBuiltFlag = FALSE;
/**
Collect IDE Inquiry data from the IDE disks
@@ -23,9 +23,9 @@ BOOLEAN mIdeDataBuiltFlag = FALSE;
**/
EFI_STATUS
LegacyBiosBuildIdeData (
IN LEGACY_BIOS_INSTANCE *Private,
IN HDD_INFO **HddInfo,
IN UINT16 Flag
IN LEGACY_BIOS_INSTANCE *Private,
IN HDD_INFO **HddInfo,
IN UINT16 Flag
)
{
EFI_STATUS Status;
@@ -60,14 +60,14 @@ LegacyBiosBuildIdeData (
//
PciDevicePath = NULL;
LocalHddInfo = *HddInfo;
Status = Private->LegacyBiosPlatform->GetPlatformHandle (
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *) &LocalHddInfo
);
Status = Private->LegacyBiosPlatform->GetPlatformHandle (
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *)&LocalHddInfo
);
if (!EFI_ERROR (Status)) {
IdeController = HandleBuffer[0];
//
@@ -75,10 +75,10 @@ LegacyBiosBuildIdeData (
//
if (Flag != 0) {
gBS->DisconnectController (
IdeController,
NULL,
NULL
);
IdeController,
NULL,
NULL
);
}
gBS->ConnectController (IdeController, NULL, NULL, FALSE);
@@ -88,13 +88,13 @@ LegacyBiosBuildIdeData (
// And GetIdeHandle will switch to Legacy mode, if required.
//
Private->LegacyBiosPlatform->GetPlatformHandle (
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *) &LocalHddInfo
);
Private->LegacyBiosPlatform,
EfiGetPlatformIdeHandle,
0,
&HandleBuffer,
&HandleCount,
(VOID *)&LocalHddInfo
);
}
mIdeDataBuiltFlag = TRUE;
@@ -103,19 +103,19 @@ LegacyBiosBuildIdeData (
// Get Identity command from all drives
//
gBS->LocateHandleBuffer (
ByProtocol,
&gEfiDiskInfoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
ByProtocol,
&gEfiDiskInfoProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
Private->IdeDriveCount = (UINT8) HandleCount;
Private->IdeDriveCount = (UINT8)HandleCount;
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiDiskInfoProtocolGuid,
(VOID **) &DiskInfo
(VOID **)&DiskInfo
);
ASSERT_EFI_ERROR (Status);
@@ -126,7 +126,7 @@ LegacyBiosBuildIdeData (
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiDevicePathProtocolGuid,
(VOID *) &DevicePath
(VOID *)&DevicePath
);
ASSERT_EFI_ERROR (Status);
@@ -134,12 +134,14 @@ LegacyBiosBuildIdeData (
while (!IsDevicePathEnd (DevicePathNode)) {
TempDevicePathNode = NextDevicePathNode (DevicePathNode);
if ((DevicePathType (DevicePathNode) == HARDWARE_DEVICE_PATH) &&
( DevicePathSubType (DevicePathNode) == HW_PCI_DP) &&
( DevicePathType(TempDevicePathNode) == MESSAGING_DEVICE_PATH) &&
( DevicePathSubType(TempDevicePathNode) == MSG_ATAPI_DP) ) {
PciDevicePath = (PCI_DEVICE_PATH *) DevicePathNode;
(DevicePathSubType (DevicePathNode) == HW_PCI_DP) &&
(DevicePathType (TempDevicePathNode) == MESSAGING_DEVICE_PATH) &&
(DevicePathSubType (TempDevicePathNode) == MSG_ATAPI_DP))
{
PciDevicePath = (PCI_DEVICE_PATH *)DevicePathNode;
break;
}
DevicePathNode = NextDevicePathNode (DevicePathNode);
}
@@ -161,7 +163,8 @@ LegacyBiosBuildIdeData (
for (PciIndex = 0; PciIndex < 8; PciIndex++) {
if ((PciDevicePath->Device == LocalHddInfo[PciIndex].Device) &&
(PciDevicePath->Function == LocalHddInfo[PciIndex].Function)
) {
)
{
break;
}
}
@@ -186,15 +189,15 @@ LegacyBiosBuildIdeData (
InquiryData = NULL;
InquiryDataSize = 0;
Status = DiskInfo->Inquiry (
DiskInfo,
NULL,
&InquiryDataSize
);
Status = DiskInfo->Inquiry (
DiskInfo,
NULL,
&InquiryDataSize
);
if (Status == EFI_BUFFER_TOO_SMALL) {
InquiryData = (UINT8 *) AllocatePool (
InquiryDataSize
);
InquiryData = (UINT8 *)AllocatePool (
InquiryDataSize
);
if (InquiryData != NULL) {
Status = DiskInfo->Inquiry (
DiskInfo,
@@ -227,6 +230,7 @@ LegacyBiosBuildIdeData (
LocalHddInfo[PciIndex + IdeChannel].Status |= HDD_SLAVE_ATAPI_ZIPDISK;
}
}
FreePool (InquiryData);
} else {
if (IdeDevice == 0) {
@@ -246,7 +250,6 @@ LegacyBiosBuildIdeData (
return EFI_SUCCESS;
}
/**
If the IDE channel is in compatibility (legacy) mode, remove all
PCI I/O BAR addresses from the controller.
@@ -257,13 +260,13 @@ LegacyBiosBuildIdeData (
**/
VOID
InitLegacyIdeController (
IN EFI_HANDLE IdeController
IN EFI_HANDLE IdeController
)
{
EFI_PCI_IO_PROTOCOL *PciIo;
UINT32 IOBarClear;
EFI_STATUS Status;
PCI_TYPE00 PciData;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT32 IOBarClear;
EFI_STATUS Status;
PCI_TYPE00 PciData;
//
// If the IDE channel is in compatibility (legacy) mode, remove all
@@ -277,20 +280,21 @@ InitLegacyIdeController (
(VOID **)&PciIo
);
if (EFI_ERROR (Status)) {
return ;
return;
}
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0, sizeof (PciData), &PciData);
if (EFI_ERROR (Status)) {
return ;
return;
}
//
// Check whether this is IDE
//
if ((PciData.Hdr.ClassCode[2] != PCI_CLASS_MASS_STORAGE) ||
(PciData.Hdr.ClassCode[1] != PCI_CLASS_MASS_STORAGE_IDE)) {
return ;
(PciData.Hdr.ClassCode[1] != PCI_CLASS_MASS_STORAGE_IDE))
{
return;
}
//
@@ -301,10 +305,11 @@ InitLegacyIdeController (
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x10, 1, &IOBarClear);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x14, 1, &IOBarClear);
}
if ((PciData.Hdr.ClassCode[0] & IDE_PI_REGISTER_SNE) == 0) {
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x18, 1, &IOBarClear);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x1C, 1, &IOBarClear);
}
return ;
return;
}

File diff suppressed because it is too large Load Diff

View File

@@ -21,32 +21,32 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
LegacyBiosBuildSioDataFromSio (
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
)
{
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ChildIndex;
EFI_SIO_PROTOCOL *Sio;
ACPI_RESOURCE_HEADER_PTR Resources;
EFI_ACPI_IO_PORT_DESCRIPTOR *IoResource;
EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *FixedIoResource;
EFI_ACPI_DMA_DESCRIPTOR *DmaResource;
EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *IrqResource;
UINT16 Address;
UINT8 Dma;
UINT8 Irq;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
ACPI_HID_DEVICE_PATH *Acpi;
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ChildIndex;
EFI_SIO_PROTOCOL *Sio;
ACPI_RESOURCE_HEADER_PTR Resources;
EFI_ACPI_IO_PORT_DESCRIPTOR *IoResource;
EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *FixedIoResource;
EFI_ACPI_DMA_DESCRIPTOR *DmaResource;
EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *IrqResource;
UINT16 Address;
UINT8 Dma;
UINT8 Irq;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
ACPI_HID_DEVICE_PATH *Acpi;
//
// Get the list of ISA controllers in the system
@@ -61,11 +61,12 @@ LegacyBiosBuildSioDataFromSio (
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// Collect legacy information from each of the ISA controllers in the system
//
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiSioProtocolGuid, (VOID **) &Sio);
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiSioProtocolGuid, (VOID **)&Sio);
if (EFI_ERROR (Status)) {
continue;
}
@@ -73,46 +74,46 @@ LegacyBiosBuildSioDataFromSio (
Address = MAX_UINT16;
Dma = MAX_UINT8;
Irq = MAX_UINT8;
Status = Sio->GetResources (Sio, &Resources);
Status = Sio->GetResources (Sio, &Resources);
if (!EFI_ERROR (Status)) {
//
// Get the base address information from ACPI resource descriptor.
//
while (Resources.SmallHeader->Byte != ACPI_END_TAG_DESCRIPTOR) {
switch (Resources.SmallHeader->Byte) {
case ACPI_IO_PORT_DESCRIPTOR:
IoResource = (EFI_ACPI_IO_PORT_DESCRIPTOR *) Resources.SmallHeader;
Address = IoResource->BaseAddressMin;
break;
case ACPI_IO_PORT_DESCRIPTOR:
IoResource = (EFI_ACPI_IO_PORT_DESCRIPTOR *)Resources.SmallHeader;
Address = IoResource->BaseAddressMin;
break;
case ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR:
FixedIoResource = (EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *) Resources.SmallHeader;
Address = FixedIoResource->BaseAddress;
break;
case ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR:
FixedIoResource = (EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *)Resources.SmallHeader;
Address = FixedIoResource->BaseAddress;
break;
case ACPI_DMA_DESCRIPTOR:
DmaResource = (EFI_ACPI_DMA_DESCRIPTOR *) Resources.SmallHeader;
Dma = (UINT8) LowBitSet32 (DmaResource->ChannelMask);
break;
case ACPI_DMA_DESCRIPTOR:
DmaResource = (EFI_ACPI_DMA_DESCRIPTOR *)Resources.SmallHeader;
Dma = (UINT8)LowBitSet32 (DmaResource->ChannelMask);
break;
case ACPI_IRQ_DESCRIPTOR:
case ACPI_IRQ_NOFLAG_DESCRIPTOR:
IrqResource = (EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *) Resources.SmallHeader;
Irq = (UINT8) LowBitSet32 (IrqResource->Mask);
break;
case ACPI_IRQ_DESCRIPTOR:
case ACPI_IRQ_NOFLAG_DESCRIPTOR:
IrqResource = (EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR *)Resources.SmallHeader;
Irq = (UINT8)LowBitSet32 (IrqResource->Mask);
break;
default:
break;
default:
break;
}
if (Resources.SmallHeader->Bits.Type == 0) {
Resources.SmallHeader = (ACPI_SMALL_RESOURCE_HEADER *) ((UINT8 *) Resources.SmallHeader
+ Resources.SmallHeader->Bits.Length
+ sizeof (*Resources.SmallHeader));
Resources.SmallHeader = (ACPI_SMALL_RESOURCE_HEADER *)((UINT8 *)Resources.SmallHeader
+ Resources.SmallHeader->Bits.Length
+ sizeof (*Resources.SmallHeader));
} else {
Resources.LargeHeader = (ACPI_LARGE_RESOURCE_HEADER *) ((UINT8 *) Resources.LargeHeader
+ Resources.LargeHeader->Length
+ sizeof (*Resources.LargeHeader));
Resources.LargeHeader = (ACPI_LARGE_RESOURCE_HEADER *)((UINT8 *)Resources.LargeHeader
+ Resources.LargeHeader->Length
+ sizeof (*Resources.LargeHeader));
}
}
}
@@ -126,13 +127,14 @@ LegacyBiosBuildSioDataFromSio (
Acpi = NULL;
while (!IsDevicePathEnd (DevicePath)) {
Acpi = (ACPI_HID_DEVICE_PATH *) DevicePath;
Acpi = (ACPI_HID_DEVICE_PATH *)DevicePath;
DevicePath = NextDevicePathNode (DevicePath);
}
if ((Acpi == NULL) || (DevicePathType (Acpi) != ACPI_DEVICE_PATH) ||
((DevicePathSubType (Acpi) != ACPI_DP) && (DevicePathSubType (Acpi) != ACPI_EXTENDED_DP))
) {
)
{
continue;
}
@@ -141,9 +143,8 @@ LegacyBiosBuildSioDataFromSio (
//
// Ignore DMA resource since it is always returned NULL
//
if (Acpi->HID == EISA_PNP_ID (0x500) || Acpi->HID == EISA_PNP_ID (0x501)) {
if (Acpi->UID < 4 && Address != MAX_UINT16 && Irq != MAX_UINT8) {
if ((Acpi->HID == EISA_PNP_ID (0x500)) || (Acpi->HID == EISA_PNP_ID (0x501))) {
if ((Acpi->UID < 4) && (Address != MAX_UINT16) && (Irq != MAX_UINT8)) {
//
// Get the handle of the child device that has opened the Super I/O Protocol
//
@@ -156,14 +157,15 @@ LegacyBiosBuildSioDataFromSio (
if (EFI_ERROR (Status)) {
continue;
}
for (ChildIndex = 0; ChildIndex < EntryCount; ChildIndex++) {
if ((OpenInfoBuffer[ChildIndex].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **) &SerialIo);
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **)&SerialIo);
if (!EFI_ERROR (Status)) {
SioSerial = &SioPtr->Serial[Acpi->UID];
SioSerial->Address = Address;
SioSerial->Irq = Irq;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
SioSerial = &SioPtr->Serial[Acpi->UID];
SioSerial->Address = Address;
SioSerial->Irq = Irq;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
break;
}
}
@@ -172,36 +174,39 @@ LegacyBiosBuildSioDataFromSio (
FreePool (OpenInfoBuffer);
}
}
//
// See if this is an ISA parallel port
//
// Ignore DMA resource since it is always returned NULL, port
// only used in output mode.
//
if (Acpi->HID == EISA_PNP_ID (0x400) || Acpi->HID == EISA_PNP_ID (0x401)) {
if (Acpi->UID < 3 && Address != MAX_UINT16 && Irq != MAX_UINT8 && Dma != MAX_UINT8) {
SioParallel = &SioPtr->Parallel[Acpi->UID];
SioParallel->Address = Address;
SioParallel->Irq = Irq;
SioParallel->Dma = Dma;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
if ((Acpi->HID == EISA_PNP_ID (0x400)) || (Acpi->HID == EISA_PNP_ID (0x401))) {
if ((Acpi->UID < 3) && (Address != MAX_UINT16) && (Irq != MAX_UINT8) && (Dma != MAX_UINT8)) {
SioParallel = &SioPtr->Parallel[Acpi->UID];
SioParallel->Address = Address;
SioParallel->Irq = Irq;
SioParallel->Dma = Dma;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
}
}
//
// See if this is an ISA floppy controller
//
if (Acpi->HID == EISA_PNP_ID (0x604)) {
if (Address != MAX_UINT16 && Irq != MAX_UINT8 && Dma != MAX_UINT8) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **) &BlockIo);
if ((Address != MAX_UINT16) && (Irq != MAX_UINT8) && (Dma != MAX_UINT8)) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **)&BlockIo);
if (!EFI_ERROR (Status)) {
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = Address;
SioFloppy->Irq = Irq;
SioFloppy->Dma = Dma;
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = Address;
SioFloppy->Irq = Irq;
SioFloppy->Dma = Dma;
SioFloppy->NumberOfFloppy++;
}
}
}
//
// See if this is a mouse
// Always set mouse found so USB hot plug will work
@@ -225,7 +230,6 @@ LegacyBiosBuildSioDataFromSio (
FreePool (HandleBuffer);
return EFI_SUCCESS;
}
/**
@@ -239,27 +243,27 @@ LegacyBiosBuildSioDataFromSio (
**/
EFI_STATUS
LegacyBiosBuildSioDataFromIsaIo (
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
IN DEVICE_PRODUCER_DATA_HEADER *SioPtr
)
{
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ResourceIndex;
UINTN ChildIndex;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
EFI_ISA_ACPI_RESOURCE *IoResource;
EFI_ISA_ACPI_RESOURCE *DmaResource;
EFI_ISA_ACPI_RESOURCE *InterruptResource;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
EFI_STATUS Status;
DEVICE_PRODUCER_SERIAL *SioSerial;
DEVICE_PRODUCER_PARALLEL *SioParallel;
DEVICE_PRODUCER_FLOPPY *SioFloppy;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
UINTN ResourceIndex;
UINTN ChildIndex;
EFI_ISA_IO_PROTOCOL *IsaIo;
EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;
EFI_ISA_ACPI_RESOURCE *IoResource;
EFI_ISA_ACPI_RESOURCE *DmaResource;
EFI_ISA_ACPI_RESOURCE *InterruptResource;
UINTN EntryCount;
EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
EFI_BLOCK_IO_PROTOCOL *BlockIo;
EFI_SERIAL_IO_PROTOCOL *SerialIo;
//
// Get the list of ISA controllers in the system
@@ -274,12 +278,12 @@ LegacyBiosBuildSioDataFromIsaIo (
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// Collect legacy information from each of the ISA controllers in the system
//
for (Index = 0; Index < HandleCount; Index++) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiIsaIoProtocolGuid, (VOID **) &IsaIo);
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiIsaIoProtocolGuid, (VOID **)&IsaIo);
if (EFI_ERROR (Status)) {
continue;
}
@@ -289,6 +293,7 @@ LegacyBiosBuildSioDataFromIsaIo (
if (ResourceList == NULL) {
continue;
}
//
// Collect the resource types neededto fill in the SIO data structure
//
@@ -298,38 +303,40 @@ LegacyBiosBuildSioDataFromIsaIo (
for (ResourceIndex = 0;
ResourceList->ResourceItem[ResourceIndex].Type != EfiIsaAcpiResourceEndOfList;
ResourceIndex++
) {
)
{
switch (ResourceList->ResourceItem[ResourceIndex].Type) {
case EfiIsaAcpiResourceIo:
IoResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceIo:
IoResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceMemory:
break;
case EfiIsaAcpiResourceMemory:
break;
case EfiIsaAcpiResourceDma:
DmaResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceDma:
DmaResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceInterrupt:
InterruptResource = &ResourceList->ResourceItem[ResourceIndex];
break;
case EfiIsaAcpiResourceInterrupt:
InterruptResource = &ResourceList->ResourceItem[ResourceIndex];
break;
default:
break;
default:
break;
}
}
//
// See if this is an ISA serial port
//
// Ignore DMA resource since it is always returned NULL
//
if (ResourceList->Device.HID == EISA_PNP_ID (0x500) || ResourceList->Device.HID == EISA_PNP_ID (0x501)) {
if (ResourceList->Device.UID <= 3 &&
IoResource != NULL &&
InterruptResource != NULL
) {
if ((ResourceList->Device.HID == EISA_PNP_ID (0x500)) || (ResourceList->Device.HID == EISA_PNP_ID (0x501))) {
if ((ResourceList->Device.UID <= 3) &&
(IoResource != NULL) &&
(InterruptResource != NULL)
)
{
//
// Get the handle of the child device that has opened the ISA I/O Protocol
//
@@ -342,17 +349,18 @@ LegacyBiosBuildSioDataFromIsaIo (
if (EFI_ERROR (Status)) {
continue;
}
//
// We want resource for legacy even if no 32-bit driver installed
//
for (ChildIndex = 0; ChildIndex < EntryCount; ChildIndex++) {
if ((OpenInfoBuffer[ChildIndex].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **) &SerialIo);
Status = gBS->HandleProtocol (OpenInfoBuffer[ChildIndex].ControllerHandle, &gEfiSerialIoProtocolGuid, (VOID **)&SerialIo);
if (!EFI_ERROR (Status)) {
SioSerial = &SioPtr->Serial[ResourceList->Device.UID];
SioSerial->Address = (UINT16) IoResource->StartRange;
SioSerial->Irq = (UINT8) InterruptResource->StartRange;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
SioSerial = &SioPtr->Serial[ResourceList->Device.UID];
SioSerial->Address = (UINT16)IoResource->StartRange;
SioSerial->Irq = (UINT8)InterruptResource->StartRange;
SioSerial->Mode = DEVICE_SERIAL_MODE_NORMAL | DEVICE_SERIAL_MODE_DUPLEX_HALF;
break;
}
}
@@ -361,40 +369,44 @@ LegacyBiosBuildSioDataFromIsaIo (
FreePool (OpenInfoBuffer);
}
}
//
// See if this is an ISA parallel port
//
// Ignore DMA resource since it is always returned NULL, port
// only used in output mode.
//
if (ResourceList->Device.HID == EISA_PNP_ID (0x400) || ResourceList->Device.HID == EISA_PNP_ID (0x401)) {
if (ResourceList->Device.UID <= 2 &&
IoResource != NULL &&
InterruptResource != NULL &&
DmaResource != NULL
) {
SioParallel = &SioPtr->Parallel[ResourceList->Device.UID];
SioParallel->Address = (UINT16) IoResource->StartRange;
SioParallel->Irq = (UINT8) InterruptResource->StartRange;
SioParallel->Dma = (UINT8) DmaResource->StartRange;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
if ((ResourceList->Device.HID == EISA_PNP_ID (0x400)) || (ResourceList->Device.HID == EISA_PNP_ID (0x401))) {
if ((ResourceList->Device.UID <= 2) &&
(IoResource != NULL) &&
(InterruptResource != NULL) &&
(DmaResource != NULL)
)
{
SioParallel = &SioPtr->Parallel[ResourceList->Device.UID];
SioParallel->Address = (UINT16)IoResource->StartRange;
SioParallel->Irq = (UINT8)InterruptResource->StartRange;
SioParallel->Dma = (UINT8)DmaResource->StartRange;
SioParallel->Mode = DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY;
}
}
//
// See if this is an ISA floppy controller
//
if (ResourceList->Device.HID == EISA_PNP_ID (0x604)) {
if (IoResource != NULL && InterruptResource != NULL && DmaResource != NULL) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **) &BlockIo);
if ((IoResource != NULL) && (InterruptResource != NULL) && (DmaResource != NULL)) {
Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiBlockIoProtocolGuid, (VOID **)&BlockIo);
if (!EFI_ERROR (Status)) {
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = (UINT16) IoResource->StartRange;
SioFloppy->Irq = (UINT8) InterruptResource->StartRange;
SioFloppy->Dma = (UINT8) DmaResource->StartRange;
SioFloppy = &SioPtr->Floppy;
SioFloppy->Address = (UINT16)IoResource->StartRange;
SioFloppy->Irq = (UINT8)InterruptResource->StartRange;
SioFloppy->Dma = (UINT8)DmaResource->StartRange;
SioFloppy->NumberOfFloppy++;
}
}
}
//
// See if this is a mouse
// Always set mouse found so USB hot plug will work
@@ -430,14 +442,14 @@ LegacyBiosBuildSioDataFromIsaIo (
**/
EFI_STATUS
LegacyBiosBuildSioData (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_STATUS Status;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
EFI_HANDLE IsaBusController;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
EFI_STATUS Status;
DEVICE_PRODUCER_DATA_HEADER *SioPtr;
EFI_HANDLE IsaBusController;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
//
// Get the pointer to the SIO data structure

View File

@@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "LegacyBiosInterface.h"
THUNK_CONTEXT mThunkContext;
THUNK_CONTEXT mThunkContext;
/**
Sets the counter value for Timer #0 in a legacy 8254 timer.
@@ -23,8 +23,8 @@ SetPitCount (
)
{
IoWrite8 (TIMER_CONTROL_PORT, TIMER0_CONTROL_WORD);
IoWrite8 (TIMER0_COUNT_PORT, (UINT8) (Count & 0xFF));
IoWrite8 (TIMER0_COUNT_PORT, (UINT8) ((Count>>8) & 0xFF));
IoWrite8 (TIMER0_COUNT_PORT, (UINT8)(Count & 0xFF));
IoWrite8 (TIMER0_COUNT_PORT, (UINT8)((Count>>8) & 0xFF));
}
/**
@@ -45,13 +45,13 @@ SetPitCount (
BOOLEAN
EFIAPI
LegacyBiosInt86 (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT8 BiosInt,
IN EFI_IA32_REGISTER_SET *Regs
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT8 BiosInt,
IN EFI_IA32_REGISTER_SET *Regs
)
{
UINT16 Segment;
UINT16 Offset;
UINT16 Segment;
UINT16 Offset;
Regs->X.Flags.Reserved1 = 1;
Regs->X.Flags.Reserved2 = 0;
@@ -67,9 +67,9 @@ LegacyBiosInt86 (
// We use this base address to get the legacy interrupt handler.
//
ACCESS_PAGE0_CODE (
Segment = (UINT16)(((UINT32 *)0)[BiosInt] >> 16);
Offset = (UINT16)((UINT32 *)0)[BiosInt];
);
Segment = (UINT16)(((UINT32 *)0)[BiosInt] >> 16);
Offset = (UINT16)((UINT32 *)0)[BiosInt];
);
return InternalLegacyBiosFarCall (
This,
@@ -102,12 +102,12 @@ LegacyBiosInt86 (
BOOLEAN
EFIAPI
LegacyBiosFarCall86 (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
)
{
Regs->X.Flags.Reserved1 = 1;
@@ -134,8 +134,8 @@ LegacyBiosFarCall86 (
VOID
EFIAPI
LegacyBiosNullInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
}
@@ -161,12 +161,12 @@ LegacyBiosNullInterruptHandler (
BOOLEAN
EFIAPI
InternalLegacyBiosFarCall (
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
IN EFI_LEGACY_BIOS_PROTOCOL *This,
IN UINT16 Segment,
IN UINT16 Offset,
IN EFI_IA32_REGISTER_SET *Regs,
IN VOID *Stack,
IN UINTN StackSize
)
{
UINTN Status;
@@ -180,19 +180,19 @@ InternalLegacyBiosFarCall (
Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
ZeroMem (&ThunkRegSet, sizeof (ThunkRegSet));
ThunkRegSet.X.DI = Regs->X.DI;
ThunkRegSet.X.SI = Regs->X.SI;
ThunkRegSet.X.BP = Regs->X.BP;
ThunkRegSet.X.BX = Regs->X.BX;
ThunkRegSet.X.DX = Regs->X.DX;
ThunkRegSet.X.DI = Regs->X.DI;
ThunkRegSet.X.SI = Regs->X.SI;
ThunkRegSet.X.BP = Regs->X.BP;
ThunkRegSet.X.BX = Regs->X.BX;
ThunkRegSet.X.DX = Regs->X.DX;
//
// Sometimes, ECX is used to pass in 32 bit data. For example, INT 1Ah, AX = B10Dh is
// "PCI BIOS v2.0c + Write Configuration DWORD" and ECX has the dword to write.
//
ThunkRegSet.E.ECX = Regs->E.ECX;
ThunkRegSet.X.AX = Regs->X.AX;
ThunkRegSet.E.DS = Regs->X.DS;
ThunkRegSet.E.ES = Regs->X.ES;
ThunkRegSet.E.ECX = Regs->E.ECX;
ThunkRegSet.X.AX = Regs->X.AX;
ThunkRegSet.E.DS = Regs->X.DS;
ThunkRegSet.E.ES = Regs->X.ES;
CopyMem (&(ThunkRegSet.E.EFLAGS.UintN), &(Regs->X.Flags), sizeof (Regs->X.Flags));
@@ -200,7 +200,7 @@ InternalLegacyBiosFarCall (
// Clear the error flag; thunk code may set it. Stack16 should be the high address
// Make Statk16 address the low 16 bit must be not zero.
//
Stack16 = (UINT16 *)((UINT8 *) mThunkContext.RealModeBuffer + mThunkContext.RealModeBufferSize - sizeof (UINT16));
Stack16 = (UINT16 *)((UINT8 *)mThunkContext.RealModeBuffer + mThunkContext.RealModeBufferSize - sizeof (UINT16));
//
// Save current rate of DXE Timer
@@ -229,22 +229,25 @@ InternalLegacyBiosFarCall (
// handled properly from real mode.
//
DEBUG_CODE_BEGIN ();
UINTN Vector;
UINTN Count;
UINTN Vector;
UINTN Count;
for (Vector = 0x20, Count = 0; Vector < 0x100; Vector++) {
Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHandler);
if (Status == EFI_ALREADY_STARTED) {
Count++;
}
if (Status == EFI_SUCCESS) {
Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, NULL);
}
for (Vector = 0x20, Count = 0; Vector < 0x100; Vector++) {
Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHandler);
if (Status == EFI_ALREADY_STARTED) {
Count++;
}
if (Count >= 2) {
DEBUG ((DEBUG_ERROR, "ERROR: More than one HW interrupt active with CSM enabled\n"));
if (Status == EFI_SUCCESS) {
Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, NULL);
}
ASSERT (Count < 2);
}
if (Count >= 2) {
DEBUG ((DEBUG_ERROR, "ERROR: More than one HW interrupt active with CSM enabled\n"));
}
ASSERT (Count < 2);
DEBUG_CODE_END ();
//
@@ -252,11 +255,11 @@ InternalLegacyBiosFarCall (
// period is less than the CSM required rate of 54.9254, then force the 8254
// PIT counter to 0, which is the CSM required rate of 54.9254 ms
//
if (Private->TimerUses8254 && TimerPeriod < 549254) {
if (Private->TimerUses8254 && (TimerPeriod < 549254)) {
SetPitCount (0);
}
if (Stack != NULL && StackSize != 0) {
if ((Stack != NULL) && (StackSize != 0)) {
//
// Copy Stack to low memory stack
//
@@ -264,12 +267,12 @@ InternalLegacyBiosFarCall (
CopyMem (Stack16, Stack, StackSize);
}
ThunkRegSet.E.SS = (UINT16) (((UINTN) Stack16 >> 16) << 12);
ThunkRegSet.E.ESP = (UINT16) (UINTN) Stack16;
ThunkRegSet.E.CS = Segment;
ThunkRegSet.E.Eip = Offset;
ThunkRegSet.E.SS = (UINT16)(((UINTN)Stack16 >> 16) << 12);
ThunkRegSet.E.ESP = (UINT16)(UINTN)Stack16;
ThunkRegSet.E.CS = Segment;
ThunkRegSet.E.Eip = Offset;
mThunkContext.RealModeState = &ThunkRegSet;
mThunkContext.RealModeState = &ThunkRegSet;
//
// Set Legacy16 state. 0x08, 0x70 is legacy 8259 vector bases.
@@ -279,7 +282,7 @@ InternalLegacyBiosFarCall (
AsmThunk16 (&mThunkContext);
if (Stack != NULL && StackSize != 0) {
if ((Stack != NULL) && (StackSize != 0)) {
//
// Copy low memory stack to Stack
//
@@ -311,17 +314,17 @@ InternalLegacyBiosFarCall (
// PcdEbdaReservedMemorySize should be adjusted to larger for more OPROMs.
//
DEBUG_CODE_BEGIN ();
{
UINTN EbdaBaseAddress;
UINTN ReservedEbdaBaseAddress;
{
UINTN EbdaBaseAddress;
UINTN ReservedEbdaBaseAddress;
ACCESS_PAGE0_CODE (
EbdaBaseAddress = (*(UINT16 *) (UINTN) 0x40E) << 4;
ReservedEbdaBaseAddress = CONVENTIONAL_MEMORY_TOP
- PcdGet32 (PcdEbdaReservedMemorySize);
ASSERT (ReservedEbdaBaseAddress <= EbdaBaseAddress);
ACCESS_PAGE0_CODE (
EbdaBaseAddress = (*(UINT16 *)(UINTN)0x40E) << 4;
ReservedEbdaBaseAddress = CONVENTIONAL_MEMORY_TOP
- PcdGet32 (PcdEbdaReservedMemorySize);
ASSERT (ReservedEbdaBaseAddress <= EbdaBaseAddress);
);
}
}
DEBUG_CODE_END ();
//
@@ -329,21 +332,21 @@ InternalLegacyBiosFarCall (
//
SaveAndSetDebugTimerInterrupt (InterruptState);
Regs->E.EDI = ThunkRegSet.E.EDI;
Regs->E.ESI = ThunkRegSet.E.ESI;
Regs->E.EBP = ThunkRegSet.E.EBP;
Regs->E.EBX = ThunkRegSet.E.EBX;
Regs->E.EDX = ThunkRegSet.E.EDX;
Regs->E.ECX = ThunkRegSet.E.ECX;
Regs->E.EAX = ThunkRegSet.E.EAX;
Regs->X.SS = ThunkRegSet.E.SS;
Regs->X.CS = ThunkRegSet.E.CS;
Regs->X.DS = ThunkRegSet.E.DS;
Regs->X.ES = ThunkRegSet.E.ES;
Regs->E.EDI = ThunkRegSet.E.EDI;
Regs->E.ESI = ThunkRegSet.E.ESI;
Regs->E.EBP = ThunkRegSet.E.EBP;
Regs->E.EBX = ThunkRegSet.E.EBX;
Regs->E.EDX = ThunkRegSet.E.EDX;
Regs->E.ECX = ThunkRegSet.E.ECX;
Regs->E.EAX = ThunkRegSet.E.EAX;
Regs->X.SS = ThunkRegSet.E.SS;
Regs->X.CS = ThunkRegSet.E.CS;
Regs->X.DS = ThunkRegSet.E.DS;
Regs->X.ES = ThunkRegSet.E.ES;
CopyMem (&(Regs->X.Flags), &(ThunkRegSet.E.EFLAGS.UintN), sizeof (Regs->X.Flags));
return (BOOLEAN) (Regs->X.Flags.CF == 1);
return (BOOLEAN)(Regs->X.Flags.CF == 1);
}
/**
@@ -357,16 +360,16 @@ InternalLegacyBiosFarCall (
**/
EFI_STATUS
LegacyBiosInitializeThunk (
IN LEGACY_BIOS_INSTANCE *Private
IN LEGACY_BIOS_INSTANCE *Private
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryAddress;
UINT8 TimerVector;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryAddress;
UINT8 TimerVector;
MemoryAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) Private->IntThunk;
MemoryAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Private->IntThunk;
mThunkContext.RealModeBuffer = (VOID *) (UINTN) (MemoryAddress + ((sizeof (LOW_MEMORY_THUNK) / EFI_PAGE_SIZE) + 1) * EFI_PAGE_SIZE);
mThunkContext.RealModeBuffer = (VOID *)(UINTN)(MemoryAddress + ((sizeof (LOW_MEMORY_THUNK) / EFI_PAGE_SIZE) + 1) * EFI_PAGE_SIZE);
mThunkContext.RealModeBufferSize = EFI_PAGE_SIZE;
mThunkContext.ThunkAttributes = THUNK_ATTRIBUTE_BIG_REAL_MODE | THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15;
@@ -376,7 +379,7 @@ LegacyBiosInitializeThunk (
// Get the interrupt vector number corresponding to IRQ0 from the 8259 driver
//
TimerVector = 0;
Status = Private->Legacy8259->GetVector (Private->Legacy8259, Efi8259Irq0, &TimerVector);
Status = Private->Legacy8259->GetVector (Private->Legacy8259, Efi8259Irq0, &TimerVector);
ASSERT_EFI_ERROR (Status);
//

File diff suppressed because it is too large Load Diff

View File

@@ -6,13 +6,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _EFI_LEGACY_BOOT_OPTION_H_
#define _EFI_LEGACY_BOOT_OPTION_H_
#include <PiDxe.h>
#include <Guid/GlobalVariable.h>
#include <Guid/LegacyDevOrder.h>
#include <Guid/MdeModuleHii.h>
@@ -38,42 +36,40 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "LegacyBootMaintUiVfr.h"
#define CONFIG_OPTION_OFFSET 0x1200
#define CONFIG_OPTION_OFFSET 0x1200
//
// VarOffset that will be used to create question
// all these values are computed from the structure
// defined below
//
#define VAR_OFFSET(Field) ((UINT16) ((UINTN) &(((LEGACY_BOOT_NV_DATA *) 0)->Field)))
#define VAR_OFFSET(Field) ((UINT16) ((UINTN) &(((LEGACY_BOOT_NV_DATA *) 0)->Field)))
//
// Question Id of Zero is invalid, so add an offset to it
//
#define QUESTION_ID(Field) (VAR_OFFSET (Field) + CONFIG_OPTION_OFFSET)
#define LEGACY_FD_QUESTION_ID QUESTION_ID (LegacyFD)
#define LEGACY_HD_QUESTION_ID QUESTION_ID (LegacyHD)
#define LEGACY_CD_QUESTION_ID QUESTION_ID (LegacyCD)
#define LEGACY_NET_QUESTION_ID QUESTION_ID (LegacyNET)
#define LEGACY_BEV_QUESTION_ID QUESTION_ID (LegacyBEV)
#define QUESTION_ID(Field) (VAR_OFFSET (Field) + CONFIG_OPTION_OFFSET)
#define LEGACY_FD_QUESTION_ID QUESTION_ID (LegacyFD)
#define LEGACY_HD_QUESTION_ID QUESTION_ID (LegacyHD)
#define LEGACY_CD_QUESTION_ID QUESTION_ID (LegacyCD)
#define LEGACY_NET_QUESTION_ID QUESTION_ID (LegacyNET)
#define LEGACY_BEV_QUESTION_ID QUESTION_ID (LegacyBEV)
//
// String Constant
//
#define STR_FLOPPY L"Floppy Drive #%02x"
#define STR_HARDDISK L"HardDisk Drive #%02x"
#define STR_CDROM L"ATAPI CDROM Drive #%02x"
#define STR_NET L"NET Drive #%02x"
#define STR_BEV L"BEV Drive #%02x"
#define STR_FLOPPY L"Floppy Drive #%02x"
#define STR_HARDDISK L"HardDisk Drive #%02x"
#define STR_CDROM L"ATAPI CDROM Drive #%02x"
#define STR_NET L"NET Drive #%02x"
#define STR_BEV L"BEV Drive #%02x"
#define STR_FLOPPY_HELP L"Select Floppy Drive #%02x"
#define STR_HARDDISK_HELP L"Select HardDisk Drive #%02x"
#define STR_CDROM_HELP L"Select ATAPI CDROM Drive #%02x"
#define STR_NET_HELP L"NET Drive #%02x"
#define STR_BEV_HELP L"BEV Drive #%02x"
#define STR_FLOPPY_HELP L"Select Floppy Drive #%02x"
#define STR_HARDDISK_HELP L"Select HardDisk Drive #%02x"
#define STR_CDROM_HELP L"Select ATAPI CDROM Drive #%02x"
#define STR_NET_HELP L"NET Drive #%02x"
#define STR_BEV_HELP L"BEV Drive #%02x"
#define STR_FLOPPY_TITLE L"Set Legacy Floppy Drive Order"
#define STR_HARDDISK_TITLE L"Set Legacy HardDisk Drive Order"
@@ -84,7 +80,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// These are the VFR compiler generated data representing our VFR data.
//
extern UINT8 LegacyBootMaintUiVfrBin[];
extern UINT8 LegacyBootMaintUiVfrBin[];
#pragma pack(1)
@@ -92,52 +88,49 @@ extern UINT8 LegacyBootMaintUiVfrBin[];
/// HII specific Vendor Device Path definition.
///
typedef struct {
VENDOR_DEVICE_PATH VendorDevicePath;
EFI_DEVICE_PATH_PROTOCOL End;
VENDOR_DEVICE_PATH VendorDevicePath;
EFI_DEVICE_PATH_PROTOCOL End;
} HII_VENDOR_DEVICE_PATH;
//
// Variable created with this flag will be "Efi:...."
//
#define VAR_FLAG EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE
#define LEGACY_BOOT_OPTION_CALLBACK_DATA_SIGNATURE SIGNATURE_32 ('L', 'G', 'C', 'B')
typedef struct {
UINTN Signature;
UINTN Signature;
//
// HII relative handles
//
EFI_HII_HANDLE HiiHandle;
EFI_HANDLE DriverHandle;
EFI_HII_HANDLE HiiHandle;
EFI_HANDLE DriverHandle;
//
// Produced protocols
//
EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess;
EFI_HII_CONFIG_ACCESS_PROTOCOL ConfigAccess;
//
// Maintain the data.
//
LEGACY_BOOT_MAINTAIN_DATA *MaintainMapData;
LEGACY_BOOT_MAINTAIN_DATA *MaintainMapData;
} LEGACY_BOOT_OPTION_CALLBACK_DATA;
//
// All of the signatures that will be used in list structure
//
#define LEGACY_MENU_OPTION_SIGNATURE SIGNATURE_32 ('m', 'e', 'n', 'u')
#define LEGACY_MENU_ENTRY_SIGNATURE SIGNATURE_32 ('e', 'n', 't', 'r')
#define LEGACY_MENU_OPTION_SIGNATURE SIGNATURE_32 ('m', 'e', 'n', 'u')
#define LEGACY_MENU_ENTRY_SIGNATURE SIGNATURE_32 ('e', 'n', 't', 'r')
#define LEGACY_LEGACY_DEV_CONTEXT_SELECT 0x9
typedef struct {
UINTN Signature;
LIST_ENTRY Head;
UINTN MenuNumber;
UINTN Signature;
LIST_ENTRY Head;
UINTN MenuNumber;
} LEGACY_MENU_OPTION;
typedef struct {
@@ -146,18 +139,18 @@ typedef struct {
} LEGACY_DEVICE_CONTEXT;
typedef struct {
UINTN Signature;
LIST_ENTRY Link;
UINTN OptionNumber;
UINT16 *DisplayString;
UINT16 *HelpString;
EFI_STRING_ID DisplayStringToken;
EFI_STRING_ID HelpStringToken;
VOID *VariableContext;
UINTN Signature;
LIST_ENTRY Link;
UINTN OptionNumber;
UINT16 *DisplayString;
UINT16 *HelpString;
EFI_STRING_ID DisplayStringToken;
EFI_STRING_ID HelpStringToken;
VOID *VariableContext;
} LEGACY_MENU_ENTRY;
typedef struct {
UINT16 BbsIndex;
UINT16 BbsIndex;
} LEGACY_BOOT_OPTION_BBS_DATA;
#pragma pack()
@@ -183,12 +176,12 @@ typedef struct {
EFI_STATUS
EFIAPI
LegacyBootOptionCallback (
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN EFI_BROWSER_ACTION Action,
IN EFI_QUESTION_ID QuestionId,
IN UINT8 Type,
IN EFI_IFR_TYPE_VALUE *Value,
OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN EFI_BROWSER_ACTION Action,
IN EFI_QUESTION_ID QuestionId,
IN UINT8 Type,
IN EFI_IFR_TYPE_VALUE *Value,
OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
);
/**
@@ -216,10 +209,10 @@ LegacyBootOptionCallback (
EFI_STATUS
EFIAPI
LegacyBootOptionExtractConfig (
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Request,
OUT EFI_STRING *Progress,
OUT EFI_STRING *Results
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Request,
OUT EFI_STRING *Progress,
OUT EFI_STRING *Results
);
/**
@@ -241,9 +234,9 @@ LegacyBootOptionExtractConfig (
EFI_STATUS
EFIAPI
LegacyBootOptionRouteConfig (
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Configuration,
OUT EFI_STRING *Progress
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Configuration,
OUT EFI_STRING *Progress
);
#endif

View File

@@ -6,34 +6,28 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _EFI_LEGACY_BOOT_OPTION_VFR_H_
#define _EFI_LEGACY_BOOT_OPTION_VFR_H_
#include <Guid/HiiBootMaintenanceFormset.h>
#define MAX_MENU_NUMBER 100
#define MAX_MENU_NUMBER 100
#define LEGACY_BOOT_OPTION_FORMSET_GUID { 0x6bc75598, 0x89b4, 0x483d, { 0x91, 0x60, 0x7f, 0x46, 0x9a, 0x96, 0x35, 0x31 } }
#define VARSTORE_ID_LEGACY_BOOT 0x0001
#define VARSTORE_ID_LEGACY_BOOT 0x0001
#define LEGACY_BOOT_FORM_ID 0x1000
#define LEGACY_ORDER_CHANGE_FORM_ID 0x1001
#define FORM_FLOPPY_BOOT_ID 0x2000
#define FORM_HARDDISK_BOOT_ID 0x2001
#define FORM_CDROM_BOOT_ID 0x2002
#define FORM_NET_BOOT_ID 0x2003
#define FORM_BEV_BOOT_ID 0x2004
#define FORM_FLOPPY_BOOT_ID 0x2000
#define FORM_HARDDISK_BOOT_ID 0x2001
#define FORM_CDROM_BOOT_ID 0x2002
#define FORM_NET_BOOT_ID 0x2003
#define FORM_BEV_BOOT_ID 0x2004
#define FORM_BOOT_LEGACY_DEVICE_ID 0x9000
#define FORM_BOOT_LEGACY_LABEL_END 0x9001
#define FORM_BOOT_LEGACY_DEVICE_ID 0x9000
#define FORM_BOOT_LEGACY_LABEL_END 0x9001
#pragma pack(1)
@@ -49,11 +43,11 @@ typedef struct {
//
// Legacy Device Order Selection Storage
//
UINT16 LegacyFD[MAX_MENU_NUMBER];
UINT16 LegacyHD[MAX_MENU_NUMBER];
UINT16 LegacyCD[MAX_MENU_NUMBER];
UINT16 LegacyNET[MAX_MENU_NUMBER];
UINT16 LegacyBEV[MAX_MENU_NUMBER];
UINT16 LegacyFD[MAX_MENU_NUMBER];
UINT16 LegacyHD[MAX_MENU_NUMBER];
UINT16 LegacyCD[MAX_MENU_NUMBER];
UINT16 LegacyNET[MAX_MENU_NUMBER];
UINT16 LegacyBEV[MAX_MENU_NUMBER];
} LEGACY_BOOT_NV_DATA;
///
@@ -68,10 +62,10 @@ typedef struct {
//
// Legacy Device Order Selection Storage
//
LEGACY_BOOT_NV_DATA InitialNvData;
LEGACY_BOOT_NV_DATA CurrentNvData;
LEGACY_BOOT_NV_DATA LastTimeNvData;
UINT8 DisableMap[32];
LEGACY_BOOT_NV_DATA InitialNvData;
LEGACY_BOOT_NV_DATA CurrentNvData;
LEGACY_BOOT_NV_DATA LastTimeNvData;
UINT8 DisableMap[32];
} LEGACY_BOOT_MAINTAIN_DATA;
#pragma pack()

View File

@@ -28,7 +28,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#pragma pack(1)
typedef struct {
UINT16 BbsIndex;
UINT16 BbsIndex;
} LEGACY_BM_BOOT_OPTION_BBS_DATA;
#pragma pack()
@@ -44,7 +44,7 @@ typedef struct {
VOID
EFIAPI
LegacyBmBoot (
IN EFI_BOOT_MANAGER_LOAD_OPTION *BootOption
IN EFI_BOOT_MANAGER_LOAD_OPTION *BootOption
);
/**

File diff suppressed because it is too large Load Diff